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<title>XADD: Exchange and Add (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>XADD: Exchange and Add (x86 Instruction Set Reference)</title>
<h1>XADD</h1>
<h2>Exchange and Add</h2>
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<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
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<td class="grid"><code>0F C0 /r</code></td>
<td class="grid"><code>XADD r/m8, r8</code></td>
<td class="grid">Exchange r8 and r/m8; load sum into r/m8.</td>
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<td class="grid"><code>0F C1 /r</code></td>
<td class="grid"><code>XADD r/m16, r16</code></td>
<td class="grid">Exchange r16 and r/m16; load sum into r/m16.</td>
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<td class="grid"><code>0F C1 /r</code></td>
<td class="grid"><code>XADD r/m32, r32</code></td>
<td class="grid">Exchange r32 and r/m32; load sum into r/m32.</td>
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<th>Description</th>
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<p>Exchanges the first operand (destination operand) with the second operand (source operand), then loads the sum of the two values into the destination operand. The destination operand can be a register or a memory location; the source operand is a register.</p>
<p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p>
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<th>Operation</th>
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<pre>Temporary <span class="operator">=</span> Source <span class="operator">+</span> Destination<span class="operator">;</span>
Source <span class="operator">=</span> Destination<span class="operator">;</span>
Destination <span class="operator">=</span> Temporary<span class="operator">;</span>
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<th>Flags affected</th>
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<p>The CF, PF, AF, SF, ZF, and OF flags are set according to the result of the addition, which is stored in the destination operand.
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<th>IA-32 Architecture Compatibility</th>
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<p>IA-32 processors earlier than the Intel486 processor do not recognize this instruction. If this instruction is used, you should provide an equivalent code sequence that runs on earlier processors.
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