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<title>FICOM/FICOMP: Compare Integer (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>FICOM/FICOMP: Compare Integer (x86 Instruction Set Reference)</title>
<h1>FICOM/FICOMP</h1>
<h2>Compare Integer</h2>
<object>
<table class="box">
<tr>
<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
</tr>
<tr>
<td class="grid"><code>DE /2</code></td>
<td class="grid"><code>FICOM m16int</code></td>
<td class="grid">Compare ST(0) with m16int.</td>
</tr>
<tr>
<td class="grid"><code>DA /2</code></td>
<td class="grid"><code>FICOM m32int</code></td>
<td class="grid">Compare ST(0) with m32int.</td>
</tr>
<tr>
<td class="grid"><code>DE /3</code></td>
<td class="grid"><code>FICOMP m16int</code></td>
<td class="grid">Compare ST(0) with m16int and pop stack register.</td>
</tr>
<tr>
<td class="grid"><code>DA /3</code></td>
<td class="grid"><code>FICOMP m32int</code></td>
<td class="grid">Compare ST(0) with m32int and pop stack register.</td>
</tr>
</table>
</object>
<object>
<table class="box">
<tr>
<th>Description</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<p>Compares the value in ST(0) with an integer source operand and sets the condition code flags C0, C2, and C3 in the FPU status word according to the results (see table below). The integer value is converted to double extended-precision floating-point format before the comparison is made.</p>
<div>
<table class="grid">
<caption>FICOM/FICOMP Results</caption>
<tr><th>Condition</th><th>C3</th><th>C2</th><th>C0</th></tr>
<tr><td>ST(0) > Source</td><td>0</td><td>0</td><td>0</td></tr>
<tr><td>ST(0) < Source</td><td>0</td><td>0</td><td>1</td></tr>
<tr><td>ST(0) = Source</td><td>1</td><td>0</td><td>0</td></tr>
<tr><td>Unordered</td><td>1</td><td>1</td><td>1</td></tr>
</table>
</div>
<p>These instructions perform an "unordered comparison." An unordered comparison also checks the class of the numbers being compared (see "FXAM-Examine" in this chapter). If either operand is a NaN or is in an undefined format, the condition flags are set to "unordered." The sign of zero is ignored, so that -0.0 = +0.0.</p>
<p>The FICOMP instructions pop the register stack following the comparison. To pop the register stack, the processor marks the ST(0) register empty and increments the stack pointer (TOP) by 1.</p>
</td>
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</table>
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<object>
<table class="box">
<tr>
<th>Operation</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<pre>OperandRelation <span class="operator">=</span> Compare<span class="operator">(</span>ST<span class="operator">(</span><span class="number">0</span><span class="operator">)</span><span class="operator">,</span> Source<span class="operator">)</span><span class="operator">;</span>
<span class="keyword">switch</span><span class="operator">(</span>OperandRelation<span class="operator">)</span> {
RelationGreaterThan<span class="operator">:</span>
C3 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
C2 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
C0 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
<span class="keyword">break</span><span class="operator">;</span>
RelationLessThan<span class="operator">:</span>
C3 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
C2 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
C0 <span class="operator">=</span> <span class="number">1</span><span class="operator">;</span>
<span class="keyword">break</span><span class="operator">;</span>
RelationEqual<span class="operator">:</span>
C3 <span class="operator">=</span> <span class="number">1</span><span class="operator">;</span>
C2 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
C0 <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
<span class="keyword">break</span><span class="operator">;</span>
RelationUnordered<span class="operator">:</span>
C3 <span class="operator">=</span> <span class="number">1</span><span class="operator">;</span>
C2 <span class="operator">=</span> <span class="number">1</span><span class="operator">;</span>
C0 <span class="operator">=</span> <span class="number">1</span><span class="operator">;</span>
<span class="keyword">break</span><span class="operator">;</span>
}
<span class="keyword">if</span><span class="operator">(</span>Instruction <span class="operator">==</span> FICOMP<span class="operator">)</span> PopRegisterStack<span class="operator">(</span><span class="operator">)</span><span class="operator">;</span>
</pre>
</td>
</tr>
</table>
</object>
<object>
<table class="box">
<tr>
<th>FPU flags affected</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<p>C1 Set to 0 if stack underflow occurred; otherwise, set to 0.
C0, C2, C3 See table above.
</p>
</td>
</tr>
</table>
</object>
<object>
<table class="box">
<tr>
<th>Floating-Point Exceptions</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#IS</code></td><td>Stack underflow occurred.</td></tr>
<tr><td><code>#IS</code></td><td>Stack underflow occurred.</td></tr>
<tr><td><code>#IA</code></td><td>One or both operands are NaN values or have unsupported formats.</td></tr>
</table>
</div>
</td>
</tr>
</table>
</object>
<object>
<table class="box">
<tr>
<th>Protected Mode Exceptions</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#GP(0)</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a null segment selector.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a null segment selector.</td></tr>
<tr><td><code>#SS(0)</code></td><td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr><td><code>#NM</code></td><td>EM or TS in CR0 is set.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>If a page fault occurs.</td></tr>
</table>
</div>
</td>
</tr>
</table>
</object>
<object>
<table class="box">
<tr>
<th>Real-Address Mode Exceptions</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#GP</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr><td><code>#GP</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr><td><code>#SS</code></td><td>If a memory operand effective address is outside the SS segment limit.</td></tr>
</table>
</div>
</td>
</tr>
</table>
</object>
<object>
<table class="box">
<tr>
<th>Virtual-8086 Mode Exceptions</th>
</tr>
<tr>
<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#GP(0)</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr><td><code>#SS(0)</code></td><td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr><td><code>#NM</code></td><td>EM or TS in CR0 is set.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>If a page fault occurs.</td></tr>
</table>
</div>
</td>
</tr>
</table>
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