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<title>ADDSUBPS: Packed Single-FP Add/Subtract (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>ADDSUBPS: Packed Single-FP Add/Subtract (x86 Instruction Set Reference)</title>
<h1>ADDSUBPS</h1>
<h2>Packed Single-FP Add/Subtract</h2>
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<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
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<td class="grid"><code>F2 0F D0 /r</code></td>
<td class="grid"><code>ADDSUBPS xmm1, xmm2/m128</code></td>
<td class="grid">Add/Subtract packed SP FP numbers from xmm2/m128 to xmm1.</td>
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<th>Description</th>
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<td class="instruction_set_reference_box">
<p>Adds odd-numbered single-precision floating-point values of the source operand (second operand) with the corresponding single-precision floating-point values from the destination operand (first operand); stores the result in the odd-numbered values of the destination operand.</p>
<p>Subtracts the even-numbered single-precision floating-point values in the source operand from the corresponding single-precision floating values in the destination operand; stores the result into the even-numbered values of the destination operand.</p>
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<th>Operation</th>
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<pre>xmm1<span class="operator">[</span><span class="number">0..31</span><span class="operator">]</span> <span class="operator">=</span> xmm1<span class="operator">[</span><span class="number">0..31</span><span class="operator">]</span> <span class="operator">-</span> xmm2/m128<span class="operator">[</span><span class="number">0..31</span><span class="operator">]</span><span class="operator">;</span>
xmm1<span class="operator">[</span><span class="number">32..63</span><span class="operator">]</span> <span class="operator">=</span> xmm1<span class="operator">[</span><span class="number">32..63</span><span class="operator">]</span> <span class="operator">+</span> xmm2/m128<span class="operator">[</span><span class="number">32..63</span><span class="operator">]</span><span class="operator">;</span>
xmm1<span class="operator">[</span><span class="number">64..95</span><span class="operator">]</span> <span class="operator">=</span> xmm1<span class="operator">[</span><span class="number">64..95</span><span class="operator">]</span> <span class="operator">-</span> xmm2/m128<span class="operator">[</span><span class="number">64..95</span><span class="operator">]</span><span class="operator">;</span>
xmm1<span class="operator">[</span><span class="number">96..127</span><span class="operator">]</span> <span class="operator">=</span> xmm1<span class="operator">[</span><span class="number">96..127</span><span class="operator">]</span> <span class="operator">+</span> xmm2/m128<span class="operator">[</span><span class="number">96..127</span><span class="operator">]</span><span class="operator">;</span>
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<th>Exceptions</th>
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<td class="instruction_set_reference_box">
When the source operand is a memory operand, the operand must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.
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<th>Numeric Exceptions</th>
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<td class="instruction_set_reference_box">
Overflow, Underflow, Invalid, Precision, Denormal.
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<th>Protected Mode Exceptions</th>
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<td class="instruction_set_reference_box">
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<tr><td><code>#GP(0)</code></td><td>For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.</td></tr>
<tr><td><code>#GP(0)</code></td><td>For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.</td></tr>
<tr><td><code>#SS(0)</code></td><td>For an illegal address in the SS segment.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>For a page fault.</td></tr>
<tr><td><code>#NM</code></td><td>If TS bit in CR0 is set.</td></tr>
<tr><td><code>#XM</code></td><td>For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1).</td></tr>
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</object>
<object>
<table class="box">
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<th>Real-Address Mode Exceptions</th>
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<td class="instruction_set_reference_box">
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<table class="operations_table">
<tr><td><code>#GP(0)</code></td><td>If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.</td></tr>
<tr><td><code>#NM</code></td><td>If TS bit in CR0 is set.</td></tr>
<tr><td><code>#XM</code></td><td>For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1).</td></tr>
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<object>
<table class="box">
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<th>Virtual-8086 Mode Exceptions</th>
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<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#GP(0)</code></td><td>If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If any part of the operand would lie outside of the effective address space from 0 to 0FFFFH. If a memory operand is not aligned on a 16-byte boundary, regardless of segment.</td></tr>
<tr><td><code>#NM</code></td><td>If TS bit in CR0 is set.</td></tr>
<tr><td><code>#XM</code></td><td>For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 1).</td></tr>
<tr><td><code>#UD</code></td><td>If CR0.EM = 1. For an unmasked Streaming SIMD Extensions numeric exception (CR4.OSXMMEXCPT = 0). If CR4.OSFXSR(bit 9) = 0. If CPUID.SSE3(ECX bit 0) = 0.</td></tr>
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<object>
<table class="box">
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<th>Instruction</th>
<th>Latency</th>
<th>Throughput</th>
<th>Execution Unit</th>
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<tr><td class="grid"><code>CPUID</code></td><td class="grid">0F3n</td><td class="grid">0F3n</td><td class="grid">0F3n</td></tr>
<tr><td class="grid"><code>ADDSUBPD</code></td><td class="grid">5</td><td class="grid">2</td><td class="grid">FP_ADD</td></tr>
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