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<title>CMPXCHG8B: Compare and Exchange 8 Bytes (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>CMPXCHG8B: Compare and Exchange 8 Bytes (x86 Instruction Set Reference)</title>
<h1>CMPXCHG8B</h1>
<h2>Compare and Exchange 8 Bytes</h2>
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<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
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<td class="grid"><code>0F C7 /1 m64</code></td>
<td class="grid"><code>CMPXCHG8B m64</code></td>
<td class="grid">Compare EDX:EAX with m64. If equal, set ZF and load ECX:EBX into m64. Else, clear ZF and load m64 into EDX:EAX.</td>
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<th>Description</th>
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<td class="instruction_set_reference_box">
<p>Compares the 64-bit value in EDX:EAX with the operand (destination operand). If the values are equal, the 64-bit value in ECX:EBX is stored in the destination operand. Otherwise, the value in the destination operand is loaded into EDX:EAX. The destination operand is an 8-byte memory location. For the EDX:EAX and ECX:EBX register pairs, EDX and ECX contain the high-order 32 bits and EAX and EBX contain the low-order 32 bits of a 64-bit value.</p>
<p>This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.</p>
<p>To simplify the interface to the processor's bus, the destination operand receives a write cycle without regard to the result of the comparison. The destination operand is written back if the comparison fails; otherwise, the source operand is written into the destination. (The processor never produces a locked read without also producing a locked write.)</p>
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<th>Operation</th>
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<td class="instruction_set_reference_box">
<pre><span class="keyword">if</span><span class="operator">(</span>EDX<span class="operator">:</span>EAX <span class="operator">==</span> Destination<span class="operator">)</span> {
ZF <span class="operator">=</span> <span class="number">1</span><span class="operator">;</span>
Destination <span class="operator">=</span> ECX<span class="operator">:</span>EBX<span class="operator">;</span>
}
<span class="keyword">else</span> {
ZF <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
EDX<span class="operator">:</span>EAX <span class="operator">=</span> Destination<span class="operator">;</span>
}
</pre>
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<th>Flags affected</th>
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<p>The ZF flag is set if the destination operand and EDX:EAX are equal; otherwise it is cleared.
The CF, PF, AF, SF, and OF flags are unaffected.
</p>
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<th>IA-32 Architecture Compatibility</th>
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<td class="instruction_set_reference_box">
<p>This instruction is not supported on Intel processors earlier than the Pentium processors.
</p>
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<th>Protected Mode Exceptions</th>
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<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#UD</code></td><td>If the destination operand is not a memory location.</td></tr>
<tr><td><code>#UD</code></td><td>If the destination operand is not a memory location.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If the destination is located in a non-writable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a null segment selector.</td></tr>
<tr><td><code>#SS(0)</code></td><td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>If a page fault occurs.</td></tr>
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<th>Real-Address Mode Exceptions</th>
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<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#UD</code></td><td>If the destination operand is not a memory location.</td></tr>
<tr><td><code>#UD</code></td><td>If the destination operand is not a memory location.</td></tr>
<tr><td><code>#GP</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
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</td>
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</table>
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<object>
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<th>Virtual-8086 Mode Exceptions</th>
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<tr>
<td class="instruction_set_reference_box">
<div>
<table class="operations_table">
<tr><td><code>#UD</code></td><td>If the destination operand is not a memory location.</td></tr>
<tr><td><code>#UD</code></td><td>If the destination operand is not a memory location.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr><td><code>#SS(0)</code></td><td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>If a page fault occurs.</td></tr>
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