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<title>BSWAP: Byte Swap (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>BSWAP: Byte Swap (x86 Instruction Set Reference)</title>
<h1>BSWAP</h1>
<h2>Byte Swap</h2>
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<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
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<td class="grid"><code>0F C8+rd</code></td>
<td class="grid"><code>BSWAP r32</code></td>
<td class="grid">Reverses the byte order of a 32-bit register.</td>
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<th>Description</th>
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<td class="instruction_set_reference_box">
<p>Reverses the byte order of a 32-bit (destination) register: bits 0 through 7 are swapped with bits 24 through 31, and bits 8 through 15 are swapped with bits 16 through 23. This instruction is provided for converting little-endian values to big-endian format and vice versa.</p>
<p>To swap bytes in a word value (16-bit register), use the XCHG instruction. When the BSWAP instruction references a 16-bit register, the result is undefined.</p>
<p>The BSWAP instruction is not supported on IA-32 processors earlier than the Intel486 processor family. For compatibility with this instruction, include functionally equivalent code for execution on Intel processors earlier than the Intel486 processor family.</p>
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<th>Operation</th>
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<td class="instruction_set_reference_box">
<pre>Temporary <span class="operator">=</span> Destination<span class="operator">;</span>
Destination<span class="operator">[</span><span class="number">0..7</span><span class="operator">]</span> <span class="operator">=</span> Temporary<span class="operator">[</span><span class="number">24..31</span><span class="operator">]</span><span class="operator">;</span>
Destination<span class="operator">[</span><span class="number">8..15</span><span class="operator">]</span> <span class="operator">=</span> Temporary<span class="operator">[</span><span class="number">16..23</span><span class="operator">]</span><span class="operator">;</span>
Destination<span class="operator">[</span><span class="number">16..23</span><span class="operator">]</span> <span class="operator">=</span> Temporary<span class="operator">[</span><span class="number">8..15</span><span class="operator">]</span><span class="operator">;</span>
Destination<span class="operator">[</span><span class="number">24..31</span><span class="operator">]</span> <span class="operator">=</span> Temporary<span class="operator">[</span><span class="number">0..7</span><span class="operator">]</span><span class="operator">;</span>
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<th>Flags affected</th>
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<td class="instruction_set_reference_box">
<p>None.
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<th>Exceptions</th>
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<td class="instruction_set_reference_box">
None.
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<th>Instruction</th>
<th>Latency</th>
<th>Throughput</th>
<th>Execution Unit</th>
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<tr><td class="grid"><code>CPUID</code></td><td class="grid">0F3n/0F2n</td><td class="grid">0F3n/0F2n</td><td class="grid">0F2n</td></tr>
<tr><td class="grid"><code>BSWAP</code></td><td class="grid">1/7</td><td class="grid">0.5/1</td><td class="grid">ALU</td></tr>
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