# Copyright (c) P.J.Gawthrop, 1996.

###############################################################
## Version control history
###############################################################
## $Id$
## $Log$
## Revision 1.3  1996/08/04 20:32:28  peter
## Stopped complaint about missing lbl entry for port components
##
## Revision 1.2  1996/08/04 20:05:25  peter
## Included port components - eg SS:[1]
##
## Revision 1.1  1996/08/04 20:01:58  peter
## Initial revision
##
###############################################################

      CR   = $2;
      args = $3;
      label[i_label,1] = name; 
      label[i_label,2] = CR;
      label[i_label,3] = args
	}
}

function fig_info() {
# Grabs the fig-file information for a component
  return(sprintf("%s %s %s %s %s %s %s %s %s %s %s ", \
		 $1, $2, $3, $4, $5, $6, $7, \
		 $8, $9, $10, $11))
	 }

function process_text() {
# The text string is field 14 onwards
  str = $14; 
  for (i=15; i<=NF; i++) {
    str = sprintf("%s %s", str, $i)
      }

# A component is a plain or a port component
  isa_component = isa_plain_component||isa_port_component;

# Coordinates in fields 12 & 13
  x_coord = $12;
  y_coord = $13;

# Do the port components
  if (isa_port_component) {
    i_port_component++;
    # Port number is the bit between the []
    port_number  = substr(a[2],2,length(a[2])-2);
    x_port[port_number] = x_coord;
    y_port[port_number] = y_coord;
    info_port[port_number] = fig_info();
  }

# Do the plain components
  if (isa_plain_component) {
    i_text++;

    named_component = (match(str,delimiter) > 0);
    if (named_component) {
      split(str,a,delimiter);
      type = a[1];
      name = a[2];

      label[i_label,3] = default_args
	}

# Save in associative arrays by name	
    comp_type[name] = type;
    x[name] = x_coord;
    y[name] = y_coord;
    info[name] =  fig_info();


  }

  if (isa_port) {
    i_port++;
    port_index = substr(str,2,length(str)-2);
    ports[i_port] = sprintf("%s %s %s", x_coord, y_coord, port_index);
  }
}

  sys_name = ARGV[1];
  delete ARGV[1];
  b_file = sprintf("%s_rbg.m", sys_name);
  c_file = sprintf("%s_cmp.m", sys_name);
  cbg_file = sprintf("%s_cbg1.fig", sys_name);
  warning_f = "WARNING %s \t in fig file but not lbl file  - using\n";
  warning_l = "WARNING %s \t in lbl file but not fig file  - ignoring\n";
  warning_p = "WARNING system ports are not consecutively numbered\n";

  data_symbol = "----";
  default_cr = "";
  default_args = "";
  delimiter = ":";
  q = "\047";
  terminator = "\\001";
  component_regexp = "[^0-9a-zA-Z_:]";

  i_bond = 0;
  i_port = 0;
  i_stroke = 0;
  i_arrow = 0;
  i_label = 0;
  i_text = 0;
  i_name = 0;
  i_port_component = 0;

}
{
# Start of .fig file?
  if ( (NF>0) && (match("#FIG", $1) > 0) ) {
    fig_file=1;
  }

  print  sprintf("rstrokes = [") >> b_file;
  for (i = 1; i <= i_stroke; i++)
    print  strokes[i] >> b_file;
  print  sprintf("];") >> b_file;

  print  sprintf("rcomponents = [") >> b_file;
  j = 0;

# Do the port componennts, in order, first
  for (i = 1; i <= i_port_component; i++) {
    port_type = "SS";
    name = sprintf("[%1.0f]", i);
    cr   = i;
    arg  = "";

    if (length(x_port[i])==0)
      printf(warning_p);
    else {
      j++;
      print x_port[i], y_port[i], info_port[i] >> b_file;
      printf("if i==%1.0f\n", j) 	>> c_file;
      printf("\tcomp_type = %s%s%s;\n", q, port_type, q) >> c_file;
      printf("\tname = %s%s%s;\n", q, name, q) >> c_file;
      printf("\tcr = %s%s%s;\n", q, cr, q) >> c_file;
      printf("\targ = %s%s%s;\n", q, arg, q) >> c_file;
      print "end" >> c_file
	}
    
  }

# Now do the ordinary components (in no particular order)
  for (i = 1; i <= i_label; i++) {
    name = label[i,1];
    cr   = label[i,2];
    arg  = label[i,3];
    
    if (length(x[name])==0)
      printf(warning_l, name);