Overview
Comment:Relabeled ports - easier for sensitivity to handle
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SHA3-256: 1b1d48282eae842672ade16be72f83aa19555929105ce3fdf155bf88550e4429
User & Date: gawthrop@users.sourceforge.net on 2001-07-24 04:25:16.000
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Context
2001-07-24
05:52:15
Add to CVS check-in: 0e37387307 user: gawthrop@users.sourceforge.net tags: origin/master, trunk
04:25:16
Relabeled ports - easier for sensitivity to handle check-in: 1b1d48282e user: gawthrop@users.sourceforge.net tags: origin/master, trunk
04:18:32
Fixed problem with shell expanding * (used as important rep marker) check-in: 86a2a906ba user: gawthrop@users.sourceforge.net tags: origin/master, trunk
Changes
Unified Diff Ignore Whitespace Patch
Modified mttroot/mtt/lib/comp/compound/Electrical/RC/RC_abg.fig from [4b121c7814] to [cd120e33ca].
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	 5852 4277 6752 4277 6527 4502
2 4 0 2 31 7 1 0 -1 0.000 0 0 7 0 0 5
	 9225 5625 9225 225 900 225 900 5625 9225 5625
2 1 0 2 1 7 1 0 -1 0.000 0 0 -1 0 0 2
	 5400 1080 5850 1080
2 1 0 2 0 7 50 0 -1 0.000 0 0 -1 0 0 2
	 4050 4050 4050 4500
4 2 4 0 0 0 20 0.0000 4 255 2040 3105 4365 SS:[Electrical_in]\001
4 1 -1 0 0 0 20 0.0000 4 195 135 4277 4367 1\001
4 1 -1 0 0 0 20 0.0000 4 195 135 5627 4367 0\001
4 1 -1 0 0 0 20 0.0000 4 195 375 4276 2926 R:r\001
4 1 -1 0 0 0 20 0.0000 4 195 390 5626 2926 C:c\001
4 0 1 1 0 0 20 0.0000 4 135 105 4230 450 r\001
4 0 1 1 0 0 20 0.0000 4 135 120 6030 1215 c\001
4 1 1 1 0 0 20 0.0000 4 255 1350 4950 4995 Bond graph\001
4 1 1 1 0 0 20 0.0000 4 195 1200 4950 2025 Schematic\001
4 0 4 0 0 0 20 0.0000 4 255 2190 6887 4367 SS:[Electrical_out]\001
4 0 1 1 0 0 20 0.0000 4 135 135 3375 4005 v\001
4 0 1 1 0 0 20 0.0000 4 195 135 3465 4140 1\001
4 0 1 1 0 0 20 0.0000 4 195 75 3375 4590 i\001
4 0 1 1 0 0 20 0.0000 4 195 135 3465 4725 1\001
4 0 1 1 0 0 20 0.0000 4 195 75 6165 4590 i\001
4 0 1 1 0 0 20 0.0000 4 195 135 6255 4725 2\001
4 0 1 1 0 0 20 0.0000 4 135 135 6165 4005 v\001








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	 5852 4277 6752 4277 6527 4502
2 4 0 2 31 7 1 0 -1 0.000 0 0 7 0 0 5
	 9225 5625 9225 225 900 225 900 5625 9225 5625
2 1 0 2 1 7 1 0 -1 0.000 0 0 -1 0 0 2
	 5400 1080 5850 1080
2 1 0 2 0 7 50 0 -1 0.000 0 0 -1 0 0 2
	 4050 4050 4050 4500
4 2 4 0 0 0 20 0.0000 4 255 2040 3105 4365 SS:[in]\001
4 1 -1 0 0 0 20 0.0000 4 195 135 4277 4367 1\001
4 1 -1 0 0 0 20 0.0000 4 195 135 5627 4367 0\001
4 1 -1 0 0 0 20 0.0000 4 195 375 4276 2926 R:r\001
4 1 -1 0 0 0 20 0.0000 4 195 390 5626 2926 C:c\001
4 0 1 1 0 0 20 0.0000 4 135 105 4230 450 r\001
4 0 1 1 0 0 20 0.0000 4 135 120 6030 1215 c\001
4 1 1 1 0 0 20 0.0000 4 255 1350 4950 4995 Bond graph\001
4 1 1 1 0 0 20 0.0000 4 195 1200 4950 2025 Schematic\001
4 0 4 0 0 0 20 0.0000 4 255 2190 6887 4367 SS:[out]\001
4 0 1 1 0 0 20 0.0000 4 135 135 3375 4005 v\001
4 0 1 1 0 0 20 0.0000 4 195 135 3465 4140 1\001
4 0 1 1 0 0 20 0.0000 4 195 75 3375 4590 i\001
4 0 1 1 0 0 20 0.0000 4 195 135 3465 4725 1\001
4 0 1 1 0 0 20 0.0000 4 195 75 6165 4590 i\001
4 0 1 1 0 0 20 0.0000 4 195 135 6255 4725 2\001
4 0 1 1 0 0 20 0.0000 4 135 135 6165 4005 v\001
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Modified mttroot/mtt/lib/comp/compound/Electrical/RC/RC_lbl.txt from [f683336700] to [335a38c4b3]. 
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%% Label file for system RC (RC_lbl.txt)
%SUMMARY RC A Simple two-port RC circuit
%DESCRIPTION This simple example is used in the manual.

% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %% Version control history
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %% $Id$
% %% $Log$



% %% Revision 1.2  1998/07/27 11:09:36  peterg
% %% Commented the aliases.
% %%
% %% Revision 1.1  1998/07/16 20:16:30  peterg
% %% Initial revision
% %%
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%


% Port aliases
%ALIAS	in	Electrical_in	# The left-hand port
%ALIAS	out	Electrical_out	# The right-hand port

% Argument aliases
%ALIAS	$1	c		# Capacitance
%ALIAS	$2	r		# Resistance

%% Each line should be of one of the following forms:
%	     a comment (ie starting with %)
%	     component-name	cr_name	arg1,arg2,..argn
%	     blank

% ---- Component labels ----

% Component type C
	c		lin	effort,c

% Component type R
	r		lin	flow,r

% Component type SS
	[Electrical_in]		SS		external,internal
	[Electrical_out]	SS		external,0










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%% Label file for system RC (RC_lbl.txt)
%SUMMARY RC A Simple two-port RC circuit
%DESCRIPTION This simple example is used in the manual.

% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %% Version control history
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %% $Id$
% %% $Log$
% %% Revision 1.3  2000/09/14 15:13:02  peterg
% %% Changed port CRs to give SISO system when used in isolation
% %%
% %% Revision 1.2  1998/07/27 11:09:36  peterg
% %% Commented the aliases.
% %%
% %% Revision 1.1  1998/07/16 20:16:30  peterg
% %% Initial revision
% %%
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%


% Port aliases
%ALIAS	in	in	# The left-hand port
%ALIAS	out	out	# The right-hand port

% Argument aliases
%ALIAS	$1	c		# Capacitance
%ALIAS	$2	r		# Resistance

%% Each line should be of one of the following forms:
%	     a comment (ie starting with %)
%	     component-name	cr_name	arg1,arg2,..argn
%	     blank

% ---- Component labels ----

% Component type C
	c		lin	effort,c

% Component type R
	r		lin	flow,r

% Component type SS
	[in]		SS		external,internal
	[out]	SS		external,0
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