Overview
Comment:Now correctly write 0/1 port names
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SHA3-256: ba8069348b2fd067e5b22f78773d90f9283d94f64879c3fd7e8212b55e066592
User & Date: gawthrop@users.sourceforge.net on 1998-04-03 15:07:20
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Context
1998-04-04
07:29:26
SS now only port component check-in: a6112d8506 user: gawthrop@users.sourceforge.net tags: origin/master, trunk
1998-04-03
15:07:20
Now correctly write 0/1 port names check-in: ba8069348b user: gawthrop@users.sourceforge.net tags: origin/master, trunk
14:02:50
Added 0 and 1 to list of possible ports check-in: 177672449d user: gawthrop@users.sourceforge.net tags: origin/master, trunk
Changes
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Modified mttroot/mtt/bin/trans/awk/rbg_fig2m.awk from [d269724ade] to [2778def986].

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# Copyright (c) P.J.Gawthrop, 1996.

###############################################################
## Version control history
###############################################################
## $Id$
## $Log$



## Revision 1.23  1998/02/01 18:37:41  peterg
## Don't print irritating warnings about ports listed in lbl files.
##
# Revision 1.22  1997/08/09  14:42:39  peterg
# Added underscore to port regexp
#
## Revision 1.21  1997/08/04 12:49:17  peterg








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# Copyright (c) P.J.Gawthrop, 1996.

###############################################################
## Version control history
###############################################################
## $Id$
## $Log$
## Revision 1.24  1998/04/03 14:02:50  peterg
## Added 0 and 1 to list of possible ports
##
## Revision 1.23  1998/02/01 18:37:41  peterg
## Don't print irritating warnings about ports listed in lbl files.
##
# Revision 1.22  1997/08/09  14:42:39  peterg
# Added underscore to port regexp
#
## Revision 1.21  1997/08/04 12:49:17  peterg
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# A port component is SS,0 or 1 followed by : followed by a port string
  isa_port_component = 0;
  if (match(str, delimiter)) {
    split(str,a,delimiter);
    isa_port_component = (match(a[1], port_component_regexp))&&
      (match(a[2], port_regexp)>0)
      }

# It must also be specified at depth 0
  isa_port_component = isa_port_component && (depth==0);

# A component is a plain or a port component
  isa_component = isa_plain_component||isa_port_component;

# Coordinates in fields 12 & 13
  x_coord = $12;
  y_coord = $13;

# Do the ports
  if (isa_port) {
    i_port++;
    port_name = str;
    ports[i_port] = sprintf("%s %s %s", x_coord, y_coord, port_name);
  }

# Do the port components
  if (isa_port_component) {
    i_port_component++;

    # Port number is the bit between the []
    port_label  = substr(a[2],2,length(a[2])-2);
    x_port[i_port_component] = x_coord;
    y_port[i_port_component] = y_coord;
    info_port[i_port_component] = fig_info();
    port_labels[i_port_component] = port_label;

  }

# Do the plain components
  if (isa_plain_component) {
    i_text++;

# Get repetitions (if any)








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# A port component is SS,0 or 1 followed by : followed by a port string
  isa_port_component = 0;
  if (match(str, delimiter)) {
    split(str,a,delimiter);
    isa_port_component = (match(a[1], port_component_regexp))&&
      (match(a[2], port_regexp)>0)
      }

# It must also be specified at depth 0
  isa_port_component = isa_port_component && (depth==0);

# A component is a plain or a port component
  isa_component = isa_plain_component||isa_port_component;

# Coordinates in fields 12 & 13
  x_coord = $12;
  y_coord = $13;

# Do the ports
  if (isa_port) {
    i_port++;
    port_name = str;
    ports[i_port] = sprintf("%s %s %s", x_coord, y_coord, port_name);
  }

# Do the port components
  if (isa_port_component) {
    i_port_component++;
    type = a[1];
    # Port name is the bit between the []
    port_label  = substr(a[2],2,length(a[2])-2);
    x_port[i_port_component] = x_coord;
    y_port[i_port_component] = y_coord;
    info_port[i_port_component] = fig_info();
    port_labels[i_port_component] = port_label;
    comp_type[port_label] = type;
  }

# Do the plain components
  if (isa_plain_component) {
    i_text++;

# Get repetitions (if any)
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  printf("rcomponents = [") >> b_file;
  j = 0;


# Do the port components, in order of appearance, first
  for (i = 1; i <= i_port_component; i++) {

    port_type = "SS";
    name = sprintf("[%s]", port_labels[i]);
    cr   = "MTT_port";
    arg  = i;

    if (length(x_port[i])==0)
      printf(warning_p);
    else {
      j++;








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  printf("rcomponents = [") >> b_file;
  j = 0;


# Do the port components, in order of appearance, first
  for (i = 1; i <= i_port_component; i++) {
    name = sprintf("[%s]", port_labels[i]);
    port_type = comp_type[port_labels[i]];
print i, port_labels[i], name, port_type
    cr   = "MTT_port";
    arg  = i;

    if (length(x_port[i])==0)
      printf(warning_p);
    else {
      j++;
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MTT: Model Transformation Tools
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