Overview
Comment:Corrected vector junction expansion
Downloads: Tarball | ZIP archive
Timelines: family | ancestors | descendants | both | origin/master | trunk
Files: files | file ages | folders
SHA3-256: c78537a01698ad33b6447f006b2359c3641f892fb637946fe7e22929d4821ab6
User & Date: gawthrop@users.sourceforge.net on 1999-10-18 22:41:41.000
Other Links: branch diff | manifest | tags
Context
1999-10-19
00:05:44
Now defaults junction ports when only one specified (for vector junctions) check-in: 3168d5f598 user: gawthrop@users.sourceforge.net tags: origin/master, trunk
1999-10-18
22:41:41
Corrected vector junction expansion check-in: c78537a016 user: gawthrop@users.sourceforge.net tags: origin/master, trunk
07:42:41
Initial revision check-in: 73cb1329cb user: gawthrop@users.sourceforge.net tags: origin/master, trunk
Changes
Unified Diff Ignore Whitespace Patch
Modified mttroot/mtt/bin/trans/m/write_abg.m from [ed7dfd3c25] to [c42598280f]. 
1
2
3
4
5
6
7



8
9
10
11
12
13
14

function write_abg(system_name,bonds,connections,n_vector_bonds);

###############################################################
## Version control history
###############################################################
## $Id$
## $Log$



## Revision 1.6  1998/09/02 11:35:20  peterg
## Removed port.index field
##
## Revision 1.5  1998/09/02 10:30:30  peterg
## Now writes out list of ports ans list of subsystems.
## These ordereded lists determine the order of processing of ports ans
## subsystems.








>
>
>








1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17

function write_abg(system_name,bonds,connections,n_vector_bonds);

###############################################################
## Version control history
###############################################################
## $Id$
## $Log$
## Revision 1.7  1999/10/18 05:16:51  peterg
## Now vectorises 0 and 1 junctions !!
##
## Revision 1.6  1998/09/02 11:35:20  peterg
## Removed port.index field
##
## Revision 1.5  1998/09/02 10:30:30  peterg
## Now writes out list of ports ans list of subsystems.
## These ordereded lists determine the order of processing of ports ans
## subsystems.
︙︙
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82






83







84
85

86


87
88
89
90
91
92
93

    eval(["[comp_type, name, cr, arg, repetitions] = ", system_name, "_cmp(i);"]);
    c = nozeros(connections(i,:));# Connections to this component
    m = length(c);		# Number of connections

    ## Vectorise junctions?
    n_bonds = n_vector_bonds(i);
    if strcmp(comp_type,"0")||strcmp(comp_type,"1")
            n_extra = m/n_bonds;
	    m_extra = n_bonds;
    else
      n_extra = 1;
      m_extra = m;
    endif
      
    if index(name,"[")==0	# Not a port
      for i_extra = 1:n_extra;

	if i_extra>1		# Extras
	  new_name = sprintf("%sv%i", name,i_extra);
	else
	  new_name = name;
	endif
	
	SubsystemList = [SubsystemList; new_name];
	fprintf(fid,"\n# Component %s\n", new_name);
	fprintf(fid,Sformat,system_name,new_name,"type",comp_type);
	fprintf(fid,Sformat,system_name,new_name,"cr",cr);
	fprintf(fid,Sformat,system_name,new_name,"arg",arg);
	fprintf(fid,Iformat,system_name,new_name,"repetitions",repetitions);
	fprintf(fid,Iformat,system_name,new_name,"status",-1);
	
	##Connections
	fprintf(fid,Cformat,system_name,new_name);






	for j=1:m_extra







	  k = j+(i_extra-1)*m_extra;
      	  fprintf(fid,"%i ", c(k) );

	endfor;


	fprintf(fid,"];\n");
      endfor
    else			# Its a port
      name=name(2:length(name)-1); # Strip []
      ch=name(1);		# First char of name
      if (ch>="0")&&(ch<="9")	# Its a numeral
      	name=["mttp",name];	# prefix by mttp








|
|

|
|



|

|
|














>
>
>
>
>
>
|
>
>
>
>
>
>
>
|
|
>
|
>
>








53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112

    eval(["[comp_type, name, cr, arg, repetitions] = ", system_name, "_cmp(i);"]);
    c = nozeros(connections(i,:));# Connections to this component
    m = length(c);		# Number of connections

    ## Vectorise junctions?
    n_bonds = n_vector_bonds(i);
    if strcmp(comp_type,"0")||strcmp(comp_type,"1")
            n_vector = m/n_bonds;
	    m_vector = n_bonds;
    else
      n_vector = 1;
      m_vector = m;
    endif
      
    if index(name,"[")==0	# Not a port
      for i_vector = 1:n_vector;

	if i_vector>1		# Extras
	  new_name = sprintf("%sv%i", name,i_vector);
	else
	  new_name = name;
	endif
	
	SubsystemList = [SubsystemList; new_name];
	fprintf(fid,"\n# Component %s\n", new_name);
	fprintf(fid,Sformat,system_name,new_name,"type",comp_type);
	fprintf(fid,Sformat,system_name,new_name,"cr",cr);
	fprintf(fid,Sformat,system_name,new_name,"arg",arg);
	fprintf(fid,Iformat,system_name,new_name,"repetitions",repetitions);
	fprintf(fid,Iformat,system_name,new_name,"status",-1);
	
	##Connections
	fprintf(fid,Cformat,system_name,new_name);
	## Each vector junction has n*m bonds
	## n - dimension of vector
	## m - number of bonds
	
	## The first m bonds (in c) correspond to the first vector element
	if i_vector==1		
	  for j=1:m_vector
      	    fprintf(fid,"%i ", c(j) );
	  endfor
	  ## The next block of n-1 bonds are the first bonds on vector elements 2,3 ...
	  ## followed by a  block of n-1 bonds being the second bonds on vector elements 2,3 ...
	  ## etc
	else	
	  k = m_vector+i_vector-1; # index of first bond at level i_vector
	  for j=1:m_vector
      	    fprintf(fid,"%i ", c(k) );
	    k = k + n_vector-1;
	  endfor
	endif
	
	fprintf(fid,"];\n");
      endfor
    else			# Its a port
      name=name(2:length(name)-1); # Strip []
      ch=name(1);		# First char of name
      if (ch>="0")&&(ch<="9")	# Its a numeral
      	name=["mttp",name];	# prefix by mttp
︙︙
MTT: Model Transformation Tools
[ GitHub | SourceHut | Sourceforge | Fossil RSS ]