Model {
Name "mdl"
Version 4.00
SampleTimeColors off
LibraryLinkDisplay "all"
WideLines off
ShowLineDimensions on
ShowPortDataTypes off
ShowStorageClass off
ExecutionOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Mon May 20 13:21:21 2002"
Creator "geraint"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "geraint"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Tue Jun 18 18:49:28 2002"
ModelVersionFormat "1.%<AutoIncrement:14>"
ConfigurationManager "None"
SimParamPage "Solver"
StartTime "0.0"
StopTime "10.0"
SolverMode "Auto"
Solver "ode45"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "auto"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
LimitDataPoints on
MaxDataPoints "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
SingleTaskRateTransMsg "none"
MultiTaskRateTransMsg "error"
IntegerOverflowMsg "warning"
CheckForMatrixSingularity "none"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
LinearizationMsg "none"
VectorMatrixConversionMsg "none"
SfunCompatibilityCheckMsg "none"
BlockPriorityViolationMsg "warning"
ArrayBoundsChecking "none"
ConsistencyChecking "none"
ZeroCross on
Profile off
SimulationMode "normal"
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
TLCProfiler off
TLCDebug off
TLCCoverage off
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock off
OptimizeBlockIOStorage on
BufferReuse on
ParameterPooling on
BlockReductionOpt on
RTWExpressionDepthLimit 5
BooleanDataType off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "mdl"
Location [61, 487, 356, 620]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Inport
Name "In1"
Position [25, 43, 55, 57]
Port "1"
LatchInput off
DataType "double"
SignalType "real"
Interpolate on
}
Block {
BlockType SubSystem
Name "MTT Model\n<mtt_model_name>"
Ports [1, 1]
Position [100, 20, 140, 80]
ForegroundColor "blue"
BackgroundColor "lightBlue"
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
System {
Name "MTT Model\n<mtt_model_name>"
Location [55, 494, 1018, 766]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [590, 203, 620, 217]
Port "1"
LatchInput off
DataType "double"
SignalType "real"
Interpolate on
}
Block {
BlockType "S-Function"
Name "MTT Model Inputs"
Ports [1, 1]
Position [390, 59, 565, 91]
BackgroundColor "lightBlue"
DropShadow on
FunctionName "<mtt_model_name>_sfun_input"
PortCounts "[]"
SFunctionModules "''"
Port {
PortNumber 1
Name "MTT Model Inputs: MTTU"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType "S-Function"
Name "MTT Plant Model"
Ports [1, 2]
Position [65, 61, 250, 199]
BackgroundColor "lightBlue"
DropShadow on
FunctionName "<mtt_model_name>_sfun"
PortCounts "[]"
SFunctionModules "''"
Port {
PortNumber 1
Name "MTT Model States: MTTX"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
Port {
PortNumber 2
Name "MTT Model Outputs: MTTY"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Memory
Name "Memory"
Position [870, 80, 900, 110]
X0 "0"
InheritSampleTime off
RTWStateStorageClass "Auto"
}
Block {
BlockType Memory
Name "Memory1"
Position [860, 175, 890, 205]
X0 "0"
InheritSampleTime off
RTWStateStorageClass "Auto"
}
Block {
BlockType "S-Function"
Name "S-Function"
Ports [4, 2]
Position [710, 47, 840, 238]
BackgroundColor "lightBlue"
DropShadow on
FunctionName "<mtt_model_name>_sfun_interface"
PortCounts "[]"
SFunctionModules "''"
}
Block {
BlockType Outport
Name "Out1"
Position [905, 183, 935, 197]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
Name "MTT Model States: MTTX"
Labels [2, 0]
SrcBlock "MTT Plant Model"
SrcPort 1
Points [0, 0; 105, 0]
Branch {
Points [0, -20]
DstBlock "MTT Model Inputs"
DstPort 1
}
Branch {
Points [0, 25]
DstBlock "S-Function"
DstPort 2
}
}
Line {
Name "MTT Model Outputs: MTTY"
Labels [1, 0]
SrcBlock "MTT Plant Model"
SrcPort 2
DstBlock "S-Function"
DstPort 3
}
Line {
Name "MTT Model Inputs: MTTU"
Labels [1, 0]
SrcBlock "MTT Model Inputs"
SrcPort 1
DstBlock "S-Function"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "S-Function"
DstPort 4
}
Line {
SrcBlock "S-Function"
SrcPort 1
DstBlock "Memory"
DstPort 1
}
Line {
SrcBlock "Memory"
SrcPort 1
Points [0, -55; -855, 0]
DstBlock "MTT Plant Model"
DstPort 1
}
Line {
SrcBlock "Memory1"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "S-Function"
SrcPort 2
DstBlock "Memory1"
DstPort 1
}
}
}
Block {
BlockType Outport
Name "Out1"
Position [185, 43, 215, 57]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "MTT Model\n<mtt_model_name>"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "MTT Model\n<mtt_model_name>"
DstPort 1
}
}
}