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# Copyright (c) P.J.Gawthrop, 1996.
###############################################################
## Version control history
###############################################################
## $Id$
## $Log$
# Revision 1.22 1997/08/09 14:42:39 peterg
# Added underscore to port regexp
#
## Revision 1.21 1997/08/04 12:49:17 peterg
## Modified to use named (as opposed to numbered) ports.
## Generates a list of component ports in the .rbg file.
## As octave handles string vectors properly, the .cmp file format is not
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# Copyright (c) P.J.Gawthrop, 1996.
###############################################################
## Version control history
###############################################################
## $Id$
## $Log$
## Revision 1.23 1998/02/01 18:37:41 peterg
## Don't print irritating warnings about ports listed in lbl files.
##
# Revision 1.22 1997/08/09 14:42:39 peterg
# Added underscore to port regexp
#
## Revision 1.21 1997/08/04 12:49:17 peterg
## Modified to use named (as opposed to numbered) ports.
## Generates a list of component ports in the .rbg file.
## As octave handles string vectors properly, the .cmp file format is not
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# Vector port definitions
isa_PORT = ((match(str, PORT_regexp)>0) && (depth==0));
if (isa_PORT) {
print str
}
# A port component is SS followed by : followed by a port string
isa_port_component = 0;
if (match(str, delimiter)) {
split(str,a,delimiter);
isa_port_component = (exact_match(a[1], "SS"))&&
(match(a[2], port_regexp)>0)
}
# It must also be specified at depth 0
isa_port_component = isa_port_component && (depth==0);
# A component is a plain or a port component
isa_component = isa_plain_component||isa_port_component;
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# Vector port definitions
isa_PORT = ((match(str, PORT_regexp)>0) && (depth==0));
if (isa_PORT) {
print str
}
# A port component is SS,0 or 1 followed by : followed by a port string
isa_port_component = 0;
if (match(str, delimiter)) {
split(str,a,delimiter);
isa_port_component = (match(a[1], port_component_regexp))&&
(match(a[2], port_regexp)>0)
}
# It must also be specified at depth 0
isa_port_component = isa_port_component && (depth==0);
# A component is a plain or a port component
isa_component = isa_plain_component||isa_port_component;
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repetition_regexp = "\\*";
q = "\047";
terminator = "\\001";
component_regexp = "[^0-9a-zA-Z_:\*-]";
port_regexp = "^\[[a-zA-Z0-9_,]*\]";
nonport_regexp = "[a-zA-Z]";
PORT_regexp = "^PORT .*=";
isa_fig_file = 0;
min_line_length = 10;
object = 0;
polyline = 2;
sub_polyline=1;
firm_style = 0;
text = 4;
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repetition_regexp = "\\*";
q = "\047";
terminator = "\\001";
component_regexp = "[^0-9a-zA-Z_:\*-]";
port_regexp = "^\[[a-zA-Z0-9_,]*\]";
nonport_regexp = "[a-zA-Z]";
PORT_regexp = "^PORT .*=";
port_component_regexp = "SS|0|1";
isa_fig_file = 0;
min_line_length = 10;
object = 0;
polyline = 2;
sub_polyline=1;
firm_style = 0;
text = 4;
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