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function [bonds,components,n_vector_bonds] = rbg2abg(name,rbonds,rstrokes,rcomponents,\
				      port_coord,port_name,\
				      infofile,errorfile)

  ## ###############################################################
  ## ## Version control history
  ## ###############################################################
  ## ## $Id$
  ## ## $Log$



  ## ## Revision 1.50  2009/11/02 16:54:03  geraint
  ## ## Replaced deprecated functions from Octave 2.1 for Octave 3.0: is_struct -> isstruct, struct_contains -> isfield, struct_elements -> fieldnames, is_complex -> iscomplex, setstr -> char
  ## ##
  ## ## Revision 1.49  2004/07/22 13:18:02  geraint
  ## ## Minor typo in error message.
  ## ##
  ## ## Revision 1.48  2004/02/19 18:27:47  geraint
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function [bonds,components,n_vector_bonds] = rbg2abg(name,rbonds,rstrokes,rcomponents, ...
				      port_coord,port_name, ...
				      infofile,errorfile)

  ## ###############################################################
  ## ## Version control history
  ## ###############################################################
  ## ## $Id$
  ## ## $Log$
  ## ## Revision 1.51  2012/10/15 19:22:44  geraint
  ## ## mtt_isunique replaces unique which masks a built-in function.
  ## ##
  ## ## Revision 1.50  2009/11/02 16:54:03  geraint
  ## ## Replaced deprecated functions from Octave 2.1 for Octave 3.0: is_struct -> isstruct, struct_contains -> isfield, struct_elements -> fieldnames, is_complex -> iscomplex, setstr -> char
  ## ##
  ## ## Revision 1.49  2004/07/22 13:18:02  geraint
  ## ## Minor typo in error message.
  ## ##
  ## ## Revision 1.48  2004/02/19 18:27:47  geraint
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	      out_bonds++;
	      port_name_i = "out";
	    endif
	    
	  elseif (unlabelled_ports==2)
	    if port_direction>0
	      if (++in_bonds>1)
		mtt_error(["More than one unlabelled INport on component " \
			   comp_name " (" comp_type ")"],errorfile);
	      else
		port_name_i = "in";
	      end
	    else
	      if (++out_bonds>1)
		mtt_error(["More than one unlabelled OUTport on component " \
			   comp_name " (" comp_type ")"],errorfile);
	      else
		port_name_i = "out";
	      end
	    endif
	    
	  else
	    mtt_error(["More than two unlabelled ports on component " \
		       comp_name " (" comp_type ")"],errorfile);
          endif
	  
	  mtt_info(["Defaulting port name [" port_name_i "]\t on component " \
		    comp_name " (" comp_type ")" ],infofile);
	  port_name = [port_name; ["[" port_name_i "]"]];	# add to list
	  [port_name_index,junk] = size(port_name); # the corresponding
				# index
	  port_bond(port_name_index,:) = signed_bond; # add to port bond
	else  
	  port_name_i = mtt_strip_name(port_name(port_name_index,:))
	  ## port_name_i = deblank(port_name(port_name_index,:));
	  ## port_name_i = port_name_i(2:length(port_name_i)-1) # strip []
	endif
	
	
	## Replace by alias -- if any
    	eval( ["alias = ", comp_type, '_alias';]); # Get aliases
    	if isstruct(alias)		# are there any aliases
          if isfield(alias,port_name_i) # Is this an alias?
	    eval(["new_port_name_i = alias.",port_name_i]);
	    mtt_info(["Aliasing name [" port_name_i "]\t on component " \
		      comp_name " (" comp_type ")\t to [" new_port_name_i "]"],infofile);
	    port_name = replace_name(port_name, \
				     ["[",new_port_name_i,"]"], \
				     port_name_index);
	  endif
	  
      	endif
	
      endfor
      
    endif
    
  endfor
  
  ## At this point, every port should be labeled (port_name) and \
  ## associated with a bond (port_bond).
  disp("--- Completed portnames and the corresponding bonds ---")
  port_name, port_bond


  ## Deduce causality from the strokes (if any) and create the list of bonds
  causality = zeros(n_bonds,2);







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	      out_bonds++;
	      port_name_i = "out";
	    endif
	    
	  elseif (unlabelled_ports==2)
	    if port_direction>0
	      if (++in_bonds>1)
		mtt_error(["More than one unlabelled INport on component " ...
			   comp_name " (" comp_type ")"],errorfile);
	      else
		port_name_i = "in";
	      end
	    else
	      if (++out_bonds>1)
		mtt_error(["More than one unlabelled OUTport on component " ...
			   comp_name " (" comp_type ")"],errorfile);
	      else
		port_name_i = "out";
	      end
	    endif
	    
	  else
	    mtt_error(["More than two unlabelled ports on component " ...
		       comp_name " (" comp_type ")"],errorfile);
          endif
	  
	  mtt_info(["Defaulting port name [" port_name_i "]\t on component " ...
		    comp_name " (" comp_type ")" ],infofile);
	  port_name = [port_name; ["[" port_name_i "]"]];	# add to list
	  [port_name_index,junk] = size(port_name); # the corresponding
				# index
	  port_bond(port_name_index,:) = signed_bond; # add to port bond
	else  
	  port_name_i = mtt_strip_name(port_name(port_name_index,:))
	  ## port_name_i = deblank(port_name(port_name_index,:));
	  ## port_name_i = port_name_i(2:length(port_name_i)-1) # strip []
	endif
	
	
	## Replace by alias -- if any
    	eval( ["alias = ", comp_type, '_alias';]); # Get aliases
    	if isstruct(alias)		# are there any aliases
          if isfield(alias,port_name_i) # Is this an alias?
	    eval(["new_port_name_i = alias.",port_name_i]);
	    mtt_info(["Aliasing name [" port_name_i "]\t on component " ...
		      comp_name " (" comp_type ")\t to [" new_port_name_i "]"],infofile);
	    port_name = replace_name(port_name, ...
				     ["[",new_port_name_i,"]"], ...
				     port_name_index);
	  endif
	  
      	endif
	
      endfor
      
    endif
    
  endfor
  
  ## At this point, every port should be labeled (port_name) and ...
  ## associated with a bond (port_bond).
  disp("--- Completed portnames and the corresponding bonds ---")
  port_name, port_bond


  ## Deduce causality from the strokes (if any) and create the list of bonds
  causality = zeros(n_bonds,2);
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    [n_comp_ports,m_comp_ports] = size(port_list);
    subport_list="";
    for p=1:n_comp_ports		# Expand any vector ports
      [subport,n_sub] = split_port(port_list(p,:), ','); # Find the components
				# of the vector port
      if n_sub>1
	mtt_info(sprintf("Expanding vector port %s of component type %s",\
			 port_list(p,:), comp_type, infofile));	
      endif
      
      subport_list = [subport_list; subport];
    endfor
    
    port_list = subport_list;	# Set the expanded port list.







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    [n_comp_ports,m_comp_ports] = size(port_list);
    subport_list="";
    for p=1:n_comp_ports		# Expand any vector ports
      [subport,n_sub] = split_port(port_list(p,:), ','); # Find the components
				# of the vector port
      if n_sub>1
	mtt_info(sprintf("Expanding vector port %s of component type %s", ...
			 port_list(p,:), comp_type, infofile));	
      endif
      
      subport_list = [subport_list; subport];
    endfor
    
    port_list = subport_list;	# Set the expanded port list.
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	mtt_error(['Component ', comp_name, ' (', comp_type, ') has no labeled ports'], errorfile); 
      endif
      
      ##Write out the signed bond list in the correct order
      unsorted_port_list
      [n_list,m_list] = size(unsorted_port_list);
      if n_list!=n_comp_bonds
	error(sprintf("Component %s (%s) has %i bonds but %i port labels",\
		      comp_name, comp_type, n_comp_bonds, n_list))
      endif

      for j = 1:n_comp_bonds
	j
	name_k = unsorted_port_list(j,:)
	k = name_in_list(name_k, port_list);







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	mtt_error(['Component ', comp_name, ' (', comp_type, ') has no labeled ports'], errorfile); 
      endif
      
      ##Write out the signed bond list in the correct order
      unsorted_port_list
      [n_list,m_list] = size(unsorted_port_list);
      if n_list!=n_comp_bonds
	error(sprintf("Component %s (%s) has %i bonds but %i port labels", ...
		      comp_name, comp_type, n_comp_bonds, n_list))
      endif

      for j = 1:n_comp_bonds
	j
	name_k = unsorted_port_list(j,:)
	k = name_in_list(name_k, port_list);

MTT: Model Transformation Tools
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