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|Page Name:||Development Strategy|
- Port the GPIA core to run natively on a TileLink TL-UL interconnect.
- Develop the remote-side logic for a ByteLink interconnect. This will let me send read/write byte/half-word/word/double-word requests from the Kestrel-2DX to see if the GPIA is working. This will serve as a surrogate for the final CPU design that I intend.
- Make sure I can toggle LEDs using the debug port interactively from the Kestrel-2DX.
- Port my Serial Interface Adapter to the Kestrel-3.
- Interactively confirm that the serial link works on the Kestrel-3 in loop-back mode.
- Develop final SRAM interface.
- Make sure I can perform basic RAM tests interactively from the Kestrel-2DX.
- Develop a "ROM" system using block RAMs. (from CPU's perspective, it's ROM; from the ByteLink interface, it's RAM.)
- Make sure I can write to and read back from the "ROM" interactively from the Kestrel-2DX.
- Port the KCP53000 to run on the new platform. Fix perf regressions. Use TileLink front-side bus.
- Write first-boot firmware that writes "Hello world" to the SIA or something. Upload it from the Kestrel-2DX.
- Boot the Kestrel-3 for the first time, and hope for the best.