1. Port the GPIA core to run natively on a TileLink TL-UL interconnect.
1. Develop the remote-side logic for a [ByteLink interconnect](wiki/ByteLink). This will let me send read/write byte/half-word/word/double-word requests from the Kestrel-2DX to see if the GPIA is working. This will serve as a surrogate for the final CPU design that I intend.
1. Make sure I can toggle LEDs using the debug port interactively from the Kestrel-2DX.
1. Port my Serial Interface Adapter to the Kestrel-3.
1. Interactively confirm that the serial link works on the Kestrel-3 in loop-back mode.
1. Develop final SRAM interface.
1. Make sure I can perform basic RAM tests interactively from the Kestrel-2DX.
1. Develop a "ROM" system using block RAMs. (from CPU's perspective, it's ROM; from the ByteLink interface, it's RAM.)
1. Make sure I can write to and read back from the "ROM" interactively from the Kestrel-2DX.
1. Port the KCP53000 to run on the new platform. Fix perf regressions. Use TileLink front-side bus.
1. Write first-boot firmware that writes "Hello world" to the SIA or something. Upload it from the Kestrel-2DX.
1. Boot the Kestrel-3 for the first time, and hope for the best.