GNU GENERAL PUBLIC LICENSE
		       Version 2, June 1991

 Copyright (C) 1989, 1991 Free Software Foundation, Inc.
     59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 Everyone is permitted to copy and distribute verbatim copies
 of this license document, but changing it is not allowed.

			    Preamble

  The licenses for most software are designed to take away your
freedom to share and change it.  By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users.  This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
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  When we speak of free software, we are referring to freedom, not
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  To protect your rights, we need to make restrictions that forbid
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These restrictions translate to certain responsibilities for you if you
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  For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
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  We protect your rights with two steps: (1) copyright the software, and
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  Finally, any free program is threatened constantly by software
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  The precise terms and conditions for copying, distribution and
modification follow.

		    GNU GENERAL PUBLIC LICENSE
   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION

  0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License.  The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language.  (Hereinafter, translation is included without limitation in
the term "modification".)  Each licensee is addressed as "you".

Activities other than copying, distribution and modification are not
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running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.

  1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.

You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.

  2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:

    a) You must cause the modified files to carry prominent notices
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    b) You must cause any work that you distribute or publish, that in
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    part thereof, to be licensed as a whole at no charge to all third
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    c) If the modified program normally reads commands interactively
    when run, you must cause it, when started running for such
    interactive use in the most ordinary way, to print or display an
    announcement including an appropriate copyright notice and a
    notice that there is no warranty (or else, saying that you provide
    a warranty) and that users may redistribute the program under
    these conditions, and telling the user how to view a copy of this
    License.  (Exception: if the Program itself is interactive but
    does not normally print such an announcement, your work based on
    the Program is not required to print an announcement.)

These requirements apply to the modified work as a whole.  If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works.  But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.

Thus, it is not the intent of this section to claim rights or contest
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exercise the right to control the distribution of derivative or
collective works based on the Program.

In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.

  3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:

    a) Accompany it with the complete corresponding machine-readable
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The source code for a work means the preferred form of the work for
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If distribution of executable or object code is made by offering
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compelled to copy the source along with the object code.

  4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License.  Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
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  5. You are not required to accept this License, since you have not
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It is not the purpose of this section to induce you to infringe any
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implemented by public license practices.  Many people have made
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This section is intended to make thoroughly clear what is believed to
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  8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
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the limitation as if written in the body of this License.

  9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time.  Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.

Each version is given a distinguishing version number.  If the Program
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either of that version or of any later version published by the Free
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  10. If you wish to incorporate parts of the Program into other free
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			    NO WARRANTY

  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
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		     END OF TERMS AND CONDITIONS

	    How to Apply These Terms to Your New Programs

  If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.

  To do so, attach the following notices to the program.  It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.

    <one line to give the program's name and a brief idea of what it does.>
    Copyright (C) <year>  <name of author>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA


Also add information on how to contact you by electronic and paper mail.

If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:

    Gnomovision version 69, Copyright (C) year  name of author
    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
    This is free software, and you are welcome to redistribute it
    under certain conditions; type `show c' for details.

The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License.  Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.

You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary.  Here is a sample; alter the names:

  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
  `Gnomovision' (which makes passes at compilers) written by James Hacker.

  <signature of Ty Coon>, 1 April 1989
  Ty Coon, President of Vice

This General Public License does not permit incorporating your program into
proprietary programs.  If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library.  If this is what you want to do, use the GNU Library General
Public License instead of this License.

Tue Jun  1 15:42:34 CDT 2004

  Initial release 200a of Cver with Verilog 2001 Support.  

  This is a beta release.  See file NEW.CVER.2001.RELEASE.NOTES
  for more information.  All bug fixes in 110i of Thu May 27 16:06:09
  CDT 2004 are in 200a.

Fri Jun 18 13:30:16 CDT 2004

  Release 200b made with fixes to compiler directives to allow correct
  compilation on all supported platforms.  200a contained some incorrectly 
  placed compiler directives. Cygwin's lack of support for d_type in 
  dirent structs was corrected using stat().

Wed Aug 18 12:32:10 CDT 2004

  Bug fix Release 2.00c.  2.00c is much more stable than 2.00b.

1. Fixed wrong syntax error when @* was used instead of @(*).

2. Changed port declaration code for both new ANSI style port headers
   and old style port headers to add the completed port definition concept,
   i.e. new style port declarations are completed in the header.  Now,
   for old style declarations, once the range and/or net type are given, the
   port's definition is completed, and it is a syntax error to redeclare
   the port.

   There is still a possible minor problem because the wire declaration
   continuous assignment form can't be used with new ANSI style port
   declarations as specified in LRM.  Only assign keyword is allowed for
   port wire continuous assigns.

3. Fixed problem with tf_strgetp.  It was wrongly trimming the input
   string's leading zeros.       

4. Removed incorrect bit and part select warning when @(*) was used and
   the implicit event list needs to build bit part select elements where
   ranges where not <high>:0 form.

5. Fixed problem with both delay controls and event controls in modules
   that require splitting because of per instance pound or def params.
   The new implicit event control and event control list code would
   sometimes overwrite the delay or event control expression with a 
   different wrong expression.  Main symptom was that delays controls
   delayed for the wrong amount of time in 200b.

6. Fixed incorrect handling of the new Verilog 2001 file descriptors
   in the vpi_ file I/O routines. 

Thu Sep 16 09:50:08 CDT 2004

  Bug fix Release 2.00d.  Some bugs in signed wide arithmetic fixed.

1. Fixed bug in wide signed operations when one operand was signed
   and another was unsigned (or 0).  The wide negate routines were
   incorrectly setting bits higher than 32.

2. Fixed bug in hold and hold part of setuphold.  Was wrongly
   emitting timing check for 0 width pulse.

3. Fixed bug in printing of signed values.  Smallest negative number
   was printing as "-0" instead of its negative value.

4. Fixed bug that caused "./[file]" form when used in `include directives 
   to be treated as absolute path.  It is now correctly treated as
   a relative path.
 
Tue Oct 12 14:52:37 CDT 2004

  Major release that adds more Verilog 2001 features, fixes problems
related to new FPGA libraries that use Verilog 2001 features, and changes
to explicitly sized C types so compile and run in 32 bit mode works
on 64 bit Linux systems.

1. Added support for initializing variable declaration assignments (see 2001
   LRM section 6.2.1).  Example is: "integer i = 3;".   Following the LRM
   the assignment is made at the beginning of time 0, so the initial value
   will not be passed to declaration constructs until time 0.

2. Fixed bug in wider than 32 bit arithmetic right shift.  This bug was
   causing new FPGA designs using wide signed libraries to get wrong answers.

3. Changed so that all types used in Cver source contain their explicit
   size, i.e. int32, word32, word64 etc.  Change allows Cver to compile
   and run in 32 bit mode on 64 bit Linux systems.

4. Changed behavior of unsized number widening to follow Verilog 2001.
   Now instead of widening unsized and unsigned constants where the high
   order bit is x/z to 32 bits of x/z and then zeroing any high bits,
   the number is x/z extended to the size of the expression containing
   the number.  See Note at the bottom of the first page of section 2.5.1.
   for discussion of the change.  This change is not backward compatible
   with Verilog 1995 so if needed, we could put in a switch to turn it off.

5. Fixed bug in signed mult and add and other binary operators whose
   result width is determined by the operands.  The operation was wrongly
   being evaluated as unsigned.

6. Constant folding was wrongly removing signs.

7. Multi-word widening was sometimes not sign extending or wrongly setting
   some bits to x/z.  For very wide vector sign extends, the widening
   would also sometimes core dump.  This happened for both signed and
   unsigned widening.

8. Fix bug in timing checks that was causing spurious and wrong extra 
   timing violations to be detected and printed.  Problem was that
   sometimes the data event was being recorded as the reference event.
   It happened when a second data event edge occurred within on time tick.

9. Fixed parameter problem when a per instance value was set by a pound
   or defparam and a design contained many constants.  The symptom was
   a core dump during the second elaboration pass.

Thu Feb  3 14:30:50 CST 2005

  Minor release that fixes a a few problems involving not matching the LRM
  (and other simulators).  Also a few changes to simplify code.

1. Rewrote acc_next_load PLI routine algorithm to better match XL.  This
   acc_ PLI routines requires matching XL port collapsing algorithm.  The new
   version handles vectors and part selects better.

2. Added support for function and task references that are upward relative,
   but do not have any module name qualifier.  This is required by the LRM.
   Result is that using a function or task name before declaration
   causes searching both declarations later in the given module and
   all function declarations in every declared module.  The scope rules are
   then used to select the declaration in the current scope if declared later
   or the the first declaration in a module above the current instance in the
   instance tree.

3. Fixed bug in $dumpvars.  When the scope form of $dumpvars was used,
   an extra $upscope was generated at the end.

4. Fixed problem with pound parameter over-rides for parameters that
   were assigned values of other parameters in the parameter definition 
   statement.  The over-riding parameter was not inhibiting assignments
   when a right hand side parameter was changed.

5. Fixed bug that sometimes caused internal error when printing hierarchical
   part select names using PLI print routines.

6. Fixed wrong error message when complex edge expressions were used
   in modules that were resolved from library or config processing.

Mon Feb 28 12:47:20 CST 2005

  Minor release that mainly fixes a problem that caused some designs
using Xilinx libraries to leak memory. 

1. Fixed problem with shared constant table that caused non blocking 
   assignments with left hand side variable indices to continually
   allocate new constant indices during simulation.  Unfortunately,
   this problem occurs in Xilinx libraries.  Memory leak would eventually
   cause correct designs to run out of memory.

2. Fixed some memory allocation and variable initialization problems that
   caused configs to incorrectly fail.

3. Fixed bug in vpi_ that results in incorrect error messages (and 
   incorrect behavior) when bits of a vector were forced or released using 
   vpi_.  Problem was a wrong error when vpi_ is used to force or release
   anything but an entire vector.

4. Fixed problem with unary not (~) not propagating left hand side
   width down to operands of unary not following LRM rule.  This example
   was previously not evaluating the ~ operator using left hand side
   context "cg = ~(a << b);" 

Tue Jul  5 13:53:17 CDT 2005

  Major release 2.11a that hopefully fixes the problems simulating Xilinx
libraries.  A number of problems that resulted in core dumps involving the
combination of pound params and defparams are fixed.  Arrays of instances
and gates had a significant problem that is fixed.  The non blocking
scheduling algorithm has been changed to process non blocking events
after all #0 events are processed following XL.  

1. Changed the non blocking assignment algorithm to process all non blocking
   assignments only after all #0 events have been processed.  Use the
   new +no_separate_nb_queue to match old Cver behavior that combined
   #0 and non blocking events into the same queue.

2. Combinations of defparams and pound params often did not work but instead 
   core dumped.  The Xilinx library used the pattern that caused the error.
   Cver parameter handling should now be more solid.

3. Fixed a number of signed arithmetic bugs.   Most bugs involved signed
   shift or multiply.

4. Implicit event control (@*) sometimes core dumped when there were
   no implicit events to add to the event control list in the guarded block.

5. Cver now recognizes and emits an error for generate keyword, but generate
   is not supported still.  Elaboration syncs to the endgenerate keyword
   so at least the rest of a design can be checked for syntax errors. 

6. Arrays of instances core dumped when instances of the module containing
   arrays of instances or gates were used in hierarchical references. 
   The core dump did not occur if realloc did not move the memory area.
   Arrays of instances and gates should now work.

7. Declaration of local events in tasks and named blocks did not work.

8. Continuous assigns with right hand side concatenates that needed widening
   resulted in widening to z instead of 0.

9. `include `[macro] now works.

==========================================
Tue May 29 20:08:56 EDT 2007

  Major release 2.12a with bug fixes and some new features.  This documents
bug fixes and new features not included in the new commerical CVC compiler.

1. Added support for localparam.  Needed to run some Xilinx libraries.

2. Fixed problem with initial values of driven wires not matching XL.
   Cver previously always initialized wires to 'z'.  Now wires with
   drivers are initialized to 'x' following XL and wires with no
   drivers are initialized to 'z'.  This change eliminated a number of
   extra and wrong edges at time 0.

3. Fixed part select bug where a change was recorded but the change
   really did not happen.  This resulted in extra wrong edges in
   dumpvars files and $monitor output.

4. Changed $random functionality to match XL.  Now $random and
   $random([seed]); use independent pseudo random sequences.  Previously,
   mixing the non seed and seed forms changed the sequence.  When
   $random is called with a [seed] argument, the global seed is not
   changed.

5. Fixed problem with PLI 1.0 tf_propagate routine.  The assigned
   user passed value's width was wrong (too narrow).

6. Rewrote the vpi_ call back code to work more rationally.  Previously
   when a cbValueChange call back was removed (using vpi_remove_cb) inside
   the user C code callback service routine, Cver core dumped.  This is 
   now allowed and works.  It is also now legal (it has mostly worked in the
   past) to assign a new value to the net that caused the call back in the
   change routine that processes the net change.  The new change value will
   not cause another cbChangeValue callback.  The Cver extension to allow
   users to turn on and off call backs without removing the call back
   works as before and is allowed in the user C code that processes the
   callback.

7. There was a bug in stren model port assignments (except for inouts)
   when the port sink left hand side was wider than the right hand
   side.  The required strength widening by adding z's often did not
   happen, or the amount of widening was too narrow.

8. Previously following old XL, Cver did not allow vpi_put_value to
   array words (vpiMemoryWord).  That access path is now supported.

9. Fixed bug that caused core dumping when $readmemb or $readmemh were
   used to read wide memories. 

10. Fixed problem that resulted in core dump with $fclose when designs used
    both new stdio type File I/O and old file descriptor 32 bit mask I/O. 

11. Fixed problem when time values were converted to reals in complex
    expressions.  The conversion was producing the wrong real value.

12. Legal Verilog code "always @({sig1,sig2,sig3}) ..."  now runs.  Previously,
    a wrong syntax error was emitted.  It is the same as
    "always @(sig1, sig2, sig3) ..." or always @(sig1 or sig2 or sig3) ...".
   
13. Repeat form right hand side delay controls inside a block with a 
    guarding normal delay control would sometimes core dump or not delay
    the right amount of time.  Something like this would fail:

     @(clk) r = repeat (2) @(clk) r + 1;

14. Changed behavior of parallel (=>) path delays to not emit an error
    when the source and destination of a delay path had different widths.
    Now Cver does not emit an error for "(posedge aclr => dataout) = <delay>;"
    when dataout is vector.  The path delay is only put on the low bit.
    We think this should be an error because in this case there will be
    no path delay on the higher bits.  The path should use the full delay
    form (*>) so that a delay is put on every bit of the path destination
    bus.  The change was needed because Altera libraries use the parallel
    path delay form for this case.

15. Fixed problem with cross module reference delay controls.
    Something like @(i1.regs) would sometime try to access regs in the
    referencing module rather than in the defining module.

16. Fixed bug involving interaction between value change call backs and
    $dumpvars.  If within one time tick, first a value change call back
    was registered and then dump vars was turned on for the same variable,
    Cver would core dump.

17. Fixed many more new bugs involving signed operators especially signed
    shifts.  There are too many fixes to describe in detail.

18. $dumpvars dump file was sometimes wrong.  If high bit was x or z would 
    wrongly propagate a 0 to the result.

19. Fixed a bug involving the interaction between arrays of gates and
    cross module references.

20. If you are using +no_separate_nb_queue, you should stop using it because
    it has been deprecated and will be removed soon. 

          INSTRUCTIONS FOR BUILDING AND TESTING GPL CVER


  Building Cver is very easy because it is a self contained application
program with very little dependence on any OS environment.  Currently,
Cver is build using pre-made make files for X86 Linux, Sparc Solaris
and Apple Mac OSX, but we are working on changing build process to using
GNU configure command.

A. MAKING CVER BINARY

  To make GPL Cver,  change directory to src directory and type:

   make -f [name of makefile] all

Where [name of makefile] is one of makefile.lnx, makefile.sparc-gcc,
or makefile.osx.  

    A number of warning messages will be output by gcc. The warning are
expected because the -Wall option in turned on in the make files by
default.  You can eliminate the warnings by removing -Wall from the
CFLAGS option list.

    Because GPL Cver uses dymamic linking of user PLI routines
(+loadpli1= and +loadvpi= option), GPL Cver consists of only one executable
called cver.

    The files in the pli_incs directory are the files supplied as part
of the IEEE P1364 standard and are required for compiling GPL Cver and
for building user dynamic link libraries.  The pre-built make files
access the pli_inc include files by using relative path references (-I
gcc and ld options).   In order to develop user PLI dynamic libraries,
either copy the include files in the pli_incs directory to /usr/include
or provide a -I<path name to pli_incs directory> as part of CFLAGS
argument lists passed to gcc and ld.

    When make completes, the cver binary will be in the bin
directory.  You should copy cver into a directory that is on your PATH OS
environment variable list such as /usr/local/bin.

    See the README file in the src directory for instructions on how to make
a debugging version of cver (compiled with -g flag) and for hints on
modifying make files for other platforms and operating systems.

B. CLEANING UP THE SRC DIRECTORY

   If you make a mistake or want to re-make GPL cver, you can always run

     make -f [name of makefile] clean

This erases all files made by "make all" including the cver binary
in the "bin" directory and the object files in the "objs" directory.

B. RUNNING INSTALLATION TESTS

    We recommend that you next run the various installation tests in
the "tests_and_examples" directory.   You should always run the
basic functionality test in the install.tst directory by executing
the "inst_tst.sh" script.  There should be no diff output messages
printed.  See the README file in the install.tst directory for
more information.  If you plan to use any of the PLI interfaces, or the 
vcddiff VCD output file compare program, you should run the tests in the
appropriate directory in the "tests_and_examples" directory.  The shell
scripts in the installation directories have relative paths names built in,
so you must not change the GPL cver release directory structure before 
running the test shell scripts.  In particular, you must leave cver binary
in the "bin" directory.

     See the README files in each of the install directories for detailed
instructions on running the tests.  The "capacity.tst" directory contains
very large gate level designs.  If you think you have hardware problems,
we suggest you run the large tests in that directory.

     If you are not sure what version of cver you are running.  Execute
the cver command with no arguments and it will print out its version.
Type "cver -h" for a help page of cver options and features.

C. OBTAINING PRECOMPILED CVER BINARY

     Precompiled cver binaries for X86 Linux, Sparc Solaris and Apple
MacOS are available from the GPL cver home page at
http://www.pragmatic-c.com/gpl-cver

  The files in the src, lib, toolbin, examples, doc and man
  directories and any subdirectories thereof are part of GPL Cver.

  GPL Cver is free software; you can redistribute it and/or
  modify it under the terms of version 2 of the GNU General Public
  License as published by the Free Software Foundation.

  GPL Cver is distributed in the hope that it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License
  along with this program so you can know your rights and responsibilities.
  It should be in a file named doc/COPYING. If not, write to the
  Free Software Foundation, Inc., 59 Temple Place Suite 330, Boston, MA
  02111-1307, USA.

RELEASE NOTES FOR VERILOG 2001 BETA FOR PEOPLE TO TRY 

  This directory contains release of a new code base that supports many
  of the Verilog 2001 features as described in IEEE P1364 Verilog 2001
  Language Reference Manual.

  Cver supports the following Verilog 2001/2005 LRM features:

    1) Implements Verilog 2001 signed evaluation algorithm.  Supports signed
       keyword and signed constants plus handles sign extension during
       expression evaluation.

    2) Support for Verilog 2001 config.  Use the +config [config file name] 
       option to specify the library mapping file.  You can place a file
       named lib.map in your current directory, but that is not recommended
       since it will always silently use that file for configuring your
       design. See tests_and_examples/v2001/config for some small examples.

    3) Supports new file io Unix Stdlib stream file input and output
       operations.
   
    5) Supports new module and task port and module parameter header  
       declarations.  Here is an example:


            module test
             #(parameter integer p1 = 5,
               parameter p2 = 7,
               parameter r1 = 7.3
              )

             (
              input [7:0] a,
              input signed [7:0] b, c, d,
              output [7:0] e,
              output signed [7:0] f,g,
              output signed [7:0] h
             ) ;

             task my_task(input a, b, inout c, output signed [15:0] d, e);
              begin
               c = a;
               d = f;
               e= 2*f;
              end
             endtask
            endmodule

    6) Supports Verilog 2001 implicit event forms @(*) and @*.  Also
       supports events lists with comma as substitute for
       event or.  Now (a, b, c) and (a or b or c) are both legal.
       You can see the result of @(*) by running cver with the -c and -d
       options (-c means compile only and -d means dump internal net list).

    7) Added support for localparams.  The localparam keyword is now
       supported.

  Main missing Verilog 2001 features are multi-dimensional arrays and
  generate.

  See tests_and_example/v2001 for a growing directory of verilog 2001 test
  files. 
  

                 PHILOSOPHICAL JUSTIFICATION OF GPL CVER

  We believe strongly that software should be distributed with source. 
  This allows users to study and understand Verilog algorithms as part
  of the circuit verification process. 

  However, since Pragmatic C is a commercial enterprise with salaries
  to pay, it does not make sense to release our software using only
  the open source model.  Namely, we are releasing an older version
  called GPL Cver under the GNU General Public License (GPL) and a new
  compiled version called CVC under a commercial license.  We have chosen to
  release the older GPL Cver version using the GNU GPL license because it 
  is currently the most popular free software license and because it allows the
  widest distribution. 

  We are not sure if the GNU development model will work with Ecad software
  tools such as Verilog simulators so we have not yet set up a formal system
  for user contributions.  One problem is that much of the current Cver
  behavior is the result of commercial users reporting mismatches with
  the de facto standard Cadence Verilog XL (TM) simulator.

  We think that the combination of GPL and compiled CVC
  is particularly good for Ecad software.  The GPL version allows 
  archiving the exact simulator source used for circuit sign off  
  along with design data so if there is a need for future changes, 
  the full set of design data (i.e. including the simulator used to process
  the data) can be retrieved to recreate the exact sign off conditions. 

  Since we are concerned about the high unemployment rate among programmers
  and design engineers, we want to encourage people to write their own
  commercial Ecad programs that communicate with Cver using the IEEE P1364
  Verilog HDL standard PLI API.  We believe that whoever wrote the PLI
  program should be able to select the type of license for software for
  which they hold the copyright.  Also, we believe that the GPL does not
  prohibit commercial programs (or any non GPL licensed programs for that
  matter) from being dynamically loaded and run by GPL Cver using the PLI API.
  We think the Linux operating system analogy applies.  Namely, it is
  acceptable to have Linux load executable programs (such as dynamically
  linked .so PLI programs) not licensed under GPL or LGPL.  We believe GPL
  Cver loading and execution of commercial programs is the same as Linux OS
  executing commercial programs that communicate through the standardized
  system call API.  However, we are not lawyers so you should consult a lawyer
  to help you decide how to license your PLI programs.

  We would like to hear your problems and suggestions (seen email to
  avanvick@pragmatic-c.com)

--
  TM - Verilog XL is a trademark of Cadence Design Systems, Inc.
  to GNU type group software development.

GPL Cver  

  ------------------------------------------------------------------------
Cver is a full 1995 IEEE P1364 standard Verilog simulator.  It also
implements some of the 2001 P1364 standard features.  All three
PLI interfaces (tf_, acc_, and vpi_) are implemented as defined
in the IEEE 2001 P1364 LRM.


A. OBTAINING GPL CVER

GPL Cver is a copyrighted work (Pragmatic C Software Corp. owns the
copyright); it is not shareware or in the public domain.

Versions of Cver entitled "GPL Cver" are distributed with the GNU General
Public License, which allows free use, and free copying and redistribution
under certain conditions (including, in some cases, commercial
distribution).  The home page for GPL Cver is:

     http://www.pragmatic-c.com/gpl-cver

You can always download the latest GPL Cver release from that site.

GPL Cver is an older version of Cver that is released under the GNU
General Public License.  A newer and faster commercial version of Cver
is available from Pragmatic C Software Corp.


B. WHAT PLATFORMS DOES GPL CVER RUN ON?

Pre-compiled binaries and pre-built make files are available for
X86 Linux, Sparc Solaris, Apple Mac OSX, and Cygwin (a Linux-like 
envirnoment for Windows, make file only).  Because Cver is an interpreter, 
it should easily port to any system that supports the gcc GNU C compiler.  The 
main porting complication is usually related to Cver's use of dlsym/dlopen 
programming dynamic library linking. 


C. WHICH GPL CVER FILE SHOULD I DOWNLOAD? 

After clicking on the source or binaries (for now the links to to the
same download instructions), select which bzipped tar file to download.
If you intend to run GPL CVER on one of the platforms for which pre-built
binaries exist, download that file.   If you intend to run on another
platform or want to make your own binary, click on the source bzipped
tar file.  After bunzipping and untarring, the four files are identical
except the binary files contain cver compiled for the given platform
in the bin directory.

D. WHAT OTHER PROGRAMS ARE INCLUDED IN THE GPL CVER RELEASE

Vcddiff
   Current GPL Cver release includes a program similar to the Unix
   diff command called vcddiff.  It is a specialized diff that understands
   Verilog VCD files.  It is also distributed with the GNU General Public
   License, which allows free use, and free copying and redistribution.
   Vcddiff is a copyrighted work (Pragmatic C Software Corp. owns the
   copyright); it is not shareware or in the public domain.

   vcddiff is contained in the vcddiff.dir directory at the top level
   of the directory produced when the release tarball is untarred.
   The src directory contains instructions and pre-build make files
   for the normal three platforms (X86 Linux, Sparc Solaris, and Mac OSX).
   Run the tests in the examples.vcddiff directory in the vcddiff.dir
   directory.  For more information see th README files each of those
   directories.
   

E. WHERE TO GO NEXT

   After obtaining the GPL Cver tar ball, start by reading the README file.
Instructions for building a new GPL Cver binary from source are in
the INSTALL file.  There are various README and LICENSE files contained
in the top level of the GPL Cver release directory tree.  Cver documentation
is in the "doc" directory.


F. GETTING HELP OR REPORTING BUGS

  Send email to avanvick@pragmatic-c.com.

                   DOUMENTATION DIRECTORY CONTENTS

See either the IEEE P1364 Verilog standard LRM that can be purchased from
IEEE or a book on Verilog to learn Verilog syntax and usage.

The documentation directory contains the following files.

cver.faq -            File containing answers to frequently asked question.    

cver.hlp -            File containing help screen that is printed by cver 
                      when "cver -h" is typed.  This is main source of
                      instructions for using new +loadpli1= and +loadvpi=
                      features but also see examples in the PLI
                      tests_and_examples directories that contain running
                      PLI models with make files and c compiler and linker
                      options.

dbg.hlp               All the gdb style debugger help screens combined into
                      one file. see the helpgen.inp and README file in
                      ver_srcs directory for debugger -i script that will
                      generate the dbg.hlp file.

cver-extensions.txt   Document describes new Verilog 2001 features and other
                      enhancements in Cver.

systasks.1            Man page giving all system task and functions

systasks.ps           implemented by Cver in both man troff format and
                      postscript.

          DISCUSSION OF CVER EXTENSIONS AND IMPLEMENTION 


1. Cver PLI include files and vpi_ interface follows Verilog IEEE P1364 2001
   LRM not 1995 LRM.

2. Cver has preliminary support for Verilog 2000 attributes.

   Verilog 2000 (* .. *) attributes are now partially supported.  They
   can be added to variables, ports and instances/modules.  They can
   not yet be attached to any other HDL object including statements and
   expressions.  If you try to attach an attribute to an object that is not
   supported, a syntax error will be emitted.  vpi_ access to attributes is
   supported following Verilog 2000 LRM.  Attribute values can be previously
   defined parameters.

3. Cver uses fast relaxation algorithm for switch channel simulation.

   Loading and initialization (full relaxation so incremental algorithm
   can be used during simulation) for large tran and inout switch
   channels is now much faster.  New +switchverbose option can be turned to
   identify large switch channels and monitor switch channel elaboration.

4. Cver supports Verilog 2001 macros 

   `undef and `ifndef pare supported.  Also, macros with parameters
   are supported.  Following other simulators, argument macros require no
   white space between macro name and argument list so non argument macro
   values can be surrounded by parentheses.  `define constants __cver__,
   __CVER__, __P1364__, and __p1364__ are automatically defined.

5. Cver supports explicitly named pound parameters.

   New Verilog 2000 named pound parameters are supported so that not
   all parameters in pound parameter list need be given.  Example of new
   syntax is:

     level1 #(.p2(501)) x1(i);
     
6. Cver implements a number of new system tasks and functions.  See
   the systasks.1 man page for definitions of all system task and functions
   supported by Cver.

7. Cver implements a number of vpi_ PLI 2.0 enhancements

   a) Added ability for PLI to dynamically add and remove additional
      drivers to nets and after adding a driver, vpi_put_value can be
      used to drive values (including hiz for tri-stating) onto nets.  
      This provides a better way for PLI to drive wires compared to
      soft force that disappears on next net change as defined in P1364 LRM.
      This addition allows vpi_ to contribute drivers to nets where actual
      net value is determined using normal strength competition rules.
      It is not in Verilog 2000 because proposal was voted down by committee.

      See async.c, vsetval1.c and vsetval2.c tests in examples.vpi directory
      for examples of how new capability is used.  Driving a new using
      PLI involves two steps.  First use vpi_put_value with delay mode
      vpiNetDriver (for entire net) or vpiNetBitDriver for one bit of vector.
      The object returned by the call is then used as handle passed to
      vpi_put_value to add a driver.  Removing driver is accomplished by
      putting hiz value to net driver object.  File cv_vpi_user.h must be
      included to use this enhancement.

   b) Added vpiOneOfEachMod iterator.  Iterator returned contains one
      instance of each module in design.  It also was not accepted as part
      of Verilog 2000 PLI standard.  It is used for source processing
      where only one instance of each module need be processed.  It is
      much faster than traversing entire instance tree to find module types
      uses in design for large designs.

   c) Added vpiPoundParam 1 to 1 access method.  Given a handle to a pound
      parameter, the expression object passed to the instance is returned.
      The expression can be evaluated to get pound parameter value.  The
      value may differ from the final value of the parameter if he value
      is over-ridden by a defparam. 

7. Cver also supports pulse checking for Gates

   P1364 pulse checking options (such as +show_cancele) work in Cver
   for both path delays and gates.  This allows using SDF (DEVICE
   delays to implement distributed delay macro cell modules.
   Cver does not support pathpulse precentages because it is not  
   pessimistic enough.  Default is normal inertial delay rescheduling.
   Use +show_cancele to cause insertion of x for any width glitch.

Frequently Asked Questions
==========================

    * 1. What is Verilog and what is Verilog Simulation?
    * 2. What is the history of Cver?
    * 3. What Computers has Cver been ported to?
    * 4. How can I tell if I have misspelled a command line option?
    * 5. Why doesn't Cver mimic XL style port collapsing? i.e. why are some
         nets multiply driven in XL but not in Cver?
    * 6. What is the difference between a reg and a wire?
    * 7. Why is Cver inform and warning suppression system so complicated?
         How do I use it?
    * 8. Why can't I use ` defined preprocessor values to define numbers?
    * 9. Where are the instructions for the complicated compilation and
         linking steps needed before simulation?
    * 10. Why is the OS dynamic loader unable to find my .so PLI program
          libraries? 
    * 11. Why won't gdb let me set break points in my user PLI code?
    * 12. How do I use gdb in conjunction with Cver ':' debugger to debug my
          PLI code?
    * 13. Why does value assigned by vpi_put_value to a wire disappear?  What
          is this vpiAddDriver non standard feature anyway?
    * 14. How does glitch (pulse) checking work in Cver?
    * 15. Why doesn't Cver support $save/$restart?
    * 16. Why doesn't Cver support new Verilog 2001 generate feature?
    * 17. Why are Cver's debugger breakpoints so complicated?
    * 18. Why aren't more Verilog 2001 features implemented?
    * 19. What is vcddiff for?
    * 20. Why doesn't Cver support separate assertion and test languages?
    * 21. How do I report bugs?
    * 22. How do I purchase the new CVC Compiler from Pragmatic C

  ----------------------------------------------------------------------
1. What is Verilog and what is Verilog Simulation?

    Verilog is the name for both a language for describing electronic
    hardware called a hardware description language (HDL) and the name 
    of the program that simulates HDL circuit descriptions to verify
    that described circuits will function correctly when the are constructed.
    Verilog is used only for describing digital logic circuits.  Other
    HDLs such as Spice are used for describing analog circuits. 

    There is an IEEE standard named P1364 that standardizes the Verilog HDL
    and the behavior of Verilog simulators.  Verilog is officially defined
    in the IEEE P1364 Language Reference Manual (LRM) that can be purchased
    from IEEE.  There are many good books for learning that teach the
    Verilog HDL and/or that teach digital circuit design using Verilog.
    See the Comp.lang.verilog usenet news group for information on Verilog
    web resources.

2. What is the history of Cver?

   Pragmatic C started by developing the Vcmp Valid to Verilog translator
   and the Tdlver Tegas to Verilog net list translators that were marketed
   by Gateway Design Systems.  When Cadence Design purchased both Gateway
   Design and Valid Logic, the market for those programs disappeared.

   Pragmatic C then worked with Chronologic and wrote the first
   front end elaborator for VCS but due to personality conflicts, the joint
   development project did not work out.  After parting company with
   Chronologic, Pragmatic C decided to develop a Verilog simulator
   since the front end was already written.

   Cver was used as the digital engine for the Antrim Design Systems
   Verilog-AMS (analog and mixed signal) simulator in the late 1990s until
   last year when Cadence Design purchased Antrim Design Systems. 
   We have decided to release Cver as it existed at the time of the last
   Antrim release under GNU Public License (GPL) because we realized that we
   could not compete with the branding power of the large Ecad vendors.

   We are selling our new Verilog compiler that compiles to X86 Linux
   assembly language.  It is at least two times faster for accurate gate
   level designs and much faster for procedural designs.  The new
   commercial compiled Verilog product is called CVC.  It allows either 
   compiling to assembly (the default) or running the interpreter 
   (+interp option).  We will continue to support a version of Cver released 
   under the GPL license, but new Verilog 2005 (and 2001) features will not 
   be added to GPL Cver. 

  ----------------------------------------------------------------------
3. What Computers has Cver been ported to?

   Cver has been ported to Linux X86, Sparc Solaris, Apple Mac OSX, 
   Cygwin (a Linux-like envirnoment for Windows),  and Hewlett Packard 
   PA-Risc HPUX systems.  The release comes with tested make files for 
   Linux, Sparc, Apple, and Cygwin (contact Pragmatic C for the HPUX make 
   file).  Since Cver is primarily an interpreter, it will usually just 
   compile and run on any system that has a GNU C compiler available.  
   The one possible problem area is that user PLI programs are dynamically 
   linked using dlopen/dlsym program dynamic library linking system calls.  
   It will probably be difficult to port Cver to systems that do not support 
   dynamic linking.  See the README file in the source directory for more 
   details.

  ----------------------------------------------------------------------
4.  How can I tell if I have misspelled a command line option?

    Run Cver with the -informs command line option.  It will print a
    message for every unrecognized option.  It will print an inform
    message for every unrecognized + option and a warning for every
    unrecognized - option.  Unrecognized + options may also be options
    that are needed by PLI programs.

  ----------------------------------------------------------------------
5.  Why doesn't Cver mimic XL style port collapsing? i.e. why are some
    nets multiply driven in XL but not in Cver?

    Cver follows the P1364 LRM and treats input and output ports as no delay
    continuous assignments and inout ports as non strength reducing
    "virtual" tran gates.  This has the advantage that there is no need  
    for changing wire types when wires with different types are collapsed 
    into the same net and allows warnings to be emitted for incorrectly
    declared ports.  A port is incorrectly declared if an input port has
    a driver on the lowconn side or if an output port has a driver on
    the highconn side.

    Because many older designs depend on the XL port collapsing algorithm
    which silently changes port type depending on pattern of net drivers,
    Cver supports the +change_port_type command option that causes Cver
    to change ports according to driving pattern to mimic the XL port 
    collapsing algorithm.  Cver always emits a warning message if there
    is a possibility that a port may be changed to inout by XL port
    collapsing algorithm (messages is an inform if +change_port_type option
    is selected).  Use +suppress_warnings+3107+3108+ to suppress the
    warning if you intend backward direction signal flow to be blocked
    by a port.

    There are many advantages to avoiding the XL algorithm such as:
    fewer multi driver nets, no need to distinguish simulated nets
    in PLI and in system task output, etc.

  ----------------------------------------------------------------------
6.  What is the difference between a reg and a wire?

    This distinction is a difficult one for beginners to grasp but
    it is important for distinguishing between computer programs and
    hardware models.  See a Verilog circuit design text book or the IEEE
    P1364 Verilog Standard LRM.

    But briefly, a reg is like a programming language value.  Once a value
    is assigned to a reg, which can only occur in procedural Verilog
    constructs, its value is retained until another procedural assignment
    is made.  A wire corresponds to a circuit wire.  It has declarative
    constructs such as gates and continuous assignments driving it and
    has loads which are input to other declarative Verilog constructs.
    If a wire has more than one driver, whenever a driver changes value,
    all drivers are evaluated to determine the winning value (strongest
    0 component and 1 component strengths).  When all driving value
    of a wire are removed (called tristating), the value of a wire reverts
    to the high impedance (z) value, i.e. the value does not persist.
  
    Reg and wire are sometimes lumped together and called nets.  Regs
    can only be assigned to using procedural assignments.  A procedural
    assignment can only occur in initial or always blocks, in tasks,
    or in functions.

    Also, wires are scalared (unless declaration prevents scalaring) so
    that each bit changes and is scheduled separately.  Regs are always
    vectored, so that changing one bit is the same as changing the entire
    reg and events are always scheduled for an entire reg. 

  ----------------------------------------------------------------------
7.  Why is Cver inform and warning suppression system so complicated?
    How do I use it?

    There are constant bug reports complaining either that some minor
    problem should be flagged or that some minor problem is too minor
    to be flagged.  Cver has 3 command line options that allow user
    customization of error message output.

    By default, warning messages are enabled (printing is enabled) and 
    inform level messages are disabled (counted but not printed).
    Use the -informs message to enable all inform level messages.  Use the
    -w message to turn off warning message printing (option names mimic
    those originally used in XL).
    
    A finer grained messages system allows suppressing specific warning
    and inform level messages.  Error messages are always printed and
    if simulation has not yet started, inhibit simulation.

    Easiest way to customize messages that you want to have printed is to
    start by running with -informs option.  Then look at the printed
    inform and warning messages. For messages that you see as tiny lint
    particles, record the number (in square brackets) and add it to
    a +suppress_warns+ option list.  You can use as many different
    +suppress_warns+ messages as desired.  I normally run without -informs
    but use "+suppress_warns+3107+3108+".

    The SDF reader uses separate command options but you can still suppress
    individual message numbers with a +suppress_warns+ message number list.
    The SDF reader options are +sdf_log_file [file name] that directs all
    output to a separate log file with name [file name].  If option is not
    used, SDF reader messages go to normal log file (usually verilog.log). 
    +sdf_noerrors inhibits emitting SDF reader error messages.  +sdf_nowarns
    inhibits printing of SDF reader warning messages.  -informs turns on
    printing of SDF reader informs unless +sdf_nowarns options is used.
    SDF errors do not inhibit simulation.

    There are also options to print out more verbose record of elaboration
    and simulation progress.  +verbose prints run progress messages.
    +libverbose prints trace of exactly how and in which order
    unresolved symbols are resolved during -v/-y library reading.
    +sdfverbose prints trace of exactly what delay is assigned during
    SDF input to each object.  +switchverbose prints trace of switch 
    (tran, tranif, inout port, etc.) channel construction needed 
    for the undocumented (I think) XL style relaxation switch channel
    algorithm.

  ----------------------------------------------------------------------
8.  Why can't I use ` defined preprocessor values to define numbers?

    Verilog preprocessor differs from programming language (such as C)
    preprocessor in that only tokens can be substituted not characters.
    Therefore because sized numbers are defined as [bit width][base value],
    it is only legal to define a number as "`WID 'd44" or "`WID `BASEVAL".
    Assuming the following ` definitions are made:

    `define NWID 32
    `define PWID 'd3
    `define QWID 3
    `define RWID 32'd

    The following assignments are legal: 
      i = `NWID `PWID;
      j = `NWID'd3;
      k = `NWID`PWID;

    But these two are illegal:
     // l = `NWID 'd`QWID; 
     // m = `RWID `QWID

  ----------------------------------------------------------------------
9.  Where are the instructions for the complicated compilation and
    linking steps needed before simulation?

    Cver follows XL in using a different turbo loading approach so there
    is no separate compilation and linking phases.  No limitations
    on when SDF files can be read and no limitations on PLI usage. 
    No compiled simulation needed for separate elaboration and simulation
    PLI loading.  No long (sometimes up to 30 minutes) compilation times.
    Cver has very fast turbo compiler to byte codes for a Verilog virtual
    that is interpreted.  SDF annotation, PLI registration, and debugger
    commands invoked during simulation cause incremental compilation to
    update the byte code simulation model.

  ----------------------------------------------------------------------
10.  Why is the OS dynamic loader unable to find my .so PLI program
    libraries? 


    When Cver is unable to find dynamic libraries that needed to be loaded
    because they are coded as the +loadvpi=[library]:[boostrap routine]
    or +loadpli1=[library][boostrap routine] library field, error 
    message 1803 is emitted.  The error messages contains the reason 
    for dynamic library load failure.  The most common reason is 
    "No such file or directory".  The most common cause of this error 
    is that you forgot to set the OS LD_LIBRARY_PATH environment variable.
    Even if you keep your dynamic libraries in the same directory in which
    you run your simulation, you must set the LD_LIBRARY_PATH environment 
    variable to '.' (current directory).  You do not need to include
    the .so suffix on your library name since Cver first tries name as it
    appears and then try again with .so suffix appended.

  ----------------------------------------------------------------------
11.  Why won't gdb let me set break points in my user PLI code?

    Because Cver loads user PLI libraries as dynamic (usually suffix .so)
    libraries using +load_pii1= and +load_vpi= options, the libraries are
    not loaded until just before start of simulation.  Therefore start cver
    by typing "gdb cver".  Then set a break at routine __pv_sim.  All user
    PLI libraries will have been loaded by the time that breakpoint is hit.
    In the breakpoint you will be able to set breakpoints in user PLI code.
    Then continue from breakpoint to start simulation and to begin debugging
    user PLI code.  See installation directory tree, 3 PLI
    directories in tests_and_examples directory for instructions and
    examples of how to compile and create user PLI program dynamic libraries.

  ----------------------------------------------------------------------
12.  How do I use gdb in conjunction with Cver ':' debugger to debug my
     PLI code?

     Follow the instructions in question 9 except before starting
     simulation type gdb command "handle 2 pass".  Then you can enter
     gdb by pressing interrupt (usually ctrl-c) key.  You can even
     press interrupt key within the debugger to enter gdb.  Continue
     from gdb will return to debugger command input mode, so you will
     need to use Verilog debugger continue ('.') command to continue
     simulation.

  ----------------------------------------------------------------------
13.  Why does value assigned by vpi_put_value to a wire disappear?  What
     is this vpiAddDriver non standard feature anyway?

     One result of current dominance of compiled to machine code Verilog
     simulators over flexible interpreted simulators is lack of flexibility
     in what can be modeled using the PLI, especially the new vpi_ interface.
     Worst problem is that there is no way to drive wires using PLI calls.
     Using vpi_put_value to assign to a wire just creates what is
     called a soft force, i.e. the wire is changed to vpi_put_value
     value until next time a driver changes.

     Cver supports a much better way for assigning values to wires.
     Namely vpi_put_value can be called with reason flag vpiAddDriver.
     The object returned is a new driver of a wire.  Then whenever
     vpi_put_value is used to put a value to the added driver object,
     the driving value changes.  Any assignment can be removed by
     putting a z (high impedance) value to the driver.  Any number
     of drivers can be added so different PLI application will not
     conflict.  Although, final value will be determined by combining
     all drivers using normal Verilog strength competition algorithm.

     This enhancement was proposed to P1364 committee but was voted
     down so it is currently a non standard enhancement.

  ----------------------------------------------------------------------
14.  How does glitch (pulse) checking work in Cver?

     Cver pulse detection uses the normal +show_cancel_e option to
     turn on insertion of x when a pulse occurs.  If the option is not
     used standard Verilog inertial (latest occurring) scheduling is used.

     Because Cver is intended as an accurate gate level simulator and
     because glitch problems are the most common reason that designs
     can not be moved between circuit type and feature sizes, the following 
     very pessimistic pulse detection algorithm is used if the
     +show_cancel_e option is selected: 1) if option is select, every 
     possible pulse is detected and x's are injected. 2) Pulse checking 
     is also used for gates as well as paths in Cver, 3) if
     +pulse_e_style_ondetect option is used output wire stays in unknown (x)
     state until a driver that doesn't have a glitch problem changes.  4) No
     PATHPULSE option or specify section percentage parameters are used, i.e.
     any pulse causes x injection. 

     This algorithm was used by Tegas simulator with good results
     in freeing designs from dependence on one particular IC type or
     manufacturing process. 

  ----------------------------------------------------------------------
15.  Why doesn't Cver support $save/$restart?

     Operating system level programs and system calls exist in modern
     operating systems so it is better to simply stop a process and
     restart it.  There is no need for Cver to even know it was
     stopped and its process image saved to disk.

  ----------------------------------------------------------------------
16.  Why doesn't Cver support new Verilog 2001 generate feature?

     Cver is intended to be an accurate and close to actual hardware
     models gate level simulator.  The new Verilog generate is a feature
     that is not preprocess Verilog into HDL source but becomes an integral
     part of simulation data structure.  For that reason and because it is so
     complicated that other implementations by simulators with larger
     market share will almost certainly differ, there are no plans
     to implement Verilog generate as currently defined.  There are
     good Verilog source preprocessors available that provide a better
     method (using superior Unix filter paradigm) to simplify
     coding of regular Verilog HDL source.

  ----------------------------------------------------------------------
17.  Why are Cver's debugger statement breakpoints so complicated?

     Cver supports all of the statement break point control capabilities
     in gdb plus some additional features needed because circuits are
     represented as instance trees.  The following types of breakpoints
     are supported (see dbg.hlp file in doc directory or use the Cver
     :help commands for more details): 
 
     1) :breakpoint [statement ref] - break set at statement for every instance
    
     2) :ibreakpoint [scope reference][,statement ref] - break set at statement
        in only the one instance determined by the [scope reference].
 
     3) :tbreakpoint [statement ref] - same as :breakpoint but removed
        after hit one time.
 
     4) :tibreakpoint [statement ref] - same as :ibreakpoint but removed
        after hit one time.
 
     5) :nextb - set a :tibreak at next line in source and execute '.'
        command to continue execution.  Because of hardware parallelism,
        a number of different threads may execute and block on delay or
        event controls before the next statement in source order is
        executed.


     The following commands take a break point number as argument and
     modify behavior of the breakpoint.
 
     a) :disable [num] and :enable [num] - disable a breakpoint from
        triggering until :enable command re-enables the breakpoint.
 
     b) :ignore [num] [count] - ignore the breakpoint until it is hit
        exactly [count] times.  Useful for breaking after a certain number
        of edges when the edges are controlled by procedural RTL.

     c) :cond [num] [Verilog expressions] - ignore breakpoint unless
        expression evaluates to true.  To stop after a given time use 
        "($time > [number])" for the cond expression.  :cond command
        expression are level not edge sensitive.

     The complicated break point mechanism is needed because it is
     quite common for wrong procedural edges to occur only in one of
     a number of repeated instance and then only when a number of
     different other conditions are met.

  ----------------------------------------------------------------------
  ----------------------------------------------------------------------
18.  Why aren't more Verilog 2001 features added?

     A number of new features are under development such as new file I/O
     mechanism, configurations alternative to -y/-v options, and new signed
     and unsigned keywords and algorithm.  Cver can't be first simulator to
     implement new features because our interpretation of the LRM will
     probably not match the interpretation of the simulators with larger
     market share.  Since Cver is intended to be an accurate gate level
     simulator, multi dimensional wire and regs will probably not be
     implemented since they do not correspond to real hardware.  Multiple
     dimensional arrays (formerly called memories) make sense but if only
     multi dimensional arrays are implemented, simulator will not match
     either 1995 or 2001 standard.

     We are also working on other minor new Verilog 2001 features.

  ----------------------------------------------------------------------
19. What is vcddiff for?

    vcddiff is program we have developed to assist in making sure
    that when changes are made to a design,  the changes can be  
    regressed back to original design.  We think that the diff style
    output is a better way to look at changes in wide bus based designs.
    See README file for vcddiff for more instructions.

  ----------------------------------------------------------------------
20. Why does not Cver support separate assertion and test languages?

    The idea behind Cver is provide an interpreter that is so flexible
    that whatever assertions need to be checked can be accomplished by
    coding the checks in the Verilog HDL itself and that test scripts can
    either be coded in Verilog or in a standard script language such as Perl,
    Tcl, or Ruby and connected using PLI interface.  Cver follows the Unix
    paradigm in which specialized tools are connected to construct more 
    complex tools.

  ----------------------------------------------------------------------
21. How do I report bugs?

    Send email to avanvick@pragmatic-c.com.  Before reporting a bug check
    the known-problems.txt file to see if the problem is already known.
    Also, make sure you are running the latest version of GPL Cver by
    checking the http://www.pragmatic-c.com/gplcver web site for the
    latest GPL Cver release.  Bug reports should include a small failing
    example if possible.

  ----------------------------------------------------------------------
22. How do I purchase the new CVC Compiler from Pragmatic C

    We have a stable version of our CVC compiler.  You can purchase it by
    contacting Andrew at avanvick@pragmatic-c.com.  You can also get release 
    notes and an evaluation copy of CVC by contacting Andrew.

GPLCVER_2.12a of 05/16/07 (Linux-elf).
Copyright (c) 1991-2007 Pragmatic C Software Corp.
  All Rights reserved.  Licensed under the GNU General Public License (GPL).
  See the 'COPYING' file for details.  NO WARRANTY provided.
Today is Wed May 30 09:17:41 2007.
             ** GPL CVER VERILOG SIMULATOR HELP MESSAGE **
 
  GPL Cver is a Verilog HDL simulator following the 1995 IEEE P1364 standard
  with some 2001 P1364 LRM features added and some modifications to match
  actual behavior of de facto standard XL simulator.  Modeling in C/C++ and
  Verilog using PLI 1 and PLI 2 interfaces is supported.  PLI implementation
  follows 2001 P1364 LRM.  See release notes in doc directory for list of
  P1364 2001 supported features and list of known problems.
 
  Usage:  cver [intermixed options and Verilog source files].
 
  Command line and -f command file options must be in lower case and must
  begin with a - or +.  Each option requires a separate - or +.  Type
  'cver -?' or 'cver -h' to generate this help message.  To enter the
  Verilog statement interactive debugger (press interrupt (^c) or execute
  $stop), then type :help' for interactive debugger help.
 
  It is assumed that you already know Verilog and have access to a P1364 LRM
  or other Verilog documentation.  Cver supports both PLI (Programming
  Language Interface) 1 tf_ and acc_ and PLI 2 vpi_ utility, design object
  and callback routines using +loadpli1= and +loadvpi= dynamic PLI load
  options defined below.  Both old PLI 1 and new PLI 2 libraries can be
  dynamically loaded during one run.  See examples in examples.vpi,
  examples.tf and examples.acc release directories for examples showing how
  to link and run PLI models.  Cver contains a number of new system tasks
  and functions.  See systasks.1 man page in the doc directory for
  definition of every system task and system function supported by Cver.
 
  Cver generally produces results matching other simulators even when other
  simulators differ from P1364 standard up to differences in event order.
  However, Cver does not change port direction because of net connection
  direction (i.e. treat nets with wrong side of port drivers as inouts)
  unless the +change_port_type option is selected.  It is suggested that
  you change your designs so port type changing is not needed, but for full
  compatibility with other simulators always run with +change_port_type
  option.  Cver implements pulse (glitch) detection for gates as well as
  paths.  This may cause some simulation result differences.  This more
  stringent pulse analysis is consistent with Cver's intended use as
  accurate gate level simulator.
 
  Since all options are collected before processing, if any options are
  duplicated, the rightmost (last) will be used.  All Cver options are
  listed in this help message.  Any other option will be ignored by Cver
  although it may be scanned and used by a user PLI routine.  All options
  not listed in this help message will have warning 506 emitted for minus
  options and inform 410 for plus options.
 
  Options defined in the IEEE P1364 reference manual are supported and have
  the following effect:
 
   -f [file]  Read options and source file names from [file] until it is
         exhausted at which point continue reading from command line.  May
         be nested.
   -l [file]  By default all output is written to stdout and to log file
         verilog.log.  -l changes to log file [file].  System task
         $log([file]) changes to log file [file] during simulation, $nolog
         turns off log file output.  Added system task $flushlog calls OS
         fflush on log file.  $reset does not reset log file.
   -s    Stop just before starting simulation and enter interactive debugger.
   -i [file]  Read interactive debugger commands from file [file] the first
         time interactive mode is entered (usually with -s but possibly by
         $stop or interrupt signal (^c)).  Nested -i [file] options are
         chained not nested.
   -c    Translate source and all referenced library models only.  Ends just
         before loading the translated model into memory.
   -w    Suppress all warning messages.  See +suppress_warns added option for
         suppression of warnings and informs by message number.
   -d    Dump source that is constructed from internal representation.  All
         parameters are replaced by their constant value in the
         reconstructed source output.  Debugger source listing lists lines
         from source files instead of reconstructing source.
   -q    Quiet mode.  Do not print normal progress messages.  Opposite
         of -q is +verbose that prints even more progress messages than normal.
   +mindelays, +typdelays, +maxdelays  Choose either minimum, typical or
         maximum value from any constant (min:typ:max) forms in source.
         Selection is made during input scanning so min:typ:max forms
         become constant numbers at translation time.
   -t    Trace procedural statement execution.  Use -et to trace event
         processing.  In other simulators, -t means both -t and -et.
         $settrace,  $setevtrace, $cleartrace, $clearevtrace to control
         tracing during simulation.
   +libnocell  Ignore `celldefine directives in source and libraries.  This
         should not be used if delay back annotation is used since it will
         probably cause annotation to fail.
   +notimingchecks  After checking for correct syntax, ignore timing checks.
   -u    Ignored.  For all upper case, use an OS filter command to convert
         source to all upper case.
 
  Only default and +librescan library scanning order supported.  By default
  all library files from -v [file] and all directories of library elements
  from -y [directory] are scanned from first to last according to input option
  order.  If unresolved names remain after completion of a pass, the list is
  rescanned from the beginning.  If +librescan option is selected, unresolved
  names are resolved one at a time in order they are first seen.  After a
  name has been resolved, the next name in order is resolved by rescanning
  from the beginning of library list.  Options to control order dependent
  resolution and +libnamehide are not implemented.  Library options are:
 
  Cver also now supports configuration files for selecting libraries and
  design components following the Verilog 2005 LRM description.  See LRM
  section 13.
 
   +config [config file name]  Use this option to specify library file
         mapping using new 2001 config feature.  See LRM section 13 and
         see the tests_and_exmaples/v2001/config directory for examples.
   -v [file]   Treat [file] as a library containing module and UDP
         definitions.  File is sequentially searched for definitions that
         resolve unresolved names.  Within a -v file, if a name if defined
         before use, it is resolved before moving to next library element.
   -y [directory]  Treat every file in [directory] as a -v library although
         usually each file will only contain one definition.  File name in
         directory along with +libext+ option used to find unresolved name.
   +libext+  In -y directory files, name resolution uses file names.  If
         no +libext+ option is present only files whose name exactly
         matches an unresolved module or primitive will be read.  There can
         be no extension.  Normally, each -y file will contain the
         definition for exactly one element but if more elements are present
         they will be used to resolve other unresolved elements.  Use
         +libext+[extension with dot]+[extension with dot]+...  to cause
         file name extensions to be removed before matching file names to
         unresolved element names.  Only one +libext+ option may appear and
         matching is in order when library extensions do not follow the
         simple .[suffix name] convention.  If all files in -y directories
         end with either .v or .V (a common case), use +libext+.v+.V+
   +librescan  Rescan to beginning of library file and directory list after
         every unresolved name is resolved.  At most one name resolved per
         library pass.
   +libverbose  Emit detailed trace messages giving resolution order and
         reason a particular element was resolved at the particular place.
 
   +show_canceled_e  Path and gate (1 bit continuous assignments implemented
         as gates) outputs set to X when pulses occur that cause scheduled
         but not matured events to be canceled because second input edge
         occurs before output has changed (switched).  The output
         remains at X until another input edge causes an output change
         because it is unknown if a pulse (glitch) will cause output
         switching.  Some other simulators use a less pessimistic algorithm
         that assumes pulses never cause switching and schedule a change
         from X back to original output value on trailing edge of pulse.  If
         your model will not run, use the +warn_canceled_e instead of this
         option and examine warnings.  Cver does not allow only some
         paths and gates to use pulse X showing using specify section
         directives because X showing does not slow down simulation.
         Normally X from a pulse is shown on leading edge of glitch.  Use
         +pulse_e_style_ondetect to cause X to be shown(driven) when pulse
         detected from input change.  Option is standardized replacement for
         previous +spikes option.
   +noshow_canceled_e  Path and gate outputs not driven (shown) as X when
         pulses occur (second input change earlier than selected delay).
         This is the default (normally it is not needed).  It selects normal
         Verilog inertial delay algorithm where the latest input change
         causes the previously scheduled but unmatured event to be canceled.
   +pulse_e_style_ondetect  If +show_canceled_e option selected, this option
         causes output to be set to X (shown) when the pulse (glitch) is
         detected.  If this option is not selected, output is set to X
         (shown) when the pulse propagates to an output.  This option
         selects a more pessimistic (starting earlier) X region.
   +pulse_e_style_onevent  If +show_canceled_e option selected, this option
         selects the default output setting to X (showing) option that sets
         output to X when glitch propagates to output (leading edge is time
         at which the event scheduled latest matures).  There is no reason
         to use this option since it is default.  Control of X showing for
         individual gates and paths is not supported.
   +warn_canceled_e  Emit warning for every gate (including UDP) or path event
         cancel (inertial cancel and reschedule).  This option may cause
         voluminous output so the $suppress_warns and $allow_warns system
         tasks can be used to select particular time periods when warnings
         are emitted.  This option and +show_canceled_e are unrelated so both
         error messages and x showing (injection) may be enabled.
   +nowarn_canceled_e  Because this option is the default it is never needed
         Last of all +warn_canceled_e and +nowarn_canceled_e is used.
 
  The following two options for dynamically loading user PLI libraries are
  not explicitly defined in IEEE P1364 reference manual but are supported
  by all modern simulators:
 
   +loadpli1=[.so library]:[boostrap routines]  Load [.so library] dynamic
         library containing user PLI 1 model and execute each bootstrap
         routine.  [bootstrap routines] is a comma separated list of C
         routines.  List may be empty but : is still required.  No spaces
         are allowed around the equal sign, the colon or commas separating
         bootstrap C routine names.  All dynamic libraries defined by
         +loadpli1= options are first loaded using OS dlopen mechanism and
         then all bootstrap routines are executed before elaboration begins.
         The OS specific dynamic library suffix (.so on Linux) may be
         omitted.  If omitted and the [.so library] is not found in any
         LD_LIBRARY_PATH directory, the dynamic library suffix is added and
         the LD_LIBRARY_PATH directories are searched again.
 
         Each [bootstrap routines] list routine must return a pointer to a
         s_tfcell veriusertfs table that ends with zero value type field.
         Multiple +loadpli1= options are allowed and just before elaboration
         all [bootstrap routines] for every +loadpli1= option are executed.
         Each s_tfcell returned table is added to one design wide master
         s_tfcell table in option and routine in list order.  The master
         table defines all PLI 1 system functions and tasks used during a
         simulation run.  The [bootstrap routines] must not call any PLI
         routines.  Any C file containing [bootstrap routines] list must
         include both veriuser.h and cv_veriuser.h files.  Some OS shells
         may require quoting and escaping option separators and file names
         within the +loadpli1= option string.  Problem can be avoided by
         coding +loadpli1= option in a -f command argument file. See release
         examples.tf directory in tests_and_examples directory for example
         PLI 1 programs and make files specific to your operating system.
   +loadvpi=[.so library]:[boostrap routines]  Load [.so library] dynamic
         library containing user PLI 2 vpi model and execute each bootstrap
         routine.  [bootstrap routines] is a comma separated list of C/C++
         routines.  List may be empty but : is still required.  No spaces
         are allowed around the equal sign, the colon or commas separating
         bootstrap C routine names.  All dynamic libraries defined by
         +loadvpi= options are first loaded using OS dlopen mechanism and
         then all bootstrap routines are executed before elaboration begins.
         The OS specific dynamic library suffix (.so on Linux) may be
         omitted.  If omitted and the [.so library] is not found in any
         LD_LIBRARY_PATH directory, the dynamic library suffix is added and
         the LD_LIBRARY_PATH directories are searched again.
 
         Each [bootstrap routines] is saved on an ordered list and executed
         in order before elaboration begins.  Normally [bootstrap routines]
         will execute routines in vlog_startup_routines table, but any PLI 2
         vpi routines callable before elaboration may be called including
         vpi_register_systf and vpi_register_cb PLI 2 routines.  Some OS
         shells may require quoting and escaping option separators and file
         names within the +loadvpi= option string.  Problem can be avoided by
         coding +loadvpi= option in a -f command argument file. See release
         examples.vpi directory for example PLI 1 programs and make files
         specific to your operating system.
 
  The following other options not defined in the IEEE P1364 reference manual
  are supported:
   +verbose  Print various simulation progress messages and design component
         counts.  Memory sizes do not count memory used by udp tables.
   +maxerrors [number]  Normally translation terminates after 32
         errors.  Use this option to change the number. 0 means no limit.
         Option applies to translation only, simulation is never stopped.
   -e    Turn off printing of non fatal error messages.
   -informs  Turn on printing of informatory messages.  Off by default.
         Informs may be emitted during translation and during simulation.
         Enable this option to determine if a plus option is misspelled and
         to cause OS error message description strings to be printed.
         Option will probably produce voluminous output unless
         +suppress_warns+[+ separated list] option(s) also used.
   -et   Turn on event tracing.  Option is similar to the -t (or $settrace)
         option but -t only traces procedural execution.  To dynamically
         control event tracing use $setevtrace and $clearevtrace system
         tasks.  Option produces voluminous output. Use -t and -et to
         duplicate other simulator -t tracing.
   +tracefile [name]  Set the output file for any trace output (either
         statement or event).  Use $settracefile system task to change
         trace file during execution.  Name can be stdout and if no option
         or $tracefile, defaults to stdout and log file.  $flushlog system
         task flushes this file during simulation.
   +printstats  Print tables of design contents.  Primitives, instances,
         and wires that will use silicon area are tabulated.  More
         detailed alternative to $showallinstances.
   +printallstats  Option equivalent to +printstats but additionally prints
         the declarative content of every module.
   +suppress_warns+  Individual warning and informatory messages can be
         suppressed (not errors) by including a + separated list. i.e.
         +suppress_warns+403+502+507+564+.  All such options are combined.
         The $suppress_warns([comma separated list]) and $allow_warns
         system tasks can be used during simulation for the same effect.
   +remove_gate_0delays  Change all gates with #0 or #(0, 0, 0) delay to no
         delay (1 bit continuous assigns implemented as gates).  Option can
         significantly speed up simulation but in very rare situation cause
         simulation to fail (#0 delays used to mask races).  If you see a
         large simulation speed up from option, you can probably speed up
         simulation even more by recoding most common cells as udps.  Option
         needed because some simulators only allow delay annotation if gate
         has a delay coded in source.
   +nokeepcommands  Do not save interactive commands to history list.  By
         default,  Interactive commands are saved to history list.  The
         $keepcommands; and $nokeepcommands; system tasks enable and disable
         saving of of history during simulation.  Option should be used when
         interactive input comes from $input or from shell pipe to stdin.
   +define+[symbol] or +define+[symbol]=[string]   Define back quote macro
         symbol [symbol] with an empty text string (first form) for use with
         `ifdef and `ifndef macro facility.  [symbol] does not include back
         quote.  Second form defines symbol with value [string].  [String]
         must not contain white space but can contain anything else including
         surrounding quotes.  Escaped surrounding quotes are converted to
         normal quotes while non escaped will probably be removed
         by your shell.  The $scan$plusargs system task is an alternative
         for setting preprocessor values into variables.
   +incdir+[path]+[path]+...+  Define paths that are searched for `include
         files when `include file not found in current directory.  Only
         `include files that are non absolute paths (not staring with '/'
         or '.' or '..' or '~') are searched for using +incdir paths.
         Paths that do not end with '/' have a '/' path separator appended
         to end.  For file included in different directory, files included
         from it are still searched for in original (not include file)
         directory.  Multiple +incdir+ options may be specified.  Paths
         directories are searched in order of +incdir+ options.
   +sdf_log_file [file]  File is used for SDF annotation instead of default
         writing of SDF messages and errors to Verilog log file.
   +sdf_annotate [file] or +sdf_annotate [file]+[scope reference]  File must
         be in IEEE P1497 standard delay file format.  File is read and used
         to set delay and specify values.  +mindelays, +typdelays or
         +maxdelays setting used to select rtriple value.  Multiple
         +sdf_annotate options (and files) allowed.  If +[scope reference]
         provided, SDF path references relative to scope.  Otherwise, SDF
         paths rooted (context is entire design).  Annotation files processed
         in option order.  Alternatively, $sdf_annotate system task can be
         used to annotate delays.  See systsks.1 man page for documentation.
         Large designs that require large SDF files load somewhat faster if
         command line option instead of system task is used.
   +sdfverbose  Emit trace messages giving new delay value for every delay
         changed during +sdf_annotate delay annotation.  Option can generate
         voluminous output.
   +sdf_noerrors  Do not emit SDF annotation error messages.  SDF errors do
         not stop simulation but cause SDF object delay setting to be skipped
         so +maxerrors error limit does not apply.  Use this option to turn
         off printing of SDF error messages.
   +sdf_nowarns  Do not emit warning messages during SDF annotation.  SDF
         warnings and informs can also be suppressed by message number
         using +suppress_warns+ option.
   +switchverbose  Emit trace and size messages for inout and tran gate
         switch channels elaboration. Use this option to print progress
         messages when simulating models with very large switch channels.
   +change_port_type  Some designs require ports that are not declared as
         inout but are connected as inouts and require bidirectional signal
         flow for correct simulation have their port type changes to inout.
         Use this option to cause port direction to be changed to inout for
         input ports with loconn drivers and for output ports with highconn
         drivers.  WARNING: Use of this option may be required to match
         results of other simulators that use port collapsing algorithm.
   +no_separate_nb_queue  Cver non blocking event scheduling algorithm has
         changed to match XL (all non blocking events scheduled only
         after all #0 events processed).  Use this option for backward
         compatibility with old cver algorithm that mixed non blocking
         eventing in the #0 queue.  If using this option changes your
         results, your circuit probably has a race.
   +nospecify  Simulation run with specify section ignored.  This option
         causes specify section to be read and parsed but it is discarded
         before simulation.  +nospecify of course implies +notimingchecks.
   +nointeractive  Option turns off interactive environment, interrupt signal
         (^c) causes immediate termination.  $stop causes a warning to be
         printed without stopping.  Suppress warning 560 to silently ignore
         stops.
   +snapshot  If +nointeractive option is selected, if interrupt signal
         (^c) is generated, this option causes a port mortem activity
         snapshot to be printed before program termination.  Debugger
         :where and $snapshot system task produces same output without
         ending simulation.
**Special help mode successfully completed.

CVER_2.51e of 02/03/03 (Linux-elf).
Copyright (c) 1991-2003 Pragmatic C Software Corp.
  All Rights reserved.  Licensed software subject to applicable
  prohibitions and restrictions as to redistribution and/or use.
Today is Mon Feb  3 01:00:22 2003.
  LIC: Licensed to: "Linux 3490 development - Rh 7.1 and Rh 7.3"
Compiling source file "hello.v"
Highest level modules:
xx

C1 > /* file to generate debugger help */
C1 > $nokeepcommands;
C2 > :set nologecho
interactive input command echo to log file off
.. printing basic help message
Type ':help [topic]' or ':help :[debugger command]' to print specific help
message.  Any name can be abbreviated by a unique prefix within : debugger.
Colon is required for command name help but not allowed for help topics.
 
Help topics:
  debugging:  Entering and supplying input for interactive debugging.
  optimizer: debugging limitations when -O optimized simulation selected
  tracing:  Separate batch tracing system for debugging.
  differences:  Debugger differences from Verilog standard.
  statements:  Using traditional interactive Verilog statement debugger.
  data:  Examining variables and expressions.
  source:  Listing source and navigating between files.
  scope:  Setting and navigating between instance and task scopes.
  break points:  Behavioral statement breakpoints and single stepping.
  changes breaking:  Breaking on net changes and edges.
  history:  Command history and history number command enable/disable.
  info:  Determining and setting debugger status and settings.
  tasks:  System task and functions useful for interactive debugging.
  commands:  A list of :[command] debugger commands.

... printing help topic messages
Debugging:
  Both the standard Verilog statement debugger and a command based debugger
  are supported.  Input is typed from the terminal or read from a file.
  Input is terminated with a new line.  For multi-line commands, all
  but the last line ends with a back slash escaped new line.  The new
  command debugger commands begin with a colon as part of the name and
  cannot be executed from Verilog source.  All interactive commands are
  echoed to the log file unless ':set noecholog' is used to to suppress log
  file command echoing (':set echolog' re-enables).
 
  The debugger is entered by pressing the interrupt key (^c), by calling
  the $stop system task, by the -s command line option, by completing a
  step command, or by hitting a breakpoint.
 
  The $input("[file]") system task causes debugger commands to be read
  from [file] the first time interactive mode is entered (by -s?).  $input
  files do not nest, instead $input in a file causes $input to chain to the
  new file.  Output is written to the screen and the log file.  stderr is
  not used.  All typed user input including command prompts and $input
  commands is written to the log file.  $nolog and $log plus
  $nokeepcommands and $keepcommands can minimize $input script output.
  +nokeepcommands option disables history saving.  It is useful if
  simulation is run from a shell script.

Optimizer:
  When -O optimized simulation (compiled byte code simulation) is used,
  breakpoints and single stepping is not possible because statements
  are converted to basic blocks, i.e. statement separation is lost.
  Even when optimizatin is on, you still can use the debugger because
  the byte code compiler is incremental and recompiles code required
  by debugger Verilog statements.  The debugger can be entered by executing
  $stop system task either from Verilog source or from statements
  entered as debugger commands, i.e. debugger can be entered by $stop
  system task, -s command option, or $stop entered as debugger command
  (such as '@(posedge clk) $stop;' statement), or by pressing ^c (interrupt
  key).  All printing, scope and info commands work.  Also, $input
  system task and -i command line options to load commands into debugger
  are legal when debugger is used with optimized simulation.
 
  For designs that do not move time (mostly procedural without time
  movement and event scheduling), there may be a delay after interrupt
  key is pressed before interactive debugger is entered.
 
  Debugger can only be exited by the dot ('.') continue command when used
  with optimized simulation.  Use of step (';' or ',') and all break point
  commands are illegal.  Error message is emitted and command is ignored.
  Also, $dumpvars can not be called from interactive mode during optimized
  simulation.

Debugging using the tracing mechanism:
  An alternative non interactive tracing mechanism is supported.
  Behavioral statement tracing is started with the -t option or $settrace
  system task and stopped by calling $cleartrace.  Event tracing is started
  with the -et option or $setevtrace system task and stopped by calling
  $clearevtrace.  The -et option allows pre time 0 initialization events
  to be traced.  Trace output is written to stdout and the log file unless
  the +tracefile [file name] option or $settracefile([string]) system task
  are used to direct trace output to a separate file.  The trace mechanism
  is intended to allow debugging of parallel activity by searching trace
  output with a debugger.
 
  Trace statements and gates are reconstructed source with parameters
  replaced by numeric values.  Interactive debugger breakpoint and step
  tracing also emit source lines.  To avoid duplicate output if tracing
  and the interactive debugger are used, redirect trace output.

Debugger differences from standard:
  1) Multiple line interactive debugger commands must end with escaped new
  lines.  Verilog statements still require the ending semicolon.
  2) The standard $settrace system task (also -t) are divided into the two
  tracing classes: $settrace and $setevtrace (-t and -et).
  3) By default when interactive mode is entered the $scope interactive
  scope is set to the current scope.  This allows examination of local
  variables on step or break but may require entering $scope command on
  every interactive entry to run standard scripts.  In functions, named
  blocks do not have scope so function scope remains.  Interactivbe variable
  access in function named block must use qualified reference from function
  scope.  To duplicate standard behavior in which interactive scope can only
  be changed by $scope system task, type: ':set noscopechange' inside the
  interactive debugger.  When re-enabling commands from the history list,
  either the command must use rooted names or the scope must be the same
  as the scope when the command was originally entered.
  4) Delay back annotation by specparam assignments not supported, and
  $updatetiming, but similar standard SDF (LABEL form and PLI 2.0 assignment
  to defparams and specparam before delay elaboration supported.

Interactive Verilog statement execution:
  Any Verilog statement can be entered at the interactive mode prompt (or
  in an $input file) except named blocks and initial or always statements.
  No new variables can be declared and all identifiers are accessed using
  the current scope (entry scope or change $scope location).  Compound
  statements and statements with delay or event controls are legal.
  Commands are:
 
   '.'   Exit the debugger and continue execution (event processing).
   ':'   Print the current instance and possibly task scope plus location
         of scope and current :list current location.  Prints scope and
         listing location, use :where for procedural execution location.
   ';'   Silently step through next procedural statement and process all
         events and time movement up to the next procedural statement. The
         current location for the :list command is not changed.  Tasks and
         functions are stepped into.
   ','   Step through next statement and print next source statement.  Same
         as ';' except the next source line to execute is printed.
   -[number]  Disable history command [number] if it has not yet completed.
         The $history task indicates commands that are active with a '*'
   [number]  Re-execute command [number] from the history list only if the
         command has finished (no '*' mark when printed with $history).
         Commands are re-executed in the current scope so if a command sets
         a change or edge breakpoint, it must contain rooted names or be
         executed from the same scope as it's original entry.

Displaying internal circuit values:
  In addition to the normal $display (or $write) system tasks to display
  values use :print to override declared expression base or width (type
  ':help :print' for legal values). Use :display to define expressions that
  are printed whenever interactive mode is entered.  :display and :print
  take same format and width modifiers.  :expris [expr] to determine the
  width and type of an expression.  Use :varis [var.] to determine type,
  width and declaration keywords of a variable.  Use :whatis [name] to
  determine all uses of an identifier name.  Entire qualified path from
  function scope required for accessing variables in named blocks in
  functions.

Listing source statements:
  The normal $list([scope]) system task can list all of any task or module.
  The :list command lists 10 lines from a selected location that can be
  a scope or a [file:][line] reference or argument relative to last listed
  line.  Type ':set listsize [number]' to change the number of lines listed.
  The current listing location is independent of current scope except when
  :scope or $scope is executed, the current list line is set to the first
  line of the scope.  Also since ',' and :[i]step and hitting a breakpoint
  print a source line, those commands change the current list line.
  The explicit [file:][line] list command lists in a new file and :list ++
  lists the beginning of the next source file (:list -- the previous end).
  Only these three commands can change listing file.  Type ':help :list'
  for the format of the various :list command options.

Setting interactive scope:
  The $scope([scope xmr]) system task changes interactive scope.  The :scope
  command also changes scope but allows a more general reference.  The
  :breakpoint command takes a scope reference argument.  Format is:
 
  [file:][line] - first instance of scope determined by [file:][line].
       [file] can be source file, -y or -v path or any path tail if it is
       unique.  [line] must be between module - endmodule.  Any ':' in
       [file] name must be escaped with a back slash.  Scope set to type or
       first instance but other command argument may select instance for
       :breakpoint.  Scope list line set to first line of scope not [line].
       [line] is same as [file:][line] where [file] is current file.
 .. or .u - upward scope first line - if scope in task - one up task or
       instance containing task (not up instance).
 .d - first line of scope of first contained instance (not contained task).
 [module name]  - first instance of module unless name declared as instance
       in current scope, then normal downward hierarchical reference.
 [hierarchical ref.] - first line of instance - same as $scope argument.

Behavioral statement breakpoints:
  Use the :breakpoint or :ibreakpoint commands to set a breakpoint at a
  specific source statement.  The break occurs before statement execution.
  :breakpoint breaks in all instances and :ibreakpoint breaks only in the
  specified instance.  The :breakpoint argument can be any scope or line
  reference.  If no line reference is given the break is at the first
  initial, always or task statement of the scope.  For :ibreakpoint the
  argument must be an instance reference that may optionally be followed by
  a ',' and a line reference.  For a line reference, the breakpoint is set
  at the first procedural statement at or following the line in the scope.
 
  Type ':help :breakpoint' or ':help :ibreakpoint' for other options and
  argument format.  Use ':info breakpoints' to print a list of breakpoints
  ':delete [number]' to delete breakpoint [number] (no argument deletes all),
  ':disabl [number]' to temporarily disable breakpoint and ':enable [number]'
  to re-enable.  :tbreakpoint and :tibreakpoint are identical to :ibreak
  and :break except breakpoint removed when hit.  :cond adds expression to
  breakpoint that must be true to cause stop. :ignore adds count of how many
  hits to ignore before halting.

Breaking on net changes:
  Enter a delay or event control followed by the $stop system task to
  enter interactive mode on value change.  Normally the event control
  statement will be in a loop (probably a forever) because otherwise the
  break is disabled after each trigger.  Also when interactive mode is
  entered from an interactive $stop, a step (',', ':', :step, or :istep)
  command must be entered before using [number] to re-enable a history
  statement.  For example: 'forever @(posedge clock) $stop;' is usually
  better than '@(posedge clock) $stop;'

History mechanism:
  A command is re-executed by entering its history number.  A uncompleted
  command (such as a Verilog wait or delay control) is disabled by entering
  -[number] where [number] is command's assigned number in history list.
 
  The $history system task prints the most recent 20 (or histlistsize if
  different) history entries.  The debugger :history [optional number]
  command is more flexible because if an optional number argument appears,
  that many elements are printed (0 for all).  The interactive command
  prompt is 'C[number] >' where [number] is a command's history number.
  The one character, [number] to execute, [-][number] to disable and
  incorrect (such as mistyped Verilog statement entered interactively)
  commands are not added to the history list.
 
  All commands input during a run are retained.  Use $nokeepcommands to
  suppress history accumulation and $keepcommands to re-enable in $input
  scripts.  +nokeepcomands command line option disables history saving for
  programs that run a simulation by supplying command input through a pipe.
  :emptyhistory command discards all retained history commands and resets
  command number to one.  If any history commands are enabled (have not yet
  completed or been disabled), :emptyhistory will fail.  When an interactive
  Verilog statement is executed, if it can be executed immediately (no
  delays, events or tasks enables), it is executed from inside debugger and
  control remains in interactive mode.  Non immediate statements are
  scheduled after already scheduled events and resumes.  $stop or the
  interrupt signal (^c) must then be used to reenter interactive mode.  Use
  ':set histlistsize' to set default number of history commands to list and
 ':info histlistsize' to see current number.

Determining and setting internal debugger state values:
  The ':info [debugger value name]' command prints the current value of
  a debugger value.  The ':set [debugger value name] [value]' command
  changes a debugger value.  Type ':help :info' or ':help :set' for the list
  of debugger info value names.

The following system tasks may be useful during interactive debugging:
   $finish;  Terminate simulation.
   $list([scope reference]);  list source lines of scope (:list is
      alternative).  $list does not print variables values, use $showvars
      or :print <expr> for that.  Also $list does not mark source lines
      with pending events.
   $system("[OS command string]");  Escape to a sub shell and execute the
      command string (alternative is :shell [command string]).  Use empty
      string ("") to invoke an interactive sub-shell.
   $flushlog;  Call OS flush of buffers for log file and trace file.  Can
      then use :shell to invoke your editor to inspect output.
   $history;  Print history list to stdout and log file.  Contrary to XL,
      '$history;' prints last 20 (or histlistsize) commands.  Use
      ':history <num>' to print <num> commands.  <num> 0 prints all. :set
      sets and :info prints debugger histlistsize parameter that determines
      number of commands to list.
 $keepcommands;, $nokeepcommands;  Enable (or disable) saving of commands
      entered interactively to history list.  Default is $keepcommands.
      Use the +nokeepcommands command line option to disable saving of
      commands to the history list unless '$keepcommands;' is executed.
   $input([string]);  Process interactive commands from [string] file.
   $nolog;, $log;  All commands in $input scripts will be copied to the
      log file unless $nolog is used.  To re-enable log file output, use
      $log; with no argument.  To change log file use $log([string]).
   $reset;, $reset_count;, $reset_value;  During debugging reset to start
      of simulation.  :reset command is better during debugging since it
      returns to time 0 leaving the reset count unaffected and allows stop.
   $scope;  Change interactive environment scope to avoid a need to type
      full paths for variable names.  :scope and automatic scope tracking
      are intended to lessen need to set explicit interactive scopes.
      $scope can set scope to function named block but next ineractive entry
      (from step?) will change scope to function body scope.
   $showallinstances;  Print all instances in design with source file and
      line location.  Useful to find module whose name is forgotten.
      +printstats and +printallstats give more detailed information.
      If no other window is available, use $flushlog; and :shell to view.
   $showscopes;  Used to show scopes in current interactive scope.  Can be
      called with non zero argument to list entire design scope map.
   $showvariables;, $showvars  Print all variables in current scope. :print
      is more terse but $showvars prints more for multiple fan-in wires.
   $shapshot; print up to 5 pending procedural and 5 pending declarative
      events and status of every interactive thread.  Same as :snapshot.
   $display, $write  Write values.  Alternative :print is more flexible but
      these tasks allow formatted output.

:[command] debugger commands:  :help, :shell, :quit, :where, :print, 
 :reset, :expris, :varis, :whatis, :list, :set, :info, :scope, 
 :breakpoint, :ibreakpoint, :delete, :enable, :disabl, :step, :istep, 
 :history, :emptyhistory, :display, :undisplay, :tbreakpoint, 
 :tibreakpoint, :ignore, :cond, :snapshot, :nextb

... printing : debugger help command messages
:help [optional topic or :[command] name prefix]
   Print help message.

:shell [rest of line is OS command]
   Execute rest of line as OS command in sub-shell.  Notice no quotes needed.
   Empty rest of line to spawn interactive shell.  Equivalent to
   '$system([quotes OS command string]);' system task.

:where
   Print back trace of most recently suspended control thread including all
   upward thread enables with source and scope locations.  To see a listing
   of all pending scheduled event activity and thread states use $snapshot;
   or :snapshot.  :where corresponds as closely as possible to normal
   call stack trace back.  ':' prints instance scope and last source
   listing location.  If :where fails, suspension was from declarative code.
   Try single step and entering :where again.

:quit
   Exit.  Equivalent to $finish;

:print [/format][#width] [expression]
   Evaluate and print expression.  If [/format] is present, interpret the
   value according to format.  Formats are:  'd' (decimal), 'u' (unsigned),
   'b' (binary), 'h' or 'x' (hex), 's' (string), or 'c' (1 character).  If
   the [/format] is omitted, use current default unless the expression is a
   string or real.  Starting default base is hex, but use ':set printbase'
   to set different default base.  /u format prints bit pattern as unsigned.
   If [#width] value is present, interpret as [width] wide, instead of width
   computed from operator width rules.  Any format or width are ignored for
   reals, use $realtobits to view bit pattern.

:reset [stop]
   Reset simulation back to time 0 and restart simulation.  Interactive mode
   must be explicitly entered by interrupt (^c), calling $stop or [stop]
   option.  If a -i startup file was given it is executed on interactive
   entry.  $reset_count and $reset_value are not changed.  If optional
   :reset stop argument is present, stop just before simulation, else rerun
   without stopping even if -s option was given on command line.  Equivalent
   to $reset system task but can be used to restart for debugging models
   that use the $reset system task.  The $reset system task uses the -s
   option unless the first argument is non zero and stops before simulation.
   All uncompleted interactive statements are disabled by either :reset
   or $reset.  They are re-enabled by typing history command number or
   running -i start up interactive file.  Debugger state : breakpoints
   (left enabled) and history are preserved.

:expris [expression]
   Print type and width of expression.  Use to determine Verilog width and
   property rules for complex expressions.

:varis [variable]
   Print type and width and declaration keywords of variable.

:whatis [identifier]
   Print symbol information for every use of identifier.  Also, emits one
   instance reference for each use, so a breakpoint can be set.

:list [range]
   List source within [range] lines.  Some [range]s are relative to last
   printed line.  Any scope change or $list or previous :list command
   changes the last printed line.  Legal [range]s are:
 
     + or [empty]             10 lines starting with last printed.
     +0                       10 lines around current line.
     -                        10 lines ending 1 before previous first line.
     ++                       First 10 lines of next file.
     --                       Last 10 lines of previous file.
     [file]:[number]          10 lines around [number] in file [file].
     [number]                 10 lines around [number] in current file.
     [+/-][offset]            10 lines starting [offset] from current.
     [+/-][num1],[+/-][num2]  Range, if [+/-] offset from current line.
     [scope reference]        First 10 lines starting at [scope].
 
   By default 10 lines are list, use ':set listsize [number]' to change
   number of printed lines to [number].  Notice stepping with ';' does not
   change last printed line.  Use [file]:[number] to list inside `include
   files.  ++ and -- exit to file and line of first inclusion of file.
   Read library files are same as source files.

:set [debugger parameter] [value]
   Set debugger internal parameter to [value].  Legal set parameters are:
 
   :set listsize [number]     Default is 10 lines to list.
   :set histlistsize [number] Default is 20 history commands to list.
   :set noscopechange         Disable automatic scope setting on entry to
                              interactive mode.
   :set scopechange           Re-enable automatic scope setting on.  Scope
                              not set to named blocks in functions.
   :set printbase [base]      Set default :print command base, values: hex
                              (default), decimal, octal binary.
   :set nologecho             Turn off writing of input interactive commands
                              the log file (default).
   :set logecho               Turn on writing of input commands.

:info [debugger parameter]
   Show value of debugger state or parameter setting.  Legal info parameters
   are: listsize, histlistsize, scopechange, breakpoints, displays,
   printbase and logecho.  For breakpoints and auto-display expressions
   prints status information for each.

:scope [scope reference]
   Change interactive scope to [scope reference] location.  Type
   ':help scope' for list of legal scope selection forms.  Any [line] is
   used only to determine surrounding scope.  Scope only applies to
   interactive mode and system tasks that explicitly are defined to use the
   interactive scope.   Extended version of $scope system task.  If scope
   set to function named block scope, next interactive entry will change
   scope to function body scope (assuming scopechange mode active).

:breakpoint [scope reference] or none
   Set statement breakpoint at all instances of [scope reference].  Type
   ':help scope' for a list of legal [scope reference] forms.  If the
   reference selects an instance, only the type of the instance is used.
   If the [scope reference] is not a [file:][line] reference, use first
   initial, always or task statement of scope.  If no argument, set at
   last :list argument (first if range, closest if backward) that must be
   within task, function or initial or always block.  Setting a breakpoint
   at a line means the first procedural statement at or after the line (but
   must be within scope).  Type ':help breakpoints' for discussion of other
   breakpoint commands.

:ibreakpoint [scope reference][,[file:][line]] or none
   Set statement breakpoint at instances of [scope reference] file [file]
   and [line] line.  Type ':help scope' for a list of legal [scope ref.]s,
   but here only explicit instance scope references are legal.  If the
   ',[file:][line]' argument is omitted, use first statement of first
   initial, always, or task (for task scope).  If ',[line]' but no [file]
   is given, use first or only file of scope.  If no scope reference and
   only ',[file:][line]' is given, use current scope.  No argument means
   set at last :list argument (first if range, closest if backward)
   that must be within task, function, or initial or always block.
   Type ':help breakpoints' for discussion of other breakpoint commands.

:delete [optional type] [number]
   Delete breakpoint or display expression with number [number] or all if
   number is omitted.  [optional type] is breakpoints or displays (default
   if omitted is breakpoints).  Type 'info breakpoints' or 'info displays'
   to determine breakpoint or auto-display number.  If [number] is omitted,
   delete all breakpoints or auto-display expressions.

:enable [optional type] [number]
   Enable breakpoint or display with number [number].  [optional type]
   is either breakpoints or displays (breakpoints is default if omitted) and
   can be abbreviated to first letter.  Type 'info breakpoints' or
   'info displays' to determine breakpoint or auto-display expression
   number and enable state.

:disabl [optional type] [number]
   Temporarily disable breakpoint or display with number [number].
   [optional type] is breakpoints or displays (breakpoints is default if
   omitted) and can be abbreviated to first letter. Type 'info breakpoints'
   or 'info displays' to determine breakpoint or auto-display number and
   enable state.  Notice final e must not appear to avoid conflict with
   Verilog disable keyword (any unique prefix such as 'disa' works).  Also
   notice that :disabl disables an added : debugger breakpoint, but disable
   statement or -[number] disables simulation of a Verilog statement.

:step [optional repeat count]
   Step to next procedural line.  Execute one statement or statements on
   current line, stop before first statement of next line.  May process
   pending declarative events before stepping.  Execution steps into any
   task or function.  Equivalent to ',' interactive Verilog command.
   Always prints location after stopping.  if optional repeat count, step
   that many times before stopping and printing message.  If interrupt (^c)
   or breakpoint hit during stepping, stop stepping and enter interactive
   mode.

:istep [optional repeat count]
   Step to next procedural statement that is in same instance tree location.
   Otherwise identical to :step.  If debugger entered by interrupt, use one
   :step before :istep since scope may have been in module without any
   procedural statements.  :istep uses currently executing instance not
   interactive scope set by $scope.

:history [optional number]
   Print 20 (or value of histlistsize info debugger parameter) commands.
   If [number] appears, print [number] (0 means all) history commands.
   Pauses and prompts for CR every histlistsize lines.

:emptyhistory
   If all history commands have completed or are disabled with (-[number]
   command), discard retained history and set next history command to 1.

:display [/format][#width] [expression]
   Set up [expression] in display table so that it is displayed on every
   entry to interactive mode.  Arguments are identical to :print command.
   Use ':delete display' or ':undisplay' to delete all auto-display
   expressions.  If either is followed by a number, delete that numbered
   display only.  Use ':info display' to list current displays.  ':display'
   with no arguments displays all current auto-display expressions.
   Use 'enable display' and 'disabl display' to temporarily turn off or on
   an auto-display expression.

:undisplay [optional number]
   Delete [number] auto-display expression or all current if [number] is
   not present.  Same as ':delete display' command.

:tbreakpoint [scope reference] or none
   Command identical to :breakpoint except breakpoint is temporary and
   removed after it is hit the first time.  To avoid tracing in task or
   function (approximate DBX/GDB next command), use the :nextb command.
   It sets a :tibreak at the next line and executes a '.' command.  Because
   of delay and event controls, other threads may be executed before break
   is hit.  The :ignore command can be used with :tbreakpoint.  After
   ignore count hits, the break point is taken and then removed.

:tibreakpoint [scope reference][,[file:][line]] or none
   Command identical to :ibreakpoint except breakpoint is temporary and
   removed after it his the first time (see :tbreakpoint help).  Only
   stops in instance that is same as scope reference instance.

:ignore [breakpoint number] [ignore count]
   Do not stop at break point [number] until [ignore count] hits of the
   break point have occurred.  Ignore count assumes last hit was 0th.
   To remove an :ignore count, use 'ignore [break number] 0'.  Use
   ':info breakpoints' to determine number of hits and any pending ignore
   count.

:cond [breakpoint number] [optional condition expression]
   Do not stop at break point [number] unless [expression] evaluates to
   a positive non x/z value (i.e. true).  Expression will be checked and
   evaluated in instance and task/function or named block scope of break
   point.  Since Verilog variables persist, :cond expression variable always
   have values.  Conditions are evaluated before ignore counts so if
   condition is false hit count does not rise.  Use ':cond [break number]'
   to remove condition.

:snapshot
   Print snapshot of current procedural location and list of statement at
   which each procedural (per instance) thread suspended at.  Also lists
   pending events on head of event list.  May be long so one way to view it
   is to type: $flushlog; then ':sh [evoke editor on verilog.log file]'.

:nextb
   Abbreviation for :tibreak [line number of next thread statement]
   followed by '.'.  Analog of DBX/GDB next command steps over current
   statement.  Break point is visible and can be removed before it is hit.
   If no next statement in thread, temporary break point not set and error
   message emitted.  :nextb over task enable may execute other threads
   before stopping if the task contains event or delay controls.  :nextb
   and for that matter any temporary break point do not use up a break
   point number unless a new break point is set before temporary break
   point is hit.  See ':help :tbreakpoint' and ':help statements' for
   more information.

C3 > $finish(2);
Halted at location **helpgen3.inp(65) time 0 from call to $finish.
0 simulation events and 0 declarative immediate assigns processed.
Partial optimized sim - 51 behavioral statements (0 procedural suspends).
  Times (in sec.):  Translate 0.0, load/optimize 0.1, simulation 0.2.

.\" $Cver: systasks,man,v 2.4 05/29/07 $
.TH Systasks 1 "Release 3.0" "Pragmatic C Software" "" 
.de LN
.sp
.ti -1.0i
------------------------------------------------------------------------------
.fi
.br
..
.ce
\s+3All Cver System tasks and Functions\s-3
.SP
.SH INTRO
These man pages document every system task and system
function recognized by Cver including those not implemented.
System tasks and functions are mixed together and 
appear in alphabetical order.
Similar tasks and system functions are intermixed.
Functionally similar tasks and functions are combined into
one section and alphabetized according to main task or function.
.PP
For system functions, the SYNOPSIS section contains
normal user function declaration notation to define return type
and argument type even though system functions are never really declared.
There is no concept of separate function header in Verilog.
In the 2005 P1364 LRM most system function are indicated as returning
integer, now that signed values are supported, system functions must
be assigned to an integer or a "signed [31:0]" reg.
.PP
System tasks appear in the SYNOPSIS section using
the task invocation form (i.e. task keyword omitted)
and usually with meta descriptions of parameters.
In Verilog system tasks, unlike user defined tasks,
can always take a variable number of arguments and
optional but not required arguments can be omitted
either with ",," or by ending the argument list.
Some system functions also have optional arguments that
can be omitted.
.PP
In Verilog all strings except $display type format specifiers can be
either expressions that are interpreted as strings (high 0 bits trimmed
off and then interpret each byte as a character) or literal strings
(enclosed by double quotation marks).  Any [file name] can be either
type of string.
.PP
The 2005 P1364 LRM timing checks are not documented here because they do
not vary between simulators and are not really system functions.  See 2005
P1364 LRM section 15 and A.7.5 for documentation of timing checks,
edge control specifiers, and notifiers.
.LN
.SH NAME
$bitstoreal \- convert 64 bit register to real
.br
$realtobits \- convert real to 64 bit register
.br
$itor \- convert integer to real
.br
$rtoi \- convert real to integer by rounding
.SH SYNOPSIS
function real $bitstoreal;
.br
.ti +0.1i
input [63:0] bit_val;
.br
function [63:0] $realtobits; 
.br
.ti +0.1i
input real real_val;
.br
function real $itor;
.br
.ti +0.1i
input integer int_val;
.br
function integer $rtoi;
.br
.ti +0.1i
input real real_val;
.SH DESCRIPTION
System functions to convert to and from reals.  Use $realtobits and 
$bitstoreal to pass reals across module ports.  Use $itor and $rtoi
to convert between integer and real by rounding.  In Verilog, assignments
also implicitly convert to or from a real depending on the left hand
side Lvalue type.  Cver conversion to real from wider than 32 bit
values attempts to preserve as many bits as possible (usually 51 or 52
depending on hardware platform).
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.8.
.LN
.SH NAME
$cleartrace \- turn off statement tracing
.br
$settrace \- turn on statement tracing
.br
$clearevtrace \- turn off declarative event tracing
.br
$setevtrace \- turn on declarative event tracing
.br
$tracefile \-  set separate output file for trace output
.SH SYNOPSIS
$cleartrace;
.br
$settrace;
.br
$clearevtrace;
.br
$setevtrace;
.br
$tracefile([file name]);
.SH DESCRIPTION
Cver supports separate control of statement
and declarative event tracing.
The options -t starts simulation with statement tracing on.
The option minus -et start simulation with event tracing on.
The -t option and $settrace and $cleartrace in
some other simulators enable and disable both types of tracing.
To approximate full tracing in other simulators use both -t and -et
options or call both $settrace and $setevtrace.
.PP
The $tracefile system task set the output file
for tracing (both types) to [file].
The $tracefile argument can be a variable
that is treated as a string with high 0 bits removed. 
An alternative way to set a separate trace output file is with
the +tracefile [file] command line option.  Executing $tracefile
replaces any +tracefile set file.
If $tracefile is not used, trace output is written to STDOUT and
the log file (if it exists).  The tracefile can be the string "stdout"
that has the effect of restoring trace output to default STDOUT and
the log file.  If a trace file is set, trace output is not written to
stdout.
.SH "REFERENCE"
These system tasks are not mentioned in the P1364 LRM because they apply
to the interactive environment not addressed by the standard.
.LN
.SH NAME
$cos \- compute cosine of real input
.br
$sin \- compute sin of real input
.br
$tan \- compute tangent of real input
.br
$acos \- compute arc cosine of real input
.br
$asin \- compute arc sin of real input
.br
$atan \- compute arc tangent of real input
.br
$acosh \- compute hyperbolic arc cosine of real input
.br
$asinh \- compute hyperbolic arc sine of real input
.br
$atanh \- compute hyperbolic arc tangent of real input
.br
$sgn \- compute sign of real input (returns integer)
.br
$int \- convert real input to 32 bit integer (uses C not Verilog conversion)
.br
$ln \- compute nature logarithm of real input
.br
$log10 \- compute base 10 logarithm of real input
.br
$abs \- compute absolute value of real input
.br
$pow \- compute exponent of first real input to second real argument power
.br
$sqrt \- compute square root real input
.br
$exp \- compute e raised to power of real input
.br
$min \- compute minimum of 2 real inputs
.br
$min \- compute maximum of 2 real inputs
.SH SYNOPSIS
 System function identical to IEEE math functions except for added $ prefix
.SH DESCRIPTION
This is non digital P1364 Cver enhancement that is available in digital
Cver because it is required for Verilog-AMS version of Cver.
Functions are defined in Verilog-AMS 2.0 OVI LRM.  Behavior is identical
to behavior documented by Unix math function man pages.
.PP
Cver also allows use of system functions with constant arguments in
constant expressions so parameter definitions such
as "parameter cos2 = $cos(2.0);" are legal in Cver and are part of
new Verilog 2001 standard.  Cver does not yet support constant argument
user functions in constant expressions.
.PP
The following Hspice math library variants are also supported: 
$hsqrt, $hpow, $hpwr, $hlog, $hlog10 $hdb, and $hsign.  See
Hspice documentation for behavior and required arguments.
.SH REFERENCE
See Verilog-AMS 2.0 OVI standard LRM.  Standard IEEE math functions.
See any Hspice documentation.
.LN
.SH NAME
$countdrivers \- return 1 if bus contention because more than one driver
.SH SYNOPSIS
function integer $countdrivers;
.br
.ti +0.1i
// must be wire
.ti +0.1i
input net;
.br
.ti +0.1i
output integer net_is_forced;
.br
.ti +0.1i
output integer number_of_01x_drivers;
.br
.ti +0.1i
output integer number_of_0_drivers; 
.br
.ti +0.1i
output integer number_of_1_drivers; 
.br
.ti +0.1i
output integer number_of_x_drivers; 
.SH DESCRIPTION
System function return 0 if there is no more than one driver
(all wire fan-in is tri-stated (in hiZ state) or a most one fan-in
wire (or select of wire) is non tri-stated).  Returns 1 if there
is more than one non-tri-stated fan-in.  The first net argument is
required.  If a second argument is given, it must be a reg lvalue
expression that is set to the total number of fan-in any state other
than hiZ.  If a third argument is given, it must be a reg lvalue
expression that is set to the total number of fan-in that drives 0.
If a fourth argument is given, it must be a reg lvalue
expression that is set to the total number of fan-in that drives 1.
If a fifth argument is given, it must be a reg lvalue
expression that is set to the total number of fan-in that drives x.
If an argument is omitted, but an argument to its right is needed,
use ",,".  Notice a statement:  "always @w numdriv = $countdrivers(w);" 
does not work since the number of drivers may change without the wire's
value changing especially for strength wires.
Notice that in the LRM, driver usually means non tri-stated fan-in.
Sometimes driver means instead any fan-in whether or not it is tri-stated.
.SH REFERENCE
Defined in 2005 P1364 LRM Appendix C.1
.LN
.SH NAME
$display, $displayb, $displayh, $displayo \- write formatted value to stdout
.br
$write, $writeb, $writeh, $writeo \- write formatted value to stdout
.br
.SH SYNOPSIS
$display([intermixed list of format strings and expressions]);
.br
$display[bho]([intermixed list of format strings and expressions]);
.br
$write([intermixed list of format strings and expressions]);
.br
$write[bho]([intermixed list of format strings and expressions]);
.br
.SH DESCRIPTION
Write formatted values to standard out (and the log file).  The format is
similar to C language printf format except the format string must be
literal, more than one format string can appear followed by values to replace
format references with, only qualifier is 0 that causes trimming of the
value to narrowest field possible.  The %g format for reals is identical
to C language printf %g format.
$display always appends a new line to the end of the displayed string.
For $write, any new line must be explicitly written.  By default, variable
that do not match any format specifier are written in decimal.
Use $displayb and $writeb to change the default to binary, $displayh
and $writeh to change default to hex, and $displayo and $writeo to change
to octal.
.SH "REFERENCE"
Defined in P1364 LRM section 17.1.
.SH "SEE ALSO"
The same format is used by the $fdisplay and $fwrite tasks which write
to file(s), the $monitor and $fmonitor tasks that write changed expressions
at the end of a time slot, and $strobe and $fstrobe that always write
value of an expression at the end of a time slot.
.LN
.SH NAME
$dist_chi_square \- return random 32 bit value in Chi Square distribution
.br
$dist_erlang \- return random 32 bit value in Erlangian distribution
.br
$dist_exponential \- return random 32 bit value in Exponential distribution
.br
$dist_normal \- return random 32 bit value in Standard Normal distribution
.br
$dist_poisson \- return random 32 bit value in Poisson distribution
.br
$dist_t \- return random 32 bit value in Standard T distribution
.br
$dist_uniform \- return random 32 bit value uniformly distributed in range
.SH SYNOPSIS
function integer $dist_chi_square;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer degree_of_freedom;
.br
function integer $dist_erlang;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer k_stage;
.br
.ti +0.1i
input integer mean;
.br
function integer $dist_exponential;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer mean;
.br
function integer $dist_normal;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer mean;
.br
.ti +0.1i
input integer standard_deviation;  
.br
function integer $dist_poisson;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer mean;
.br
function integer $dist_t;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer degree_of_freedom;
.br
function integer $dist_uniform;
.br
.ti +0.1i
inout integer seed;
.br
.ti +0.1i
input integer start;
.br
.ti +0.1i
input integer end;
.SH DESCRIPTION
These are the random deviate generation functions defined in
P1364 LRM.  Algorithm follow "Numerical Recipes in C".  However  
they are somewhat unusual in taking integer arguments and producing
scaled integer outputs rather than the more normal real number inputs
and outputs between 0.0 (sometimes -1.0) and 1.0.
Each distribution function takes a
first argument that is a seed that sets cyclical starting point in the
distribution sequence.
Each function returns a random value according to
the distribution type and updates the seed so that if a passed seed is
saved and reused, both the same value will be returned, and the same new
seed will be set.  This properly allows repeatability for debugging.
.PP
The $dist_chi_square and $dist_t degree_of_freedom values determine the
shape of the distribution (larger values widen the distribution).
The mean parameter used in $dist_erlang, $dist_exponential,
$dist_normal and $disp_poisson cause the average value
returned to converge to the passed mean.
The $dist_normal function standard deviation input parameter determines
shape of the standard normal distribution (larger value widens
the distribution).
The $dist_uniform start and end determine the range within which the
uniformly distributed random number fits.  Start and end may be negative 
but start must be less than end.  The mean, k_stage and degree_of_freedom
parameters must be positive
.SH REFERENCE
Defined 2005 in P1364 LRM section 17.9.2.
.SH "SEE ALSO"
See any statistics textbook or CRC Handbook of Standard Math Tables 
for definitions of the formulas.
Also see "Numerical Recipes in C" for algorithms.
.LN
.SH NAME
$dumpvars \- set up variables that are written to VCD file
.br
$dumpall \- dump current value of all variables set up for dumpvaring
.br
$dumpflush \- make OS call to flush VCD file buffer to file
.br
$dumplimit \- set maximum size of VCD file
.br
$dumpoff \- turn off dumping to VCD file on variable changes
.br
$dumpon \- turn on dumping to VCD file on variable changes
.SH SYNOPSIS
$dumpvars([level], [list of scopes and/or variables to dump]);
.br
$dumpall;
.br
$dumpfile([file name]);
.br
$dumpflush;
.br
$dumplimit([limit number of bytes]);
.br
$dumpoff;
.br
$dumpon;
.SH DESCRIPTION
The $dumpvars system task causes first a header to be written to the
VCD (value change dump) file that defines a short code for each variables.
Then whenever a variable changes, the variable's code and value are
written to the VCD file.  When $dumpvars is first called the value
of all variables is written to the VCD file.
.PP
$dumpvars must be called before any writing of changed variable 
values to the VCD dump file can occur to set up the variables that are
dumped.  The $dumpfile system task can change the name of the VCD dump
file from the default verilog.dump.  It must be called before or at the
same time as $dumpvars.  When $dumpvars is called actual dumping is set
up at the end of that time slot. 
It is an error for $dumpvars to be called more than once.
.PP
$dumpvars takes either scopes or variable names as arguments.
A Variable name (or hierarchical reference) causes just that variable
to be written to the VCD file.  a Scope causes all variables in the
scope and all variables in [level] scopes down to be written to the
VCD file on change.  [level] value 0 means descend to the bottom of the
hierarchy.  If $dumpvars is called with no arguments, all variables in
the design are written to the VCD file.
.PP
$dump limits set the maximum size of the VCD dump file to [limit].  Once
[limit] bytes have been written, no more writing to the dumpvars file occurs.
$dumpoff stop dumping of variables and writes every dumped variable to 
the VCD dump file with unknown (x) value.  $dumpon restarts dumping of
variable changes and starts by writing the current value of every variable
to the VCD dump file.  
.PP
The +dumpvarsextended added Cver option writes a non standard VCD file but
allows strengths (not just the value part) to be written and uses hex
format instead of binary where possible to reduce the VCD file size.
.SH "REFERENCE"
Defined in 2005 P1364 LRM section 18.
.LN
.SH NAME
$fdisplay, $fdisplayb, $fdisplayh, $fdisplayo \- write formatted value to file(s)
.br
$fwrite, $fwriteb, $fwriteh, $fwriteo \- write formatted value to file(s)
.SH SYNOPSIS
$fdisplay([multi-channel or fd], [intermixed list of format strings and expressions]);
.br
$fdisplay[bho]([multi-channel or fd], [intermixed list of format strings and expressions]);
.br
$fwrite([multi-channel or fd], [intermixed list of format strings and expressions]);
.br
$fdisplay[bho]([multi-channel or fd], [intermixed list of format strings and expressions]);
.SH DESCRIPTION
Same as $display and $write but writes to either a Unix style
file stream (abbreviated fd below) or all file descriptors
selected by on bits in passed 32 bit multi-channel descriptor.
For multi-channel descriptors if a bit is on but the file corresponding to
the bit position is not opened with $fopen system function, no write occurs.
The multi-channel descriptor idea allows one $fdisplay to write
to more than one file in contrast to requiring multiple writes.
.PP
The modern Unix OS I/O stream form allows opening a file using the
stream two argument form of $fopen and then using that
strean descriptor (fd) for Unix OS style fwriting.  The old file descriptor
with bit 31 turned on is now used to indicate the new Unix OS style fd stream.
.SH REFERENCE
Defined in 2005 P1364 2005 LRM section 17.2.2.
.SH "SEE ALSO"
See related $display and $write system tasks.  See $fopen and $fclose
for opening and closing new Unix OS file streams and assigning multi-channel
descriptors.
.LN
.SH NAME
$finish \- exit Cver
.SH SYNOPSIS
$finish;
.br
$finish([message level]);
.SH DESCRIPTION
Exit Cver and return control to the host operating system.
if a value is passed, if it is 0 (same as no argument) prints nothing,
if 1 is passed prints normal exit message, and if 1 prints message as
if +verbose option were selected.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.4.1.
.LN
.SH NAME
$flushlog \- flush log and trace file internal OS buffers
.SH SYNOPSIS
$flushlog;
.SH DESCRIPTION
Flush the log file OS buffers.  If the $tracefile system task has
been used to set a separate trace output file, that stream also is flushed.
.SH REFERENCE
Not defined in P1364 LRM but commonly implemented.
.LN
.SH NAME
$fmonitor, $fmonitorb, $fmonitorh, $fmonitoro \- write changed formatted value to file(s)
.SH SYNOPSIS
$fmonitor([multi-channel or fd], [intermixed list of format strings and expressions]);
.br
$fmonitor[bho]([multi-channel of fd], [intermixed list of format strings and expressions]);
.SH DESCRIPTION
If any expression in the format variable list changes, format and write the
value to the new Unix OS file descriptor (fd) or a multi-channel descriptor
file list at the end of the simulation time slot.
If a time returning system functions such as $time appears in the list,
it does not cause a change.  Format is same as $fdisplay.
Any number of $fmonitors may be used and if more than one changed the
format list for each changed $fmonitor is written at time slot end.
.br
.SH "REFERENCE"
Defined in new 2005 P1364 LRM section 17.2.2.  Also 17.1.3 for $fmonitor. 
.SH "SEE ALSO"
$monitor is same but writes to stdout.  See $display for format definitions.
.LN
.SH NAME
$fopen \- open a file and assign a Unix OS stream or multi-descriptor channel bit 
.br
$fclose \- close a file and free for reuse a Unix OS stream or multi-descriptor
.SH SYNOPSIS
function integer $fopen([file name]); 
.br
function integer $fopen([file name], [open description type]);
.br
$fclose([multi-channel or fd]);
.SH DESCRIPTION
Verilog allows writing to multiple open files at once
using a multi-channel file descriptor.
Bit 0 (least significant bit) is associated with stdout and is always open.
The $fclose call closes the file associated with any on bit in the
passed 32 bit multi-channel value.
The file descript form of $fopen system function is passed a file name
(can be any length and need not be a literal string) and returns a
multi-channel descriptor with the next available bit (bit corresponding to
un-opened descriptor channel) set.
$fopen reuses multi-channel bits freed by the file descriptor form of $fclose.
.PP
The new file stream form of fopen can be used to open a Unix OS style
stream.  For opening streams, the 2nd I/O type string must be present.
The strings correspond exactly Unix $fopen I/O types (see 2005 LRM
table 17-7).  The return Unix OS stream has bit 31 turned on.  Therefore
bit 31 can no longer be used for old style file descriptors.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.2.1.
.SH "SEE ALSO"
See $fdisplay, $fwrite, $fmonitor, and $fstrobe routines that write to
multi-channel descriptors or Unix OS streams.
.LN
.SH NAME
$swrite[bho], $sformat - write formatted value to a string
.SH SYNOPSIS
$swrite[bho]([ouput reg], [intermixed list of format strings and expressions]);
.br
$sformat([ouput reg, [format string], [list of arguments]]);
.SH DESCRIPTION
Routines to allow writing to Verilog regs.  $swrite is the same as
$display except the output is written to as a string to a Verilog reg.
$sformat requires exactly one format string.
The remaining arguments are interpreted as
format values (never as format strings).  This allows compile time checking
of formats and is the same as the Unix OS sprintf type routine.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.2.3.
.LN
.SH NAME
$fgetc, $ungetc, $fgets, $fscanf, $sscanf, $fread, $fseek, $ftell, $rewind 
.SH SYNOPSIS
integer $fread([reg], [fd only]);
.br
integer $fread([Verilog array], [fd only]);
.br
integer $fread([Verilog array], [fd only], [start], [count]);
.br
[other routines have same arguments and order as UNIX I/O library input routines]
.SH DESCRIPTION
All the Unix I/O library input routine are implemented.  Except for
binary $fread that can read into arrays so it has extra arguments,
all the read routines are the same as the Unix OS library routines
in behavior and take the same arguments in the same order.
See section 17.2.4.3 for a definition of the $fscanf and $sscanf legal
format strings because formats are available for the Verilog two bit
values and streng values (form v).  Also unformatted binary data
can be read in 2 bit chunks using the %z format and 1 bit values
that are expanded to 4 value Verilog x/z values using the %u format.
.PP
Notice that only I/O streams (fds), not multi-channel descriptors can
be used as the file argument for the file I/O read routines.
Also, notice that the output value from these routines should be assigned
to an integer, not an unsigned value.
$fseek, $fell, $rewind and $ungetc correspond exactly to the Unix I/O library
corresponding routines.  All read routines return the number of items
read or EOF (-1) when end-of-file is read.  You must invoke $ferror to
determine the cause of the error.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.2.4.
.LN
.SH NAME
$fflush - writes any buffer output for an open file or stream
.SH SYNOPSIS
$flush([mcd]);
.br
$flush([fd]);
.br
$flush();
.SH DESCRIPTION
These routine flush any buffered output for either an open multi-channel
descriptor, a Unix OS file stream (fd) or all open multi-channel descriptor
files and streams.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.2.6.
.LN
.SH NAME
$ferror - returns I/O error status
.SH SYNOPSIS
integer $ferror([mcd or fd], str);
.SH DESCRIPTION
This routine correspeonds to the Unix OS I/O library ferror routine.
If an I/O error is detected, the OS error number is returned and the
[str] is set to a string indicating the error reason.  The reason is
the same as the Unix OS returned I/O library error reason string.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.2.7.
.LN
.SH NAME
$getpattern \- function for rapid assignment of memory bits to concatenate of scalars
.SH SYNOPSIS
assign {<list of scalars or selects>]} = $getpattern(<memory>[<index>];
.SH DESCRIPTION
This function must be used on the right hand side of a continuous assignment
where the left hand side is a concatenate of scalars or constant bit selects.
The argument must be a select of memory (normally loaded using $reaadmem)
that is a variable.  When the variable select index is changed the new
memory value determined by the select index will be rapidly (i.e. with
no need for expression evaluation) assigned to the scalars.
Normally the assignment process will be driven by a for loop that increments
the index.  No other use of $getpattern is allowed.
.SH REFERENCE
Defined in 2005 P1364 LRM Appendix C.1
.LN
.SH NAME
$fstrobe, $fstrobeb, $fstrobeh, $fstrobeo \- write formatted value to file at end of time slot
.SH SYNOPSIS
$fstrobe([multi-channel or fd], [intermixed list of format strings and expressions]);
.br
$fstrobe[bho]([multi-channel or fd], [intermixed list of format strings and expressions]);
.SH DESCRIPTION
Same as $fdisplay but formats and writes value at the end of time
time slot rather than when the $fstrobe statement is executed. 
Format is identical to $fdisplay and [bho] suffix letter changes
default for expression that appears outside of any format as with $display.
One formated string is written for every $fstrobe and $strobe executed during
the time slot.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.2.2.
.SH "SEE ALSO"
$strobe is same except writes to stdout.
.LN
.SH NAME
$history \- print list previously executed interactive commands
.br
$nokeepcommands \- do not add executed interactive commands to history list
.br
$keepcommands \- add executed interactive commands to history list 
.SH SYNOPSIS
$history([number of commands to list]);
.br
$keepcommands;
.br
$nokeepcommands;
.SH DESCRIPTION
$history lists either all or [number] of most recently executed interactive
commands.  All commands except history enable, disable, and one character
abbreviation commands are entered in the history list.
Added : debugger commands are also added to the history list.
.PP
Each command is numbered so it can be re-executed by entering [number]
at the interactive prompt and, for scheduled and uncompleted commands,
disabled by typing -[history command number].
$nokeepcommands disables collection of interactive commands
into the history list and $keepcommands enables collection.
Cver keeps all commands entered on the history list until
a :emptyhistory added debugger command is entered at which point the
history list is made empty.
$input command scripts should begin with $nokeepcommands and end with
$keepcommands to minimize history list size.  The added debugger
:history command is more flexible than $history.  Multiple line commands
(end with escaped new line in Cver) are printed as one command. 
.SH REFERENCE
Not defined in 2005 P1364 LRM.  OVI LRM 1.0 section D.8.
.SH "SEE ALSO"
See added debugger online ":help history" command for more detailed 
description of Cver's history mechanism.
.LN
.SH NAME
$input \- enter interactive commands from a file
.SH SYNOPSIS
$input([file]);
.SH DESCRIPTION
$input and the -i [file] Cver command argument cause interactive
commands to be read from [file].  It can contain added debugger
: commands.  If an $input script file contains a $input call,
command reading continues in the new script.  The new script replaces
the old and any un-executed interactive commands after the $input are not
called.  The new script is chained to not called.
Interactive mode must be entered before commands can
be read from the $input file so both -i and $input do nothing unless
interactive mode is entered.  $input should not appear in Verilog source. 
.SH REFERENCE
Defined in 2005 P1364 LRM section C.3.
.SH "SEE ALSO"
See added debugger online ":help debugging" for additional documentation.
.LN
.SH NAME (NOT SUPPORTED BY CVER)
$key \- save every press key stroke to a file
.br
$nokey \- disable saving of key strokes
.SH DESCRIPTION
Cver does not support $key because it depends on the original XL scheme
for tracking asynchronous interrupts and is not compatible with Cver's
added : debugger and line continuation scheme. 
.PP
There are two better ways to allow restarting and simulating to a particular
problem statement at a particular problem time.
First, prepare a $input script and use -s with -i command
options to rerun the script.  Second, use the added :ibreak or :break
breakpoint command with the :ignore [count] command to skip [count]
break points to return to the problem time.  Use :info breakpoint to
determine the number of times a break point was hit.  Alternative
use the :breakpoint command :cond [expression] command to attach a
condition to a statement break point.
.SH REFERENCE
See 2005 P1364 LRM section C.4.
.SH "SEE ALSO"
See added debugger :help online help system messages.
.LN
.SH NAME
$list \- list source reconstructed from internal data base for scope
.SH SYNOPSIS
$list([scope]);
.SH DESCRIPTION
List scope to stdout and the log file by reconstructing source from
Cver's internal representation.  All parameters and specparams are
displayed as numeric constants.  If no argument is given, list the current
scope.  If the -d command line option is used, reconstructed source
for an entire design is output.  If $list is executed from interactive
mode, the current interactive scope (maybe set with the $scope system
task is used).  It is better from interactive mode to use the :list
added debugger command that prints source lines exactly as they appear
in the source input and allows more control of lines to list.
.SH REFERENCE
See 2005 P1364 LRM section C.5.
.SH "SEE ALSO"
Type ":help :list" in interactive mode for
documentation of :list range specification.
.LN
.SH NAME
$log \- set new log output file or re-enable writing to log file
.br
$nolog \- disable writing to the log file
.SH SYNOPSIS
$log;
.br
$log([file name]);
.br
$nolog;
.SH DESCRIPTION
Normally all terminal (stdout) output is written to the log file that
has name verilog.log and is over-written for each new run of Cver
command option set the log file to [file].  Another
way to disable writing to the log file is to use file name /dev/null on
Unix and nul on OS2/DOS.
.SH REFERENCE
See 2005 P1364 LRM section C.6.
.LN
.SH "NAME (CVER EXTENSION)"
$memuse \- print message giving dynamically allocated memory.
.SH SYNOPSIS
$memuse;
.SH DESCRIPTION
System task that can be called to output to stdout and the log file
the number of bytes of dynamically allocated memory.
Rather useless added system task since it is better to use the +verbose
option.
.SH REFERENCE
Cver extension not mentioned in the P1364 LRM.
.LN
.SH NAME
$monitor, $monitorb, $monitorh, $monitoro \- write changed formatted value to file(s)
.br
$monitoroff- disable display of monitor changes
.br
$monitoron- re-enable display of monitor changes
.SH SYNOPSIS
$monitor([intermixed list of format strings and expressions]);
.br
$monitor[bho]([intermixed list of format strings and expressions]);
.br
$monitoron;
.br
$monitoroff;
.SH DESCRIPTION
If any expression in the format variable list changes, format and write the
value to stdout and the log file at the end of the simulation time slot. 
Only one $monitor can be active at a time.  Execution of a new monitor
replaces the previous (see $fmonitor if multiple active monitors are
needed, use multi-channel channel 0 to write to stdout and log file).
If a time returning system functions such as $time appears in the list, it
does not cause a change.  Format is same as $fdisplay. $monitoroff turns
off display of changed monitor values and $monitoron re-enables writing
of changed formatted values.
.SH "REFERENCE"
Defined in 2005 P1364 LRM section 17.1.3.
.SH "SEE ALSO"
$fmonitor is same but writes to file using multi-channel descriptor,
See $display for format documentation.
.LN
.SH NAME
$q_add \- place an entry on a queue
.br
$q_exam \- get selected queue status information
.br
$q_initialize \- create a new queue
.br
$q_remove \- get an entry from a queue
.br
$q_full \- return 1 if a queue if full else 0
.SH SYNOPSIS
$q_add;
.br
.ti +0.1i
input integer q_id; // unique number to identify queue
.br
.ti +0.1i
input integer job_id; // unique number to identify job
.br
.ti +0.1i
input integer inform_id; // user defined value added to queue
.br
.ti +0.1i
output integer status; // completion status
.br
$q_exam;
.br
.ti +0.1i
input integer q_id; // unique number to identify queue
.br
.ti +0.1i
input integer q_stat_code; // what to return in q_stat_value
.br
.ti +0.1i
output integer q_stat_value;// returned value selected by q_stat_code  
.br
.ti +0.1i
output integer status; // completion status
.br
$q_initialize
.br
.ti +0.1i
input integer q_id; // unique number to identify queue
.br
.ti +0.1i
input integer q_type; // type, 1=fifo, 2=lifo 
.br
.ti +0.1i
input max_length; // maximum number of elements allowed in queue
.br
.ti +0.1i
output integer status; // completion status
.br
$q_remove;
.br
.ti +0.1i
input integer q_id; // unique number to identify queue
.br
.ti +0.1i
input integer job_id; // unique number to identify job
.br
.ti +0.1i
input integer inform_id; // user defined value removed from queue
.br
.ti +0.1i
output integer status; // completion status
.br
function integer $q_full;
.br
.ti +0.1i
input integer q_id; // unique number to identify queue
.br
.ti +0.1i
output integer status; // completion status
.SH DESCRIPTION
In combination with stochastic random distribution (deviate) generators,
these routines provide routines to model statistical queue for driving designs.
Use the PLI routines for queues that must contain values more complicated
that 32 bit integers (or regs).
.PP
for $q_exam, the possible request types are: 1=current queue length,
2=mean inter-arrival time, 3=maximum queue length, 4=shortest wait time
ever, 5=longest wait time for jobs still in queue, and 6=average wait time
in the queue.  Any queue routine may set the status output parameter to:
1=OK, 2=queue full, cannot add, 3=undefined q_id, 4=unsupported queue type,
cannot create queue, 5=specified length <=0, cannot create, 
6=duplicate q_id, cannot create, not enough memory, cannot create.
.SH "REFERENCE"
Defined in 2005 P1364 LRM section 17.6.
.LN
.SH NAME
$random \- generate signed random 32 bit value
.SH SYNOPSIS
function integer $random; 
.br
.ti +0.1i
inout integer seed;
.ti +0.1i
integer seed;
.SH DESCRIPTION
Cver uses good BSD random number generator that produces values
with almost 32 pseudo random bits, but the sequence of generated
number will probably not match the one returned by other simulators.
If the the optional seed variable lvalue is given, the starting location
in the 2**32 (almost) element sequence of pseudo random values is altered.
Because the random generator only used 32 bit arithmetic the low
bit is unrandom.
.SH REFERENCE
See 2005 P1364 LRM section 17.9.1.
.LN
.SH NAME
$readmemb \- read binary number from memory stored in file
.br
$readmemh \- read hex number from memory stored in file
.br
$sreadmemb \- read binary number from memory stored in string
.br
$sreadmemh \- read hex number from memory stored in string
.SH SYNOPSIS
$readmemb([file name], [memory name], [start_addr], [finish_addr]);
.br
$readmemh([file name], [memory name], [start_addr], [finish_addr]);
.br
$sreadmemb([memory name], [start_address], [finish_addr], [list of strings]);
.br
sreadmemb([memory name], [start_address], [finish_addr], [list of strings]);
.SH DESCRIPTION
These system tasks read values from either a file or a string (the
$smemread[bh] routines).  The format of the file or string, from which to
the memory is filled, is a list of white space separated values.  The
values can contain digits, '_', x and z but no width specification.
For $readmemb and $sreadmemb the values must be binary.  For $readmemh
and $sreadmemh, the values must be hex.
.PP
The basic memory filling algorithm is to read a word from the file or string,
fill the current memory location, then increment the memory counter 
(decrement if [start_addr] is larger than [finish_addr]). 
The special value @[hexadecimal number] in the file or string
changes the next address to write the memory data word into. 
If @[value] form changes to an address outside the range, memory
filling stops.
Memory address outside the range or outside the number of elements in
the file or string are not changed.
For $smemread routines, a list of strings is legal.  The arguments may
be arbitrary run time expressions that are converted to strings.  The
list of strings is concatenated into one long string and read exactly
as if a file read of the string happened.  The list of strings is required
because Verilog does not allow strings to span line boundaries.
.PP
For $readmemb and $readmemh the [file] as a string (possibly an expression
that is converted to a string) and the memory identifier are required.
For $sreadmemb and $sreadmemh the memory identifier and at least one string
are required.  The [start_addr] and [finish_addr] are optional (must be
indicated by ,, for $sreadmem functions) and give the first address in
the memory to use to write the first data word from the file or string into.
If the [finish_addr] is present, when that memory address is reached, filling
of the memory is stopped.  It is legal for [start_address] to be larger than
[finish_addr] in which case the memory if filled from high to low word.
If only [start_address] is given, [finish_addr] is the last (second)
memory declaration range.  If only [finish_addr] is given, [start_addr]
is the start (first) memory declaration range.
.SH "REFERENCE"
See 2005 P1364 LRM sections and 17.2.9 and C.13.
.LN
.SH NAME
$reset \- reset time to 0 and restart the simulation
.br
$reset_value \- returns value passed by most recent call of $reset
.br
$reset_count \- returns the number of times $reset has been executed
.SH SYNOPSIS
$reset([stop_value], [reset_value], [diagnostics_value]); 
.br
function integer $reset_value;
.br
function integer $reset_count;
.SH DESCRIPTION
$reset allows rerunning a simulation from time 0 without re-translating
a model.  It can have up to 3 optional arguments.  If [stop_value] is   
omitted or value 0, interactive mode is entered after reset.  If [reset_value]
is present, it is preserved across the reset and can be read with the
the #reset_value system function after completing the reset. The optional
[diagnostic value] argument determines the amount of diagnostic information
printed after reset but prior to starting again at time 0.  Value 0 causes
no information to be emitted, 1 some information, and 2 is equivalent to
the +verbose option.  The $reset_count system function returns the number
of times the $reset system task has been executed during the current run.
.PP
Cver also supports the :reset [option stop] added command debugger.
It does not effect either the [reset_value] or the number of times
$reset has been called so models that rely on $reset values can be debugged.
In Cver, all : added debugger setting are preserved except break
points and display expressions are disabled but not removed.
Either type of reset removes all quasi-continuous forces and assigns.
If a simulation is started with -s and -i [file], $reset will cause
simulation to start over in interactive mode running the first command
in [file].  Cver will never stop unless $reset_count is checked and
used to cause end of simulation.
.SH REFERENCE
See 2005 P1364 LRM section C.7.
.SH "SEE ALSO"
See debugger online help for :reset added debugger command.
.LN
.SH NAME (NOT IMPLEMENTED)
$save \- save state of simulation to a file for later restart
.br
$incsave \- save only changed values from last $save to a file
.br
$restart \- restart simulation from a $save file
.SH SYNOPSIS
$save([file]);
.br
$incsave([file]);
.br
$restart([file]);
.SH DESCRIPTION
Cver does not yet support simulation check pointing that is needed for long
simulations especially in cases where power or hardware failures occur.
Cver design translation from source is fast enough that at least
so far loading the binary data structure does not reduce load time.
$incsave will probably not be supported since Cver already packs to the
bit in order to support it, extra simulation event are needed.
.SH REFERENCE
See 2005 P1364 LRM section C.8.
.LN
.SH NAME
$scale \- convert a time value from one module's time scale to another as real
.SH SYNOPSIS
function real $scale;
.br
.ti +0.1i
input [time hierarchical value as either real or reg];
.SH DESCRIPTION
Given a time value as an hierarchical reference, convert to the time scale
in which the $scale system task is executed.  Usage: r = $scale(top.i1.i2.t1);
.SH REFERENCE
See 2005 P1364 LRM section C.9.
.LN
.SH NAME
$scope \- change scope for use by interactive commands
.SH SYNOPSIS
$scope([hierarchal name]);
.SH DESCRIPTION
Use scope to change interactive scope from the default first top module
for use after entering the interactive debugger.  $scope is not very
useful in Cver because, unless turned off by a debugger :set command,
upon debugger entry (by $stop or interrupt) the interactive scope is
set to the entering simulation scope.  Also Cver supports an extended
:scope command that allow relative movement between scopes and general
reference for new scopes such as line numbers.
.SH REFERENCE
See 2005 P1364 LRM section C.10.
.SH "SEE ALSO"
See the added debugger ":help :scope" help screen.
.LN
.SH NAME
$sdf_annotate \- XL compatible sdf annotation system task
.SH SYNPOSIS
$sdf_annotate([required name of sdf file], [optional annotation scope],
[optional ignored - no config files yet],
[optional ignored - no separate sdf log file],
[optional mintypmax SDF override], [optional ignored - no scale factor], 
[optional ignored - no scale type]); 
.SH DESCRIPTION
System function alternative to +sdf_annotate command line option.
Function identical to XL $sdf_annotate system task so Verilog source that
in XL can be run without change in Cver.  $sdf_annotate system task  
also allows conditional choice of sdf annotation file.
Third optional configuration file argument is ignored because Configurations
are not yet supported in Cver.  Optional fourth argument name of separate log
file is ignored because Cver writes all sdf messages to normal log file.
Sdf annotation has also been changed to match XL so simulation continues
even if SDF contains errors.  As much annotation as possible is made if
SDF contains errors.  Fourth optional mintypmax override argument is supported.
Legal values are one of MINIMUM, TYPICAL, or MAXIMUM.  Optional sixth
scale factor and seventh scale factor type arguments are ignored.
Extra scaling of SDF values in Cver is not supported.
.SH REFERENCE
De facto standardized routine.  See document for any of the other
Verilog simulators such as XL.
.LN
.SH NAME
$showallinstances
.SH SYNOPSIS
$showallinstances;
.SH DESCRIPTION
For every module in design, print its instance and gate usage in tabular
form.  This system tasks prints at run time the instance design statistics
table printed by the +printstats command argument.
.SH REFERENCE
Not in P1364 LRM but commonly part of interactive environments. 
.LN
.LN
.SH NAME
$showscopes \- display list of all scopes inside the current scope
.SH SYNOPSIS
$showscopes([value]);
.SH DESCRIPTION
List all scope objects in current scope.
If invoked from interactive mode,
the scope is the current interactive scope. 
If called during simulation, scope is current simulation scope.
If value is present and non zero, print all scopes in or below the
current scope to be output to stdout and the log file.
.SH REFERENCE
See 2005 P1364 LRM section C.11.
.LN
.SH NAME
$showvars \- show information about variables
.br
$showvariables \- alternative name for $showvars task 
.SH SYNOPSIS
$showvars([optional list of variables]);
.SH DESCRIPTION
Display information about variables.  If no argument is given, display
information about all variables in current scope.  If a list of variables
is given display information about each variable.  Hierarchical references
are allowed.  Cver's added interactive debugger supports additional commands
for examining variable values and information.  Use the :help data debugger
command for more information.
.SH REFERENCE
See 2005 P1364 LRM section C.12.
.SH "SEE ALSO"
See :print, :whatis, :expris, :varis added debugger commands.
.LN
.SH NAME (CVER EXTENSION)
$snapshot \- display active procedural thread tree and pending events
.SH SYNOPSIS
$snapshot;
.SH DESCRIPTION
Mechanism to print a snapshot of procedural
location, pending events and thread execution status.
If interactive debugger is disabled interrupt (^c)
causes $snapshot to be called.
Most information also generated by :where added debugger command.
If you think some tasks or initial/always blocks should be
active but they are not, or you think they should have completed but
they have not, put $snapshot in your source or invoke from interactive
mode to see the procedural active tree.
.SH REFERENCE
Not in P1364 LRM. 
.LN
.SH NAME
$stop \- enter interactive debugger
.SH SYNOPSIS
$stop;
.br
$stop([message level]);
.SH DESCRIPTION
Enter interactive debugger and if [message level] is 1 or 2,
print a message.  1 prints simulation time and 2 prints +verbose  
simulation statistics.  Interactive debugger can also be entered by
pressing interrupt key (usually ^c) or from the -s option.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.4.
.LN
.SH NAME
$strobe, $strobeb, $strobeh, $strobeo \- write formatted value to terminal at end of time slot
.SH SYNOPSIS
$strobe([intermixed list of format strings and expressions]);
.br
$strobe[bho]([intermixed list of format strings and expressions]);
.SH DESCRIPTION
Same as $display but formats and writes value at the end of time
time slot rather than when the $strobe statement is executed. 
Format is identical to $display and [bho] suffix letter changes
default for expression that appears outside of any format as with $display.
One format is written to stdout and log file for every $strobe executed during
the time slot.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.1.2 and 17.2.2.
.SH "SEE ALSO"
$fstrobe is same except writes to multi-channel file(s).
.LN
.SH NAME
$suppress_warns
.br
$allow_warns
.SH SYNOPSIS
$suppress_warns([comma separated list of warning or inform numbers]);
.br
$allow_warns([comma separated list of warning or inform numbers]);
.SH DESCRIPTION
It is possible to suppress writing of run time warning and inform messages
by calling the $suppress_warns system task with a list of numbers that
are printed when a warning or inform message is printed. 
Messages of class ERROR and FATAL ERROR can not be suppressed.
The +suppress_warns+[list of + separated numbers] command line option
also suppresses printing of messages and is the only way to suppers.
translation time messages.  $allow_warns re-enables printing of run
time messages.
.SH "REFERENCE"
These system tasks are a Cver extension.
.SH "SEE ALSO"
See +suppress_warns+[num]+[num]+... option. 
.LN
.SH NAME
$system \- execute operating system command from within Cver
.SH SYNOPSIS
$system([OS command line]);
.SH DESCRIPTION
Execute some operating system command string by means of a shell escape.
$system; with no arguments or an empty argument runs an interactive shell
if one is supported for the system you are running Cver on.
The semantics of this task is slightly different on Unix based and non
Unix systems.
If you are running with multiple shell windows, it is better to execute
commands in another window because a core dump will probably also cause
Cver to core dump.
.SH REFERENCE
Not defined in P1364 LRM but commonly implemented.
.LN
.SH NAME
$test$plusargs \- test Cver for existence of command argument
.br
$scan$plusargs \- scan Cver command arguments to match prefix 
.SH SYNOPSIS
function integer $test$plusargs([string]); 
.br
function $scan$plusargs([plus option prefix as string], [string lvalue]);
.SH DESCRIPTION
$test$plusargs returns 1 if the argument appeared in the Cver command
invocation argument list.
The string expression argument must not include the leading + and must
match an entire argument.  Only Cver command arguments that begin with +
are checked for a match.
.P
The $scan$plusargs system function is equivalent
to PLI tf_ mc_scan_plusargs function.
The first argument is plus option (without +) prefix as string expression.
Second argument is lvalue expression that is assigned the remainder
of the string to the right of the matched prefix.
Returns 1 if match and assign tail, 0 if no match and no assign.  
In -f files, tokenization is by white space only so file=xx is legal,
but depending on your shell the option
may need to be quoted if given on the command line.
Standard $test$plusargs supported and return
1 if entire string matches (no leading +) else 0.
.SH REFERENCE
Not defined in P1364 LRM. $test$plusargs is commonly implemented.
$scan$plusargs allows use of PLI tf_ mc_scan_plusargs without linking
in the PLI.
.LN
.SH NAME
$time \- return time scaled to module as 64 bit time value
.br
$realtime  \- return time scaled scaled to module as real 
.br
$stime \- return time scaled to module as 32 bit value
.br
$tickstime \- return time in internal simulation ticks as 64 bit value
.br
$stickstime \- return time in internal simulation ticks as 32 bit value
.SH SYNOPSIS
function time $time;
.br
function real $realtime;
.br
function [31:0] $stime;
.br
function time $tickstime;
.br
function [31:0] $stickstime;
.SH DESCRIPTION
$time returns current time as 64 bit unsigned time value.
It is scaled to time units of the module the $time task is invoked from.
$realtime is the same as $time except the value
returned is real and the $timeformat scale values
are used to determine real value fraction accuracy.
$stime is the same as $time except value is truncated to 32 bits.
$tickstime returns current time in internal simulation ticks
(smallest module time scale in design) in a 64 bit value.
$stickstime is the same as $tickstime
except it is truncated to fit in 32 bits.
Simulation ticks are the minimum time scale unit in
any module and is the value used internally during simulation.
.SH REFERENCE
Defined in 2005 P1364 LRM section 17.7.
$tickstime and $stickstime are Cver extensions.
.LN
.SH NAME
$printtimescale \- display time unit and precision for a module
.br
$timeformat \- specify format for the %t $display format specifier
.SH SYNOPSIS
$printtimescale([hierarchical_name]);
.br
$timeformat([units_number], [precision number], [suffix_string], [minimum_field_width]);
.SH DESCRIPTION
The $printtimescale system task displays
time unit and precision for a particular module.
If the argument is omitted,
the information for the current module is printed.
.PP
The $timeformat system task sets the format for the %t format specifier.
.SH REFERENCE
See 2005 P1364 LRM section 17.3 and the `timescale directive discussion 
section 19.8.
.LN
.SH "TRADEMARKS AND COPYRIGHT"
Verilog is a Trademark of Cadence Design Systems Licensed to
Open Verilog International.
.br
Cver, CVC and Vcmp are Trademarks of Pragmatic C Software Corporation.
.sp
Copyright (c) 1991-2007 Pragmatic C Software.  All Rights Reserved.
.br
This document contains confidential and proprietary information
.br
belonging to Pragmatic C Software Corp.

# Make file for creating a CVER DLL and create
# an executable using the DLL
#

SHELL=/bin/sh

CC=gcc

DLLOBJS=cver.o v_acc.o v_cnv.o v_dbg.o v_dbg2.o v_del.o \
			v_ex.o v_ex2.o v_ex3.o v_ex4.o v_fx.o v_fx2.o \
			v_fx3.o v_ms.o v_prp.o v_prp2.o v_sdf.o v_sim.o \
			v_src.o v_src2.o v_src3.o v_tf.o v_trch.o \
			v_vpi.o v_vpi2.o v_vpi3.o

EXEOBJS=dig_main.o


dll: $(DLLOBJS)
	$(CC) -shared -o libcver.dll -Wl,--out-implib=libcver.dll.a \
		-Wl,--export-all -Wl,--enable-auto-image-base \
		-Wl,--export-dynamic -Wl,--output-def=libcver.def $(DLLOBJS)

exe: $(EXEOBJS)
	$(CC) -o cver.exe $(EXEOBJS) -L./ -lcver -lm

/******************************************************************************
* acc_user.h
*
* IEEE 1364 1995 Verilog HDL Programming Language Interface (PLI).
*
* This file contains the constant definitions, structure definitions, and
* routine declarations used by the Verilog PLI procedural interface TF 
* task/function routines. 
*
* The file should be included with all C routines that use the PLI ACC
* routines.
******************************************************************************/
#ifndef ACC_USER_H
#define ACC_USER_H

/*---------------------------------------------------------------------------*/
/*------------------------------- definitions -------------------------------*/
/*---------------------------------------------------------------------------*/

/*----------------------------- general defines -----------------------------*/
typedef int    *HANDLE;
typedef int    *handle;

#define bool   int
#define true   1
#define TRUE   1
#define false  0
#define FALSE  0

#define glboal extern
#define exfunc
#define local  static
#define null   0L

/*------------------------------- object types ------------------------------*/
#define    accModule               20
#define    accScope                21
#define    accNet                  25
#define    accReg                  30
#define    accRegister             accReg
#define    accPort                 35
#define    accTerminal             45
#define    accInputTerminal        46
#define    accOutputTerminal       47
#define    accInoutTerminal        48
#define    accCombPrim            140
#define    accSeqPrim             142
#define    accAndGate             144
#define    accNandGate            146
#define    accNorGate             148
#define    accOrGate              150
#define    accXorGate             152
#define    accXnorGate            154
#define    accBufGate             156
#define    accNotGate             158
#define    accBufif0Gate          160
#define    accBufif1Gate          162
#define    accNotif0Gate          164
#define    accNotif1Gate          166
#define    accNmosGate            168
#define    accPmosGate            170
#define    accCmosGate            172
#define    accRnmosGate           174
#define    accRpmosGate           176
#define    accRcmosGate           178
#define    accRtranGate           180
#define    accRtranif0Gate        182
#define    accRtranif1Gate        184
#define    accTranGate            186
#define    accTranif0Gate         188
#define    accTranif1Gate         190
#define    accPullupGate          192
#define    accPulldownGate        194
#define    accIntegerParam        200
#define    accIntParam            accIntegerParam
#define    accRealParam           202
#define    accStringParam         204
#define    accTchk                208
#define    accPrimitive           210
#define    accBit                 212
#define    accPortBit             214
#define    accNetBit              216
#define    accRegBit              218
#define    accParameter           220
#define    accSpecparam           222
#define    accTopModule           224
#define    accModuleInstance      226
#define    accCellInstance        228
#define    accModPath             230
#define    accWirePath            232
#define    accInterModPath        236
#define    accScalarPort          250
#define    accBitSelectPort       252
#define    accPartSelectPort      254
#define    accVectorPort          256
#define    accConcatPort          258
#define    accWire                260
#define    accWand                261
#define    accWor                 262
#define    accTri                 263
#define    accTriand              264
#define    accTrior               265
#define    accTri0                266
#define    accTri1                267
#define    accTrireg              268
#define    accSupply0             269
#define    accSupply1             270
#define    accNamedEvent          280
#define    accEventVar            accNamedEvent
#define    accIntegerVar          281
#define    accIntVar              281
#define    accRealVar             282
#define    accTimeVar             283
#define    accScalar              300
#define    accVector              302
#define    accCollapsedNet        304
#define    accExpandedVector      306
#define    accUnExpandedVector    307
#define    accProtected           308
#define    accSetup               366
#define    accHold                367
#define    accWidth               368
#define    accPeriod              369
#define    accRecovery            370
#define    accSkew                371
#define    accNochange            376
#define    accNoChange            accNochange
#define    accSetuphold           377
#define    accInput               402
#define    accOutput              404
#define    accInout               406
#define    accMixedIo             407
#define    accPositive            408
#define    accNegative            410
#define    accUnknown             412
#define    accPathTerminal        420
#define    accPathInput           422
#define    accPathOutput          424
#define    accDataPath            426
#define    accTchkTerminal        428
#define    accBitSelect           500
#define    accPartSelect          502
#define    accTask                504
#define    accFunction            506
#define    accStatement           508
#define    accTaskCall            510
#define    accFunctionCall        512
#define    accSystemTask          514
#define    accSystemFunction      516
#define    accSystemRealFunction  518
#define    accUserTask            520
#define    accUserFunction        522
#define    accUserRealFunction    524
#define    accNamedBeginStat      560
#define    accNamedForkStat       564
#define    accConstant            600
#define    accConcat              610
#define    accOperator            620
#define    accMinTypMax           696
#define    accModPathHasIfnone    715

/*------------------ parameter values for acc_configure() -------------------*/
#define    accPathDelayCount        1
#define    accPathDelimStr          2
#define    accDisplayErrors         3
#define    accDefaultAttr0          4
#define    accToHiZDelay            5
#define    accEnableArgs            6
#define    accDisplayWarnings       8
#define    accDevelopmentVersion   11
#define    accMapToMipd            17
#define    accMinTypMaxDelays      19

/*------------ edge information used by acc_handle_tchk(), etc.  ------------*/
#define accNoedge                   0
#define accNoEdge                   0
#define accEdge01                   1
#define accEdge10                   2
#define accEdge0x                   4
#define accEdgex1                   8
#define accEdge1x                  16
#define accEdgex0                  32
#define accPosedge                 13
#define accPosEdge                 accPosedge
#define accNegedge                 50
#define accNegEdge                 accNegedge

/*------------------------------- delay modes -------------------------------*/
#define accDelayModeNone            0
#define accDelayModePath            1
#define accDelayModeDistrib         2
#define accDelayModeUnit            3
#define accDelayModeZero            4
#define accDelayModeVeritime        5

/*------------ values for type field in t_setval_delay structure ------------*/
#define accNoDelay                  0
#define accInertialDelay            1
#define accTransportDelay           2
#define accPureTransportDelay       3
#define accForceFlag                4
#define accReleaseFlag              5
#define accAssignFlag               6
#define accDeassignFlag             7

/*------------ values for type field in t_setval_value structure ------------*/
#define accBinStrVal                1
#define accOctStrVal                2
#define accDecStrVal                3
#define accHexStrVal                4
#define accScalarVal                5
#define accIntVal                   6
#define accRealVal                  7
#define accStringVal                8
#define accVectorVal               10

/*------------------------------ scalar values ------------------------------*/
#define acc0                        0
#define acc1                        1
#define accX                        2
#define accZ                        3

/*---------------------------- VCL scalar values ----------------------------*/
#define vcl0                        acc0
#define vcl1                        acc1
#define vclX                        accX
#define vclZ                        accZ

/*----------- values for vc_reason field in t_vc_record structure -----------*/
#define logic_value_change          1
#define strength_value_change       2
#define real_value_change           3
#define vector_value_change         4
#define event_value_change          5
#define integer_value_change        6
#define time_value_change           7
#define sregister_value_change      8
#define vregister_value_change      9
#define realtime_value_change      10


/*--------------------------- VCL strength values ---------------------------*/
#define vclSupply                   7
#define vclStrong                   6
#define vclPull                     5
#define vclLarge                    4
#define vclWeak                     3
#define vclMedium                   2
#define vclSmall                    1
#define vclHighZ                    0


/*----------------------- flags used with acc_vcl_add -----------------------*/
#define vcl_verilog_logic           2
#define VCL_VERILOG_LOGIC           vcl_verilog_logic
#define vcl_verilog_strength        3
#define VCL_VERILOG_STRENGTH        vcl_verilog_strength


/*---------------------- flags used with acc_vcl_delete ---------------------*/
#define vcl_verilog                 vcl_verilog_logic
#define VCL_VERILOG                 vcl_verilog


/*---------- values for the type field in the t_acc_time structure --------- */
#define accTime                     1
#define accSimTime                  2
#define accRealTime                 3


/*------------------------------ product types ------------------------------*/
#define accSimulator                1
#define accTimingAnalyzer           2
#define accFaultSimulator           3
#define accOther                    4

/*---------------------------------------------------------------------------*/
/*---------------------- global variable definitions ------------------------*/
/*---------------------------------------------------------------------------*/
extern bool acc_error_flag;
typedef int (*consumer_function)();

/*---------------------------------------------------------------------------*/
/*-------------------------- structure definitions --------------------------*/
/*---------------------------------------------------------------------------*/

/*---------------- data structure used with acc_set_value() -----------------*/
typedef struct t_acc_time
{
  int type;
  int low, 
      high;
  double real;
} s_acc_time, *p_acc_time;

/*---------------- data structure used with acc_set_value() -----------------*/
typedef struct t_setval_delay
{
  s_acc_time time;
  int model;
} s_setval_delay, *p_setval_delay;

/*-------------------- data structure of vector values ----------------------*/
typedef struct t_acc_vecval
{
  int aval;
  int bval;                                    
} s_acc_vecval, *p_acc_vecval;

/*----- data structure used with acc_set_value() and acc_fetch_value() ------*/
typedef struct t_setval_value
{
 int format;
 union
   {
    char *str;
    int scalar;
    int integer;
    double real;
    p_acc_vecval vector;
   } value;
} s_setval_value, *p_setval_value, s_acc_value, *p_acc_value;

/*---------------------- structure for VCL strengths ------------------------*/
typedef struct t_strengths
{
  unsigned char logic_value;
  unsigned char strength1;
  unsigned char strength2;
} s_strengths, *p_strengths;

/*-------------- structure passed to callback routine for VCL ---------------*/
typedef struct t_vc_record
{
 int vc_reason;
 int vc_hightime;
 int vc_lowtime;
 char *user_data;
 union
   {
    unsigned char logic_value;
    double real_value;
    handle vector_handle;
    s_strengths strengths_s;
   } out_value;
} s_vc_record, *p_vc_record;

/*------------ structure used with acc_fetch_location() ---------------------*/
typedef struct t_location
{
 int line_no;
 char *filename;
} s_location, *p_location;

/*--------- structure used with acc_fetch_timescale_info() routine ----------*/
typedef struct t_timescale_info
{
 short unit;
 short precision;
} s_timescale_info, *p_timescale_info;

/*---------------------------------------------------------------------------*/
/*--------------------------- routine definitions ---------------------------*/
/*---------------------------------------------------------------------------*/
#if defined(__STDC__) || defined(__cplusplus)

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) params
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN
#define DEFINED_EXTERN
#endif

#else

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) (/* nothing */)
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN extern
#define DEFINED_EXTERN
#endif

#endif /* __STDC__ */

EXTERN bool    acc_append_delays PROTO_PARAMS((handle object, ...));
EXTERN bool    acc_append_pulsere PROTO_PARAMS((handle object, double val1,
                   double val1x, ...));
EXTERN void    acc_close PROTO_PARAMS((void));
EXTERN handle *acc_collect PROTO_PARAMS((handle (*p_next_routine)(),
                   handle scope_object, int *aof_count));
EXTERN bool    acc_compare_handles PROTO_PARAMS((handle h1, handle h2));
EXTERN int     acc_count PROTO_PARAMS((handle (*next_function)(),
                   handle object_handle));
EXTERN bool    acc_configure PROTO_PARAMS((int item, char *value));
EXTERN int     acc_fetch_argc PROTO_PARAMS((void));
EXTERN void  **acc_fetch_argv PROTO_PARAMS((void));
EXTERN double  acc_fetch_attribute PROTO_PARAMS((handle object, ...));
EXTERN int     acc_fetch_attribute_int PROTO_PARAMS((handle object, ...));
EXTERN char   *acc_fetch_attribute_str PROTO_PARAMS((handle object, ...));
EXTERN char   *acc_fetch_defname PROTO_PARAMS((handle object_handle));
EXTERN int     acc_fetch_delay_mode PROTO_PARAMS((handle object_p));
EXTERN bool    acc_fetch_delays PROTO_PARAMS((handle object, ...));
EXTERN int     acc_fetch_direction PROTO_PARAMS((handle object_handle));
EXTERN int     acc_fetch_edge PROTO_PARAMS((handle acc_object));
EXTERN char   *acc_fetch_fullname PROTO_PARAMS((handle object_handle));
EXTERN int     acc_fetch_fulltype PROTO_PARAMS((handle object_h));
EXTERN int     acc_fetch_index PROTO_PARAMS((handle object_handle));
EXTERN double  acc_fetch_itfarg PROTO_PARAMS((int n, handle tfinst));
EXTERN int     acc_fetch_itfarg_int PROTO_PARAMS((int n, handle tfinst));
EXTERN char   *acc_fetch_itfarg_str PROTO_PARAMS((int n, handle tfinst));
EXTERN int     acc_fetch_location PROTO_PARAMS((p_location location_p,
                   handle object));
EXTERN char   *acc_fetch_name PROTO_PARAMS((handle object_handle));
EXTERN int     acc_fetch_paramtype PROTO_PARAMS((handle param_p));
EXTERN double  acc_fetch_paramval PROTO_PARAMS((handle param));
EXTERN int     acc_fetch_polarity PROTO_PARAMS((handle path));
EXTERN int     acc_fetch_precision PROTO_PARAMS((void));
EXTERN bool    acc_fetch_pulsere PROTO_PARAMS((handle path_p, double *val1r,
                   double *val1e, ...));
EXTERN int     acc_fetch_range PROTO_PARAMS((handle node, int *msb,
                   int *lsb));
EXTERN int     acc_fetch_size PROTO_PARAMS((handle obj_h));
EXTERN double  acc_fetch_tfarg PROTO_PARAMS((int n));
EXTERN int     acc_fetch_tfarg_int PROTO_PARAMS((int n));
EXTERN char   *acc_fetch_tfarg_str PROTO_PARAMS((int n));
EXTERN void    acc_fetch_timescale_info PROTO_PARAMS((handle obj,
                   p_timescale_info aof_timescale_info));
EXTERN int     acc_fetch_type PROTO_PARAMS((handle object_handle));
EXTERN char   *acc_fetch_type_str PROTO_PARAMS((int type));
EXTERN char   *acc_fetch_value PROTO_PARAMS((handle object_handle,
                   char *format_str, p_acc_value acc_value_p));
EXTERN void    acc_free PROTO_PARAMS((handle *array_ptr));
EXTERN handle  acc_handle_by_name PROTO_PARAMS((char *inst_name,
                   handle scope_p));
EXTERN handle  acc_handle_condition PROTO_PARAMS((handle obj));
EXTERN handle  acc_handle_conn PROTO_PARAMS((handle term_p));
EXTERN handle  acc_handle_datapath PROTO_PARAMS((handle path));
EXTERN handle  acc_handle_hiconn PROTO_PARAMS((handle port_ref));
EXTERN handle  acc_handle_interactive_scope PROTO_PARAMS((void));
EXTERN handle  acc_handle_itfarg PROTO_PARAMS((int n, handle tfinst));
EXTERN handle  acc_handle_loconn PROTO_PARAMS((handle port_ref));
EXTERN handle  acc_handle_modpath PROTO_PARAMS((handle mod_p,
                   char *pathin_name, char *pathout_name, ...));
EXTERN handle  acc_handle_notifier PROTO_PARAMS((handle tchk));
EXTERN handle  acc_handle_object PROTO_PARAMS((char *object_name));
EXTERN handle  acc_handle_parent PROTO_PARAMS((handle object_p));
EXTERN handle  acc_handle_path PROTO_PARAMS((handle source,
                   handle destination));
EXTERN handle  acc_handle_pathin PROTO_PARAMS((handle path_p));
EXTERN handle  acc_handle_pathout PROTO_PARAMS((handle path_p));
EXTERN handle  acc_handle_port PROTO_PARAMS((handle mod_handle,
                   int port_num));
EXTERN handle  acc_handle_scope PROTO_PARAMS((handle object));
EXTERN handle  acc_handle_simulated_net PROTO_PARAMS((handle net_h));
EXTERN handle  acc_handle_tchk PROTO_PARAMS((handle mod_p, int tchk_type,
                   char *arg1_conn_name, int arg1_edgetype, ...));
EXTERN handle  acc_handle_tchkarg1 PROTO_PARAMS((handle tchk));
EXTERN handle  acc_handle_tchkarg2 PROTO_PARAMS((handle tchk));
EXTERN handle  acc_handle_terminal PROTO_PARAMS((handle gate_handle,
                   int terminal_index));
EXTERN handle  acc_handle_tfarg PROTO_PARAMS((int n));
EXTERN handle  acc_handle_tfinst PROTO_PARAMS((void));
EXTERN bool    acc_initialize PROTO_PARAMS((void));
EXTERN handle  acc_next PROTO_PARAMS((int *type_list, handle h_scope,
                   handle h_object));
EXTERN handle  acc_next_bit PROTO_PARAMS((handle vector, handle bit));
EXTERN handle  acc_next_cell PROTO_PARAMS((handle scope, handle cell));
EXTERN handle  acc_next_cell_load PROTO_PARAMS((handle net_handle,
                   handle load));
EXTERN handle  acc_next_child PROTO_PARAMS((handle mod_handle, handle child));
EXTERN handle  acc_next_driver PROTO_PARAMS((handle net, handle driver));
EXTERN handle  acc_next_hiconn PROTO_PARAMS((handle port, handle hiconn));
EXTERN handle  acc_next_input PROTO_PARAMS((handle path, handle pathin));
EXTERN handle  acc_next_load PROTO_PARAMS((handle net, handle load));
EXTERN handle  acc_next_loconn PROTO_PARAMS((handle port, handle loconn));
EXTERN handle  acc_next_modpath PROTO_PARAMS((handle mod_p, handle path));
EXTERN handle  acc_next_net PROTO_PARAMS((handle mod_handle, handle net));
EXTERN handle  acc_next_output PROTO_PARAMS((handle path, handle pathout));
EXTERN handle  acc_next_parameter PROTO_PARAMS((handle module_p,
                   handle param));
EXTERN handle  acc_next_port PROTO_PARAMS((handle ref_obj_p, handle port));
EXTERN handle  acc_next_portout PROTO_PARAMS((handle mod_p, handle port));
EXTERN handle  acc_next_primitive PROTO_PARAMS((handle mod_handle,
                   handle prim));
EXTERN handle  acc_next_scope PROTO_PARAMS((handle ref_scope_p,
                   handle scope));
EXTERN handle  acc_next_specparam PROTO_PARAMS((handle module_p,
                   handle sparam));
EXTERN handle  acc_next_tchk PROTO_PARAMS((handle mod_p, handle tchk));
EXTERN handle  acc_next_terminal PROTO_PARAMS((handle gate_handle,
                   handle term));
EXTERN handle  acc_next_topmod PROTO_PARAMS((handle topmod));
EXTERN bool    acc_object_of_type PROTO_PARAMS((handle object, int type));
EXTERN bool    acc_object_in_typelist PROTO_PARAMS((handle object,
                   int *type_list));
EXTERN int     acc_product_type PROTO_PARAMS((void));
EXTERN char   *acc_product_version PROTO_PARAMS((void));
EXTERN int     acc_release_object PROTO_PARAMS((handle obj));
EXTERN bool    acc_replace_delays PROTO_PARAMS((handle object, ...));
EXTERN bool    acc_replace_pulsere PROTO_PARAMS((handle object, double val1r,
                   double val1x, ...));
EXTERN void    acc_reset_buffer PROTO_PARAMS((void));
EXTERN bool  acc_set_interactive_scope PROTO_PARAMS((handle scope,
                   int callback_flag));
EXTERN bool    acc_set_pulsere PROTO_PARAMS((handle path_p, double val1r,
                   double val1e));
EXTERN char  *acc_set_scope PROTO_PARAMS((handle object, ...));
EXTERN int     acc_set_value PROTO_PARAMS((handle obj,
                   p_setval_value setval_p, p_setval_delay delay_p));
EXTERN void    acc_vcl_add PROTO_PARAMS((handle object_p, int (*consumer)(),
                   char *user_data, int vcl_flags));
EXTERN void    acc_vcl_delete PROTO_PARAMS((handle object_p,
                   int (*consumer)(), char *user_data, int vcl_flags));
EXTERN char   *acc_version PROTO_PARAMS((void));

#ifdef DEFINED_PROTO_PARAMS
#undef DEFINED_PROTO_PARAMS
#undef  PROTO_PARAMS
#endif

#ifdef DEFINED_EXTERN
#undef DEFINED_EXTERN
#undef EXTERN
#endif

/*---------------------------------------------------------------------------*/
/*------------------------------- definitions -------------------------------*/
/*---------------------------------------------------------------------------*/
/* --- UNPORTABLE XL Specific code - must use acc routine 
#define acc_handle_calling_mod_m acc_handle_parent((handle)tf_getinstance())
--- */
#define acc_handle_calling_mod_m acc_handle_parent(acc_handle_tfinst())

#endif /* ACC_USER_H */

/******************************************************************************
* cv_acc_user.h
*
* Simulator specific acc_user.h (acc_ routines) include file
*
* This file contains the constant definitions, structure definitions
* used in IEEE P1364 LRM but not defined in acc_user.h file in appendix.
*
* It must be included after acc_user.h 
*
*
* This file also contains the acc_ routines that are in common use but
* not in the IEEE standard
*
* Copyright 1995-1999. Pragmatic C Software. All rights reserved.
* Copyright 1995, IEEE. All rights reserved.
******************************************************************************/
#ifndef CVACCUSER_H
#define CVACCUSER_H

/*---------------------------------------------------------------------------*/
/*--------------------------- routine definitions ---------------------------*/
/*---------------------------------------------------------------------------*/
#if defined(__STDC__) || defined(__cplusplus)

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) params
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN
#define DEFINED_EXTERN
#endif

#else

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) (/* nothing */)
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN extern
#define DEFINED_EXTERN
#endif

#endif /* __STDC__ */

/* added routine for dumping internal acc_ handle contents */
EXTERN int   __acc_show_object PROTO_PARAMS((handle obj));

#ifdef DEFINED_PROTO_PARAMS
#undef DEFINED_PROTO_PARAMS
#undef  PROTO_PARAMS
#endif

#ifdef DEFINED_EXTERN
#undef DEFINED_EXTERN
#undef EXTERN
#endif

#endif /* CV_ACC_USER_H */

/******************************************************************************
* cv_veriuser.h
*
* Simulator specific veriuser (tf_ routine) include file
*
* This file contains the constant definitions, structure definitions
* specific to Cver simulator specific tfcell call mechanism that follows
* the original PLI LRM 1.0 calling mechanism
*
* It must be included after veriuser.h 
*
* This file also contains the tf_ routines that are enhancements not in
* the IEEE standard
*
* Copyright 1995-1999. Pragmatic C Software. All rights reserved.
* Copyright 1995, IEEE. All rights reserved.
******************************************************************************/
#ifndef PVTFUSER_H
#define PVTFUSER_H

/*---------------------------------------------------------------------------*/
/*------------------------------- definitions -------------------------------*/
/*---------------------------------------------------------------------------*/

/*-------------- tfcell interface structure type field constants ------------*/
#define  usertask 1
#define  USERTASK 1
#define  userfunction 2
#define  USERFUNCTION 2
#define  userrealfunction 3
#define  USERREALFUNCTION 3

/*---- s_tfcell interface structure used in user code filled in by user ----*/
typedef struct t_tfcell
{
 short type;         /* either usertask or userfunction */
 short data;         /* parameter for the following routines */
 int (*checktf)();   /* routine for checking parameters */
 int (*sizetf)();    /* for providing size of function return value */
 int (*calltf)();    /* routine called during simulation */
 int (*misctf)();    /* miscellaneous routines (see below) */
 char *tfname;       /* the name of the system task or function */
 int forwref;        /* indicates special parameters allowed */
 /* not part of standard but present in some user models */
 char *tfveritool;   /* usually ignored */
 char *tferrmessage; /* usually ignored */

} s_tfcell, *p_tfcell;


/*---------------------------------------------------------------------------*/
/*--------------- Pver non standard routine definitions ---------------------*/
/*---------------------------------------------------------------------------*/
#if defined(__STDC__) || defined(__cplusplus)

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) params
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN
#define DEFINED_EXTERN
#endif

#else

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) (/* nothing */)
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN extern
#define DEFINED_EXTERN
#endif

#endif /* __STDC__ */

/* added returns name of file as string and sets line number of call */
EXTERN char *tf_getsourceloc PROTO_PARAMS((int *lineno));
EXTERN char *tf_igetsourceloc PROTO_PARAMS((int *lineno, char *inst));

/* added same as 0 delay strdelputp except immediate assign not #0 */ 
EXTERN int tf_istrputp PROTO_PARAMS ((int nparam, int bitlength, int format_char, char *value_p, char *inst));
EXTERN int tf_strputp PROTO_PARAMS ((int nparam, int bitlength, int format_char, char *value_p));

/* get simulation time in ticks (lowest precicision in design) */
/* not in LRM but supported by XL */
EXTERN int tf_getsimtime PROTO_PARAMS((void));

/* get simulation time in ticks - long 64 bit tim version */
EXTERN int tf_getlongsimtime PROTO_PARAMS((int *aof_hightime));

#ifdef DEFINED_PROTO_PARAMS
#undef DEFINED_PROTO_PARAMS
#undef  PROTO_PARAMS
#endif

#ifdef DEFINED_EXTERN
#undef DEFINED_EXTERN
#undef EXTERN
#endif

#endif /* PVTFUSER_H */

/******************************************************************************
* cv_vpi_user.h
*
* Simulator specific vpi_user (vpi_ routine) include file
*
* This file contains the constant definitions, structure definitions
* used by the Cver simulator specific vpi mechanism that follows
* the IEEE P1364 standard
*
* It must be included after vpi_user.h
*
* This file also contains the vpi_ routines that are enhancements not in
* the IEEE standard
*
* Copyright 1995-2003. Pragmatic C Software. All rights reserved.
******************************************************************************/
#ifndef CV_VPI_USER_H
#define CV_VPI_USER_H

#include <stdarg.h>

#ifdef  __cplusplus
extern "C" {
#endif

/*********** OBJECT TYPES **********/ 
/* numbers not yet assigned - using 500s (unassigned) until P1364 assigns */
#define vpiNetDriver    500        /* vpi_ added net driver */
#define vpiNetBitDriver 501        /* vpi_ added net bit driver */
#define vpiSchedBitEvent 502       /* vpi_ added wire driver per bit event */ 
#define vpiParamArray   503        /* new parameter array object */
#define vpiParamArrayWord 504      /* word of param array (same as memory) */

/*********** METHODS **********/ 
/*********** methods used to traverse 1 to 1 relationships **********/ 
/* currently no access to pound parameter expressions - will move */
#define vpiPoundParam 505

/* iterator to get one instance (vpiModule object) of each type */
/* 2nd argument to vpi_iterate must be NULL */
#define vpiOneOfEachMod  506       /* one instance of each type (Cver ext.) */

/* Cver start range (to not conflict with standard or other simulators */
#define CV_START_ONUMS 500

/*********** PROPERTIES ***********/ 
/*********** Cver added properties types ***********/ 

/*---------------------------------------------------------------------------*/
/*------------------------------- definitions -------------------------------*/
/*---------------------------------------------------------------------------*/
/* extra vpi_put_value 4th argument flag value to add driver terminal */
#define vpiAddDriver 16

/*********************** STRUCTURE DEFINITIONS ****************************/
/* cbLanguageLine call back per line record */ 
typedef struct t_vpi_languageline
{
    char *linep;
    char *file;
    int lineno;
} s_vpi_languageline, *p_vpi_languageline;

/* Cver specific call back record - starting at 500 to avoid conflicts */
#define cbLanguageLine 500

/* customer specific simulation control operations */
#define cbCustomer1 501

/* Cver extended vpi_control operations */
#define vpiInsertSource 500
#define vpiCustomer1 501
#define vpiFlushLog 502
#define vpiDumpVars 503
#define vpiEnableCb 504
#define vpiDisableCb 505

/*---------------------------------------------------------------------------*/
/*--------------- Cver non standard routine definitions ---------------------*/
/*---------------------------------------------------------------------------*/
#if defined(__STDC__) || defined(__cplusplus)

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) params
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN
#define DEFINED_EXTERN
#endif

#else

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) (/* nothing */)
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN extern
#define DEFINED_EXTERN
#endif

#endif /* __STDC__ */

/* SJM 11/13/03 - for backward compatibility - old name of vpi control */
#define vpi_sim_control vpi_control

/* added routine for copying - submitted to committee for inclusion */
EXTERN vpiHandle    vpi_copy_object     PROTO_PARAMS((vpiHandle obj));
/* added routine for dumping internal vpi handle contents */
EXTERN PLI_INT32    __vpi_show_object PROTO_PARAMS((vpiHandle obj));

#ifdef DEFINED_PROTO_PARAMS
#undef DEFINED_PROTO_PARAMS
#undef  PROTO_PARAMS
#endif

#ifdef DEFINED_EXTERN
#undef DEFINED_EXTERN
#undef EXTERN
#endif

#ifdef  __cplusplus
}
#endif

#endif /* CV_VPI_USER_H */

/******************************************************************************
* veriuser.h
*
* IEEE 1364 1995 Verilog HDL Programming Language Interface (PLI).
*
* This file contains the constant definitions, structure definitions, and
* routine declarations used by the Verilog PLI procedural interface TF 
* task/function routines. 
*
* The file should be included with all C routines that use the PLI
* task/function routines.
******************************************************************************/
#ifndef VERIUSER_H
#define VERIUSER_H

/*---------------------------------------------------------------------------*/
/*------------------------------- definitions -------------------------------*/
/*---------------------------------------------------------------------------*/

/*----------------------------- general defines -----------------------------*/
#define bool                   int
#define true                   1
#define TRUE                   1
#define false                  0
#define FALSE                  0
#define null                   0L

/*---------------------- defines for error interception ---------------------*/
#define ERR_MESSAGE            1
#define ERR_WARNING            2
#define ERR_ERROR              3
#define ERR_INTERNAL           4
#define ERR_SYSTEM             5

/*-------------- values for reason parameter to misctf routines -------------*/

#define reason_checktf         1
#define REASON_CHECKTF         reason_checktf
#define reason_sizetf          2
#define REASON_SIZETF          reason_sizetf
#define reason_calltf          3
#define REASON_CALLTF          reason_calltf
#define reason_save            4
#define REASON_SAVE            reason_save
#define reason_restart         5
#define REASON_RESTART         reason_restart
#define reason_disable         6
#define REASON_DISABLE         reason_disable
#define reason_paramvc         7
#define REASON_PARAMVC         reason_paramvc
#define reason_synch           8
#define REASON_SYNCH           reason_synch
#define reason_finish          9
#define REASON_FINISH          reason_finish
#define reason_reactivate     10
#define REASON_REACTIVATE      reason_reactivate
#define reason_rosynch        11
#define REASON_ROSYNCH         reason_rosynch
#define reason_paramdrc       15
#define REASON_PARAMDRC        reason_paramdrc
#define reason_endofcompile   16
#define REASON_ENDOFCOMPILE    reason_endofcompile
#define reason_scope          17
#define REASON_SCOPE          reason_scope
#define reason_interactive    18
#define REASON_INTERACTIVE     reason_interactive
#define reason_reset          19
#define REASON_RESET           reason_reset
#define reason_endofreset     20
#define REASON_ENDOFRESET      reason_endofreset
#define reason_force          21
#define REASON_FORCE           reason_force
#define reason_release        22
#define REASON_RELEASE         reason_release
#define reason_startofsave    27
#define REASON_STARTOFSAVE reason_startofsave
#define reason_startofrestart 28
#define REASON_STARTOFRESTART reason_startofrestart
#define REASON_MAX            28

/*-- types used by tf_typep() and expr_type field in tf_exprinfo structure --*/
#define tf_nullparam           0
#define TF_NULLPARAM           tf_nullparam
#define tf_string              1
#define TF_STRING              tf_string
#define tf_readonly           10
#define TF_READONLY            tf_readonly
#define tf_readwrite          11
#define TF_READWRITE           tf_readwrite
#define tf_rwbitselect        12
#define TF_RWBITSELECT         tf_rwbitselect
#define tf_rwpartselect       13
#define TF_RWPARTSELECT        tf_rwpartselect
#define tf_rwmemselect        14
#define TF_RWMEMSELECT         tf_rwmemselect
#define tf_readonlyreal       15
#define TF_READONLYREAL        tf_readonlyreal
#define tf_readwritereal      16
#define TF_READWRITEREAL       tf_readwritereal

/*---------- types used by node_type field in tf_nodeinfo structure ---------*/
#define tf_null_node         100
#define TF_NULL_NODE           tf_null_node
#define tf_reg_node          101
#define TF_REG_NODE            tf_reg_node
#define tf_integer_node      102
#define TF_INTEGER_NODE        tf_integer_node
#define tf_time_node         103
#define TF_TIME_NODE           tf_time_node
#define tf_netvector_node    104
#define TF_NETVECTOR_NODE      tf_netvector_node
#define tf_netscalar_node    105
#define TF_NETSCALAR_NODE      tf_netscalar_node
#define tf_memory_node       106
#define TF_MEMORY_NODE         tf_memory_node
#define tf_real_node         107
#define TF_REAL_NODE           tf_real_node

/*---------------------------------------------------------------------------*/
/*-------------------------- structure definitions --------------------------*/
/*---------------------------------------------------------------------------*/

/*----- structure used with tf_exprinfo() to get expression information -----*/
typedef struct t_tfexprinfo
{
  short expr_type;
  short padding;
  struct t_vecval *expr_value_p;
  double real_value;
  char *expr_string;
  int expr_ngroups;
  int expr_vec_size;
  int expr_sign;
  int expr_lhs_select; 
  int expr_rhs_select;
} s_tfexprinfo, *p_tfexprinfo;

/*------- structure for use with tf_nodeinfo() to get node information ------*/
typedef struct t_tfnodeinfo
{
  short node_type;
  short padding;
  union
    {
      struct t_vecval *vecval_p;
      struct t_strengthval *strengthval_p;
      char *memoryval_p;
      double *real_val_p;
    } node_value;
  char *node_symbol;
  int node_ngroups;
  int node_vec_size;
  int node_sign;
  int node_ms_index;
  int node_ls_index;
  int node_mem_size;
  int node_lhs_element;
  int node_rhs_element;
  int *node_handle;
} s_tfnodeinfo, *p_tfnodeinfo;

/*--------------------- data structure of vector values ---------------------*/
typedef struct t_vecval
{
  int avalbits;
  int bvalbits;
} s_vecval, *p_vecval;

/*--------------- data structure of scalar net strength values --------------*/
typedef struct t_strengthval
{
    int strength0;
    int strength1;
} s_strengthval, *p_strengthval;

/*---------------------------------------------------------------------------*/
/*--------------------------- routine definitions ---------------------------*/
/*---------------------------------------------------------------------------*/
#if defined(__STDC__) || defined(__cplusplus)

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) params
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN
#define DEFINED_EXTERN
#endif

#else

#ifndef PROTO_PARAMS
#define PROTO_PARAMS(params) (/* nothing */)
#define DEFINED_PROTO_PARAMS
#endif
#ifndef EXTERN
#define EXTERN extern
#define DEFINED_EXTERN
#endif

#endif /* __STDC__ */

EXTERN void         io_mcdprintf PROTO_PARAMS((int mcd, char *format, ...));
EXTERN void         io_printf PROTO_PARAMS((char *format, ...));
EXTERN char        *mc_scan_plusargs PROTO_PARAMS((char *plusarg));
EXTERN void         tf_add_long PROTO_PARAMS((int *aof_lowtime1, int *aof_hightime1, int lowtime2, int hightime2));
EXTERN int          tf_asynchoff PROTO_PARAMS((void));
EXTERN int          tf_asynchon PROTO_PARAMS((void));
EXTERN int          tf_clearalldelays PROTO_PARAMS((void));
EXTERN int          tf_compare_long PROTO_PARAMS((unsigned int low1, unsigned int high1, unsigned int low2, unsigned int high2));
EXTERN int          tf_copypvc_flag PROTO_PARAMS((int nparam));
EXTERN void         tf_divide_long PROTO_PARAMS((int *aof_low1, int *aof_high1, int low2, int high2));
EXTERN int          tf_dofinish PROTO_PARAMS((void));
EXTERN int          tf_dostop PROTO_PARAMS((void));
EXTERN int          tf_error PROTO_PARAMS((char *fmt, ...));
EXTERN int          tf_evaluatep PROTO_PARAMS((int pnum));
EXTERN p_tfexprinfo tf_exprinfo PROTO_PARAMS((int pnum, p_tfexprinfo pinfo));
EXTERN char        *tf_getcstringp PROTO_PARAMS((int nparam));
EXTERN char        *tf_getinstance PROTO_PARAMS((void));
EXTERN int          tf_getlongp PROTO_PARAMS((int *aof_highvalue, int pnum));
EXTERN int          tf_getlongtime PROTO_PARAMS((int *aof_hightime));
EXTERN int          tf_getnextlongtime PROTO_PARAMS((int *aof_lowtime, int *aof_hightime));
EXTERN int          tf_getp PROTO_PARAMS((int pnum));
EXTERN int          tf_getpchange PROTO_PARAMS((int nparam));
EXTERN double       tf_getrealp PROTO_PARAMS((int pnum));
EXTERN double       tf_getrealtime PROTO_PARAMS((void));
EXTERN int          tf_gettime PROTO_PARAMS((void));
EXTERN int          tf_gettimeprecision PROTO_PARAMS((void));
EXTERN int          tf_gettimeunit PROTO_PARAMS((void));
EXTERN char        *tf_getworkarea PROTO_PARAMS((void));
EXTERN int          tf_iasynchoff PROTO_PARAMS((char *inst));
EXTERN int          tf_iasynchon PROTO_PARAMS((char *inst));
EXTERN int          tf_iclearalldelays PROTO_PARAMS((char *inst));
EXTERN int          tf_icopypvc_flag PROTO_PARAMS((int nparam, char *inst));
EXTERN int          tf_ievaluatep PROTO_PARAMS((int pnum, char *inst));
EXTERN p_tfexprinfo tf_iexprinfo PROTO_PARAMS((int pnum, p_tfexprinfo pinfo, char *inst));
EXTERN char        *tf_igetcstringp PROTO_PARAMS((int nparam, char *inst));
EXTERN int          tf_igetlongp PROTO_PARAMS((int *aof_highvalue, int pnum, char *inst));
EXTERN int          tf_igetlongtime PROTO_PARAMS((int *aof_hightime, char *inst));
EXTERN int          tf_igetp PROTO_PARAMS((int pnum, char *inst));
EXTERN int          tf_igetpchange PROTO_PARAMS((int nparam, char *inst));
EXTERN double       tf_igetrealp PROTO_PARAMS((int pnum, char *inst));
EXTERN double       tf_igetrealtime PROTO_PARAMS((char *inst));
EXTERN int          tf_igettime PROTO_PARAMS((char *inst));
EXTERN int          tf_igettimeprecision PROTO_PARAMS((char *inst));
EXTERN int          tf_igettimeunit PROTO_PARAMS((char *inst));
EXTERN char        *tf_igetworkarea PROTO_PARAMS((char *inst));
EXTERN char        *tf_imipname PROTO_PARAMS((char *cell));
EXTERN int          tf_imovepvc_flag PROTO_PARAMS((int nparam, char *inst));
EXTERN p_tfnodeinfo tf_inodeinfo PROTO_PARAMS((int pnum, p_tfnodeinfo pinfo, char *inst));
EXTERN int          tf_inump PROTO_PARAMS((char *inst));
EXTERN int          tf_ipropagatep PROTO_PARAMS((int pnum, char *inst));
EXTERN int          tf_iputlongp PROTO_PARAMS((int pnum, int lowvalue, int highvalue, char *inst));
EXTERN int          tf_iputp PROTO_PARAMS((int pnum, int value, char *inst));
EXTERN int          tf_iputrealp PROTO_PARAMS((int pnum, double value, char *inst));
EXTERN int          tf_irosynchronize PROTO_PARAMS((char *inst));
EXTERN int          tf_isetdelay PROTO_PARAMS((int delay, char *inst));
EXTERN int          tf_isetlongdelay PROTO_PARAMS((int lowdelay, int highdelay, char *inst));
EXTERN int          tf_isetrealdelay PROTO_PARAMS((double realdelay, char *inst));
EXTERN int          tf_isizep PROTO_PARAMS((int pnum, char *inst));
EXTERN char        *tf_ispname PROTO_PARAMS((char *cell));
EXTERN int          tf_istrdelputp PROTO_PARAMS((int nparam, int bitlength, int format_char, char *value_p, int delay, int delaytype, char *inst));
EXTERN char        *tf_istrgetp PROTO_PARAMS((int pnum, int format_char, char *inst));
EXTERN int          tf_istrlongdelputp PROTO_PARAMS((int nparam, int bitlength, int format_char, char *value_p, int lowdelay, int highdelay, int delaytype, char *inst));
EXTERN int          tf_istrrealdelputp PROTO_PARAMS((int nparam, int bitlength, int format_char, char *value_p, double realdelay, int delaytype, char *inst));
EXTERN int          tf_isynchronize PROTO_PARAMS((char *inst));
EXTERN int          tf_itestpvc_flag PROTO_PARAMS((int nparam, char *inst));
EXTERN int          tf_itypep PROTO_PARAMS((int pnum, char *inst));
EXTERN void         tf_long_to_real PROTO_PARAMS((int int_lo, int int_hi, double *aof_real));
EXTERN char         *tf_longtime_tostr PROTO_PARAMS((int lowtime, int hightime));
EXTERN int          tf_message PROTO_PARAMS((int level, char *facility, char *messno, char *message, ...));
EXTERN char        *tf_mipname PROTO_PARAMS((void));
EXTERN int          tf_movepvc_flag PROTO_PARAMS((int nparam));
EXTERN void         tf_multiply_long PROTO_PARAMS((int *aof_low1, int *aof_high1, int low2, int high2));
EXTERN p_tfnodeinfo tf_nodeinfo PROTO_PARAMS((int pnum, p_tfnodeinfo pinfo));
EXTERN int          tf_nump PROTO_PARAMS((void));
EXTERN int          tf_propagatep PROTO_PARAMS((int pnum));
EXTERN int          tf_putlongp PROTO_PARAMS((int pnum, int lowvalue, int highvalue));
EXTERN int          tf_putp PROTO_PARAMS((int pnum, int value));
EXTERN int          tf_putrealp PROTO_PARAMS((int pnum, double value));
EXTERN int          tf_read_restart PROTO_PARAMS((char *blockptr, int blocklen));
EXTERN void         tf_real_to_long PROTO_PARAMS((double real, int *aof_int_lo, int *aof_int_hi));
EXTERN int          tf_rosynchronize PROTO_PARAMS((void));
EXTERN void         tf_scale_longdelay PROTO_PARAMS((char *cell, int delay_lo, int delay_hi, int *aof_delay_lo, int *aof_delay_hi));
EXTERN void         tf_scale_realdelay PROTO_PARAMS((char *cell, double realdelay, double *aof_realdelay));
EXTERN int          tf_setdelay PROTO_PARAMS((int delay));
EXTERN int          tf_setlongdelay PROTO_PARAMS((int lowdelay, int highdelay));
EXTERN int          tf_setrealdelay PROTO_PARAMS((double realdelay));
EXTERN int          tf_setworkarea PROTO_PARAMS((char *workarea));
EXTERN int          tf_sizep PROTO_PARAMS((int pnum));
EXTERN char        *tf_spname PROTO_PARAMS((void));
EXTERN int          tf_strdelputp PROTO_PARAMS((int nparam, int bitlength, int format_char, char *value_p, int delay, int delaytype));
EXTERN char        *tf_strgetp PROTO_PARAMS((int pnum, int format_char));
EXTERN char        *tf_strgettime PROTO_PARAMS((void));
EXTERN int          tf_strlongdelputp PROTO_PARAMS((int nparam, int bitlength, int format_char, char *value_p, int lowdelay, int highdelay, int delaytype));
EXTERN int          tf_strrealdelputp PROTO_PARAMS((int nparam, int bitlength, int format_char, char *value_p, double realdelay, int delaytype));
EXTERN void         tf_subtract_long PROTO_PARAMS((int *aof_lowtime1, int *aof_hightime1, int lowtime2, int hightime2));
EXTERN int          tf_synchronize PROTO_PARAMS((void));
EXTERN int          tf_testpvc_flag PROTO_PARAMS((int nparam));
EXTERN int          tf_text PROTO_PARAMS((char *fmt, ...));
EXTERN int          tf_typep PROTO_PARAMS((int pnum));
EXTERN void         tf_unscale_longdelay PROTO_PARAMS((char *cell, int delay_lo, int delay_hi, int *aof_delay_lo, int *aof_delay_hi));
EXTERN void         tf_unscale_realdelay PROTO_PARAMS((char *cell, double realdelay, double *aof_realdelay));
EXTERN int          tf_warning PROTO_PARAMS((char *fmt, ...));
EXTERN int          tf_write_save PROTO_PARAMS((char *blockptr, int blocklen));

#ifdef DEFINED_PROTO_PARAMS
#undef DEFINED_PROTO_PARAMS
#undef  PROTO_PARAMS
#endif

#ifdef DEFINED_EXTERN
#undef DEFINED_EXTERN
#undef EXTERN
#endif

#endif /* VERIUSER_H */

/***************************************************************************
* vpi_user.h
*
* IEEE 1364-2000 Verilog HDL Programming Language Interface (PLI).
*
* This file contains the constant definitions, structure definitions, and
* routine declarations used by the Verilog PLI procedural interface VPI
* access routines.
*
**************************************************************************/
/***************************************************************************
* NOTE: the constant values 1 through 299 are reserved for use in this
* vpi_user.h file.
**************************************************************************/
#ifndef VPI_USER_H
#define VPI_USER_H

#include <stdarg.h>

#ifdef __cplusplus
extern "C" {
#endif

/*------------------------------------------------------------------------*/
/*-------------------------- Portability Help ----------------------------*/
/*------------------------------------------------------------------------*/
/* Sized variables */
#ifndef PLI_TYPES
#define PLI_TYPES
typedef int PLI_INT32;
typedef unsigned int PLI_UINT32;
typedef short PLI_INT16;
typedef unsigned short PLI_UINT16;
typedef char PLI_BYTE8;
typedef unsigned char PLI_UBYTE8;
#endif
/* Use to export a symbol */
#if WIN32
#ifndef PLI_DLLISPEC
#define PLI_DLLISPEC __declspec(dllimport)
#define VPI_USER_DEFINED_DLLISPEC 1
#endif
#else
#ifndef PLI_DLLISPEC
#define PLI_DLLISPEC
#endif
#endif

/* Use to import a symbol */
#if WIN32
#ifndef PLI_DLLESPEC
#define PLI_DLLESPEC __declspec(dllexport)
#define VPI_USER_DEFINED_DLLESPEC 1
#endif
#else
#ifndef PLI_DLLESPEC
#define PLI_DLLESPEC
#endif
#endif

/* Use to mark a function as external */
#ifndef PLI_EXTERN
#define PLI_EXTERN
#endif
/* Use to mark a variable as external */
#ifndef PLI_VEXTERN
#define PLI_VEXTERN extern
#endif
#ifndef PLI_PROTOTYPES
#define PLI_PROTOTYPES
#define PROTO_PARAMS(params) params
/* object is defined imported by the application */
#define XXTERN PLI_EXTERN PLI_DLLISPEC
/* object is exported by the application */
#define EETERN PLI_EXTERN PLI_DLLESPEC
#endif

/******************************** TYPEDEFS ********************************/
typedef PLI_UINT32 *vpiHandle;
/****************************** OBJECT TYPES ******************************/
#define vpiAlways          1        /* always block */
#define vpiAssignStmt      2        /* quasi-continuous assignment */
#define vpiAssignment      3        /* procedural assignment */
#define vpiBegin           4        /* block statement */
#define vpiCase            5        /* case statement */
#define vpiCaseItem        6        /* case statement item */
#define vpiConstant        7        /* numerical constant or literal string */
#define vpiContAssign      8        /* continuous assignment */
#define vpiDeassign        9        /* deassignment statement */
#define vpiDefParam       10        /* defparam */
#define vpiDelayControl   11        /* delay statement (e.g. #10) */
#define vpiDisable        12        /* named block disable statement */
#define vpiEventControl   13        /* wait on event, e.g. @e */
#define vpiEventStmt      14        /* event trigger, e.g. ->e */
#define vpiFor            15        /* for statement */
#define vpiForce          16        /* force statement */
#define vpiForever        17        /* forever statement */
#define vpiFork           18        /* fork-join block */
#define vpiFuncCall       19        /* HDL function call */
#define vpiFunction       20        /* HDL function */
#define vpiGate           21        /* primitive gate */
#define vpiIf             22        /* if statement */
#define vpiIfElse         23        /* if-else statement */
#define vpiInitial        24        /* initial block */
#define vpiIntegerVar     25        /* integer variable */
#define vpiInterModPath   26        /* intermodule wire delay */
#define vpiIterator       27        /* iterator */
#define vpiIODecl         28        /* input/output declaration */
#define vpiMemory         29        /* behavioral memory */
#define vpiMemoryWord     30        /* single word of memory */
#define vpiModPath        31        /* module path for path delays */
#define vpiModule         32        /* module instance */
#define vpiNamedBegin     33        /* named block statement */
#define vpiNamedEvent     34        /* event variable */
#define vpiNamedFork      35        /* named fork-join block */
#define vpiNet            36        /* scalar or vector net */
#define vpiNetBit         37        /* bit of vector net */
#define vpiNullStmt       38        /* a semicolon, Ie. #10 ; */
#define vpiOperation      39        /* behavioral operation */
#define vpiParamAssign    40        /* module parameter assignment */
#define vpiParameter      41        /* module parameter */
#define vpiPartSelect     42        /* part select */
#define vpiPathTerm       43        /* terminal of module path */
#define vpiPort           44        /* module port */
#define vpiPortBit        45        /* bit of vector module port */
#define vpiPrimTerm       46        /* primitive terminal */
#define vpiRealVar        47        /* real variable */
#define vpiReg            48        /* scalar or vector reg */
#define vpiRegBit         49        /* bit of vector reg */
#define vpiRelease        50        /* release statement */
#define vpiRepeat         51        /* repeat statement */
#define vpiRepeatControl  52        /* repeat control in an assign stmt */
#define vpiSchedEvent     53        /* vpi_put_value() event */
#define vpiSpecParam      54        /* specparam */
#define vpiSwitch         55        /* transistor switch */
#define vpiSysFuncCall    56        /* system function call */
#define vpiSysTaskCall    57        /* system task call */
#define vpiTableEntry     58        /* UDP state table entry */
#define vpiTask           59        /* HDL task */
#define vpiTaskCall       60        /* HDL task call */
#define vpiTchk           61        /* timing check */
#define vpiTchkTerm       62        /* terminal of timing check */
#define vpiTimeVar        63        /* time variable */
#define vpiTimeQueue      64        /* simulation event queue */
#define vpiUdp            65        /* user-defined primitive */
#define vpiUdpDefn        66        /* UDP definition */
#define vpiUserSystf      67        /* user defined system task or function */
#define vpiVarSelect      68        /* variable array selection */
#define vpiWait           69        /* wait statement */
#define vpiWhile          70        /* while statement */

/****************** object types added with 1364-2000 *********************/
#define vpiAttribute     105        /* attribute of an object */
#define vpiBitSelect     106        /* Bit select of parameter, var select */
#define vpiCallback      107        /* callback object */
#define vpiDelayTerm     108        /* Delay term which is a load or driver */
#define vpiDelayDevice   109        /* Delay object within a net */
#define vpiFrame         110        /* reentrant task/func frame */
#define vpiGateArray     111        /* gate instance array */
#define vpiModuleArray   112        /* module instance array */
#define vpiPrimitiveArray 113       /* vpiprimitiveArray type */
#define vpiNetArray      114        /* multidimensional net */
#define vpiRange         115        /* range declaration */
#define vpiRegArray      116        /* multidimensional reg */
#define vpiSwitchArray   117        /* switch instance array */
#define vpiUdpArray      118        /* UDP instance array */
#define vpiContAssignBit 128        /* Bit of a vector continuous assignment */
#define vpiNamedEventArray 129 /* multidimensional named event */

/******************************** METHODS *********************************/
/************* methods used to traverse 1 to 1 relationships **************/
#define vpiCondition      71        /* condition expression */
#define vpiDelay          72        /* net or gate delay */
#define vpiElseStmt       73        /* else statement */
#define vpiForIncStmt     74        /* increment statement in for loop */
#define vpiForInitStmt    75        /* initialization statement in for loop */
#define vpiHighConn       76        /* higher connection to port */
#define vpiLhs            77        /* left-hand side of assignment */
#define vpiIndex          78        /* index of var select, bit select, etc. */
#define vpiLeftRange      79        /* left range of vector or part select */
#define vpiLowConn        80        /* lower connection to port */
#define vpiParent         81        /* parent object */
#define vpiRhs            82        /* right-hand side of assignment */
#define vpiRightRange     83        /* right range of vector or part select */
#define vpiScope          84        /* containing scope object */
#define vpiSysTfCall      85        /* task function call */
#define vpiTchkDataTerm   86        /* timing check data term */
#define vpiTchkNotifier   87        /* timing check notifier */
#define vpiTchkRefTerm    88        /* timing check reference term */

/************ methods used to traverse 1 to many relationships ************/
#define vpiArgument       89        /* argument to (system) task/function */
#define vpiBit            90        /* bit of vector net or port */
#define vpiDriver         91        /* driver for a net */
#define vpiInternalScope  92        /* internal scope in module */
#define vpiLoad           93        /* load on net or reg */
#define vpiModDataPathIn  94        /* data terminal of a module path */
#define vpiModPathIn      95        /* Input terminal of a module path */
#define vpiModPathOut     96        /* output terminal of a module path */
#define vpiOperand        97        /* operand of expression */
#define vpiPortInst       98        /* connected port instance */
#define vpiProcess        99        /* process in module */
#define vpiVariables     100        /* variables in module */
#define vpiUse           101        /* usage */

/***** methods which can traverse 1 to 1, or 1 to many relationships ******/
#define vpiExpr          102        /* connected expression */
#define vpiPrimitive     103        /* primitive (gate, switch, UDP) */
#define vpiStmt          104        /* statement in process or task */

/********************* methods added with 1364-2000 ***********************/
#define vpiActiveTimeFormat 119     /* active $timeformat() system task */
#define vpiInTerm           120     /* To get to a delay device's drivers. */
#define vpiInstanceArray    121     /* vpiInstance arrays */
#define vpiLocalDriver      122     /* local drivers (within a module */
#define vpiLocalLoad        123     /* local loads (within a module */
#define vpiOutTerm          124     /* To get to a delay device's loads. */
#define vpiPorts            125     /* Module port */
#define vpiSimNet           126     /* simulated net after collapsing */
#define vpiTaskFunc         127     /* HDL task or function */

/******************************* PROPERTIES *******************************/
/************************ generic object properties ***********************/
#define vpiUndefined         -1     /* undefined property */
#define vpiType               1     /* type of object */
#define vpiName               2     /* local name of object */
#define vpiFullName           3     /* full hierarchical name */
#define vpiSize               4     /* size of gate, net, port, etc. */
#define vpiFile               5     /* File name in which the object is used */
#define vpiLineNo             6     /* line number where the object is used */

/*************************** module properties ****************************/
#define vpiTopModule          7     /* top-level module (boolean) */
#define vpiCellInstance       8     /* cell (boolean) */
#define vpiDefName            9     /* module definition name */
#define vpiProtected         10     /* source protected module (boolean) */
#define vpiTimeUnit          11     /* module time unit */
#define vpiTimePrecision     12     /* module time precision */
#define vpiDefNetType        13     /* default net type */
#define vpiUnconnDrive       14     /* unconnected port drive strength */
#define vpiHighZ              1     /* No default drive given */
#define vpiPull1              2     /* default pull1 drive */
#define vpiPull0              3     /* default pull0 drive */
#define vpiDefFile           15     /* File name where the module is defined */
#define vpiDefLineNo         16     /* line number for module definition */
#define vpiDefDelayMode      47     /* Default delay mode for a module */
#define vpiDelayModeNone      1     /* no delay mode specified */
#define vpiDelayModePath      2     /* path delay mode */
#define vpiDelayModeDistrib   3     /* distributed delay mode */
#define vpiDelayModeUnit      4     /* unit delay mode */
#define vpiDelayModeZero      5     /* zero delay mode */
#define vpiDelayModeMTM       6     /* min:typ:max delay mode */
#define vpiDefDecayTime      48     /* Default decay time for a module */

/************************ port and net properties *************************/
#define vpiScalar            17     /* scalar (boolean) */
#define vpiVector            18     /* vector (boolean) */
#define vpiExplicitName      19     /* port is explicitly named */
#define vpiDirection         20     /* direction of port: */
#define vpiInput              1     /* input */
#define vpiOutput             2     /* output */
#define vpiInout              3     /* inout */
#define vpiMixedIO            4     /* mixed input-output */
#define vpiNoDirection        5     /* no direction */
#define vpiConnByName        21     /* connected by name (boolean) */
#define vpiNetType           22     /* net subtypes: */
#define vpiWire               1     /* wire net */
#define vpiWand               2     /* wire-and net */
#define vpiWor                3     /* wire-or net */
#define vpiTri                4     /* three-state net */
#define vpiTri0               5     /* pull-down net */
#define vpiTri1               6     /* pull-up net */
#define vpiTriReg             7     /* tri state reg net */
#define vpiTriAnd             8     /* three-state wire-and net */
#define vpiTriOr                                                                                                         9 /* three-state wire-or net */
#define vpiSupply1           10     /* supply 1 net */
#define vpiSupply0           11     /* supply zero net */
#define vpiNone              12     /* no default net type (1364-2000) */
#define vpiExplicitScalared  23     /* explicitly scalared (boolean) */
#define vpiExplicitVectored  24     /* explicitly vectored (boolean) */
#define vpiExpanded          25     /* expanded vector net (boolean) */
#define vpiImplicitDecl      26     /* implicitly declared net (boolean) */
#define vpiChargeStrength    27     /* charge decay strength of net */

/* Defined as part of strengths section.
#define vpiLargeCharge     0x10
#define vpiMediumCharge    0x04
#define vpiSmallCharge     0x02
*/

#define vpiArray             28     /* variable array (boolean) */
#define vpiPortIndex         29     /* Port index */
/********************** gate and terminal properties **********************/
#define vpiTermIndex         30     /* Index of a primitive terminal */
#define vpiStrength0         31     /* 0-strength of net or gate */
#define vpiStrength1         32     /* 1-strength of net or gate */
#define vpiPrimType          33     /* prmitive subtypes: */
#define vpiAndPrim             1       /* and gate */
#define vpiNandPrim            2       /* nand gate */
#define vpiNorPrim             3       /* nor gate */
#define vpiOrPrim              4       /* or gate */
#define vpiXorPrim             5       /* xor gate */
#define vpiXnorPrim            6       /* xnor gate */
#define vpiBufPrim             7       /* buffer */
#define vpiNotPrim             8       /* not gate */
#define vpiBufif0Prim          9       /* zero-enabled buffer */
#define vpiBufif1Prim         10       /* one-enabled buffer */
#define vpiNotif0Prim         11       /* zero-enabled not gate */
#define vpiNotif1Prim         12       /* one-enabled not gate */
#define vpiNmosPrim           13       /* nmos switch */
#define vpiPmosPrim           14       /* pmos switch */
#define vpiCmosPrim           15       /* cmos switch */
#define vpiRnmosPrim          16       /* resistive nmos switch */
#define vpiRpmosPrim          17       /* resistive pmos switch */
#define vpiRcmosPrim          18       /* resistive cmos switch */
#define vpiRtranPrim          19       /* resistive bidirectional */
#define vpiRtranif0Prim       20       /* zero-enable resistive bidirectional */
#define vpiRtranif1Prim       21       /* one-enable resistive bidirectional */
#define vpiTranPrim           22       /* bidirectional */
#define vpiTranif0Prim        23       /* zero-enabled bidirectional */
#define vpiTranif1Prim        24       /* one-enabled bidirectional */
#define vpiPullupPrim         25       /* pullup */
#define vpiPulldownPrim       26       /* pulldown */
#define vpiSeqPrim            27       /* sequential UDP */
#define vpiCombPrim           28       /* combinational UDP */

/************** path, path terminal, timing check properties **************/
#define vpiPolarity           34       /* polarity of module path... */
#define vpiDataPolarity       35       /* ...or data path: */
#define vpiPositive              1        /* positive */
#define vpiNegative              2        /* negative */
#define vpiUnknown               3        /* unknown (unspecified) */
#define vpiEdge               36       /* edge type of module path: */
#define vpiNoEdge     0x00000000       /* no edge */
#define vpiEdge01     0x00000001       /* 0 -> 1 */
#define vpiEdge10     0x00000002       /* 1 -> 0 */
#define vpiEdge0x     0x00000004       /* 0 -> x */
#define vpiEdgex1     0x00000008       /* x -> 1 */
#define vpiEdge1x     0x00000010       /* 1 -> x */
#define vpiEdgex0     0x00000020       /* x -> 0 */
#define vpiPosEdge    (vpiEdgex1 | vpiEdge01 | vpiEdge0x)
#define vpiNegEdge    (vpiEdgex0 | vpiEdge10 | vpiEdge1x)
#define vpiAnyEdge    (vpiPosEdge | vpiNegEdge)

#define vpiPathType           37    /* path delay connection subtypes: */
#define vpiPathFull              1      /* ( a *> b ) */
#define vpiPathParallel          2      /* ( a => b ) */
#define vpiTchkType           38    /* timing check subtypes: */
#define vpiSetup                 1   /* $setup */
#define vpiHold                  2   /* $hold */
#define vpiPeriod                3   /* $period */
#define vpiWidth                 4   /* $width */
#define vpiSkew                  5   /* $skew */
#define vpiRecovery              6   /* $recovery */
#define vpiNoChange              7   /* $nochange */
#define vpiSetupHold             8   /* $setuphold */
#define vpiFullskew              9   /* $fullskew -- added for 1364-2000 */
#define vpiRecrem               10   /* $recrem -- added for 1364-2000 */
#define vpiRemoval              11   /* $removal -- added for 1364-2000 */
#define vpiTimeskew             12   /* $timeskew -- added for 1364-2000 */

/************************* expression properties **************************/
#define vpiOpType             39   /* operation subtypes: */
#define vpiMinusOp               1 /* unary minus */
#define vpiPlusOp                2 /* unary plus */
#define vpiNotOp                 3 /* unary not */
#define vpiBitNegOp              4 /* bitwise negation */
#define vpiUnaryAndOp            5 /* bitwise reduction and */
#define vpiUnaryNandOp           6 /* bitwise reduction nand */
#define vpiUnaryOrOp             7 /* bitwise reduction or */
#define vpiUnaryNorOp            8 /* bitwise reduction nor */
#define vpiUnaryXorOp            9 /* bitwise reduction xor */
#define vpiUnaryXNorOp          10 /* bitwise reduction xnor */
#define vpiSubOp                11 /* binary subtraction */
#define vpiDivOp                12 /* binary division */
#define vpiModOp                13 /* binary modulus */
#define vpiEqOp                 14 /* binary equality */
#define vpiNeqOp                15 /* binary inequality */
#define vpiCaseEqOp             16 /* case (x and z) equality */
#define vpiCaseNeqOp            17 /* case inequality */
#define vpiGtOp                 18 /* binary greater than */
#define vpiGeOp                 19 /* binary greater than or equal */
#define vpiLtOp                 20 /* binary less than */
#define vpiLeOp                 21 /* binary less than or equal */
#define vpiLShiftOp             22 /* binary left shift */
#define vpiRShiftOp             23 /* binary right shift */
#define vpiAddOp                24 /* binary addition */
#define vpiMultOp               25 /* binary multiplication */
#define vpiLogAndOp             26 /* binary logical and */
#define vpiLogOrOp              27 /* binary logical or */
#define vpiBitAndOp             28 /* binary bitwise and */
#define vpiBitOrOp              29 /* binary bitwise or */
#define vpiBitXorOp             30 /* binary bitwise xor */
#define vpiBitXNorOp            31 /* binary bitwise xnor */
#define vpiBitXnorOp            vpiBitXNorOp /* added with 1364-2000 */
#define vpiConditionOp          32 /* ternary conditional */
#define vpiConcatOp             33 /* n-ary concatenation */
#define vpiMultiConcatOp        34 /* repeated concatenation */
#define vpiEventOrOp            35 /* event or */
#define vpiNullOp               36 /* null operation */
#define vpiListOp               37 /* list of expressions */
#define vpiMinTypMaxOp          38 /* min:typ:max: delay expression */
#define vpiPosedgeOp            39 /* posedge */
#define vpiNegedgeOp            40 /* negedge */
#define vpiArithLShiftOp        41 /* arithmetic left shift (1364-2000) */
#define vpiArithRShiftOp        42 /* arithmetic right shift (1364-2000) */
#define vpiPowerOp              43 /* arithmetic power op (1364-2000) */

#define vpiConstType           40 /* constant subtypes: */
#define vpiDecConst              1 /* decimal integer */
#define vpiRealConst             2 /* real */
#define vpiBinaryConst           3 /* binary integer */
#define vpiOctConst              4 /* octal integer */
#define vpiHexConst              5 /* hexadecimal integer */
#define vpiStringConst           6 /* string literal */
#define vpiIntConst              7 /* HDL integer constant (1364-2000) */
#define vpiBlocking            41 /* blocking assignment (boolean) */
#define vpiCaseType            42 /* case statement subtypes: */
#define vpiCaseExact             1 /* exact match */
#define vpiCaseX                 2 /* ignore X's */
#define vpiCaseZ                 3 /* ignore Z's */
#define vpiNetDeclAssign       43 /* assign part of decl (boolean) */

/************** task/function properties **************/
#define vpiFuncType            44 /* HDL function and system function type */
#define vpiIntFunc               1 /* returns integer */
#define vpiRealFunc              2 /* returns real */
#define vpiTimeFunc              3 /* returns time */
#define vpiSizedFunc             4 /* returns an arbitrary size */
#define vpiSizedSignedFunc       5 /* returns sized signed value */

/* alias 1364-1995 system function subtypes to 1364-2000 function subtypes */
#define vpiSysFuncType           vpiFuncType
#define vpiSysFuncInt            vpiIntFunc
#define vpiSysFuncReal           vpiRealFunc
#define vpiSysFuncTime           vpiTimeFunc
#define vpiSysFuncSized          vpiSizedFunc
#define vpiUserDefn            45 /* user defined system task/func (boolean) */
#define vpiScheduled           46 /* object still scheduled (boolean) */

/*********************** properties added with 1364-2000 *******************/
#define vpiActive              49 /* reentrant task/func frame is active */
#define vpiAutomatic           50 /* task/func obj is automatic */
#define vpiCell                51 /* configuration cell */
#define vpiConfig              52 /* configuration config file */
#define vpiConstantSelect      53 /* (boolean) bit or part select indices
are constant expressions */
#define vpiDecompile           54 /* decompile the object */
#define vpiDefAttribute        55 /* Attribute defined for the obj */
#define vpiDelayType           56 /* delay subtype */
#define vpiModPathDelay          1 /* module path delay */
#define vpiInterModPathDelay     2 /* intermodule path delay */
#define vpiMIPDelay              3 /* module input port delay */
#define vpiIteratorType        57 /* object type of an iterator */
#define vpiLibrary             58 /* configuration library */
#define vpiMultiArray          59 /* Object is a multidimensional array */
#define vpiOffset              60 /* offset from LSB */
#define vpiResolvedNetType     61 /* net subtype after resolution, returns
                                     same subtypes as vpiNetType */
#define vpiSaveRestartID       62 /* unique ID for save/restart data */
#define vpiSaveRestartLocation 63 /* name of save/restart data file */
#define vpiValid               64 /* reentrant task/func frame is valid */
#define vpiSigned              65 /* TRUE for vpiIODecl and any object in
                                     the expression class if the object
                                     has the signed attribute */
#define vpiLocalParam          70 /* TRUE when a param is declared as a
                                     localparam */
#define vpiModPathHasIfNone    71 /* Mod path has an ifnone statement */

/************* vpi_control() constants (added with 1364-2000) *************/
#define vpiStop                66 /* execute simulator's $stop */
#define vpiFinish              67 /* execute simulator's $finish */
#define vpiReset               68 /* execute simulator's $reset */
#define vpiSetInteractiveScope 69 /* set simulator's interactive scope */

/************************** I/O related defines ***************************/
#define VPI_MCD_STDOUT 0x00000001

/************************** STRUCTURE DEFINITIONS *************************/
/***************************** time structure *****************************/
typedef struct t_vpi_time
{
   PLI_INT32 type; /* [vpiScaledRealTime, vpiSimTime, vpiSuppressTime] */
   PLI_UINT32 high, low; /* for vpiSimTime */
   double real; /* for vpiScaledRealTime */
} s_vpi_time, *p_vpi_time;

/* time types */
#define vpiScaledRealTime 1
#define vpiSimTime 2
#define vpiSuppressTime 3

/**************************** delay structures ****************************/
typedef struct t_vpi_delay
{
  struct t_vpi_time *da; /* pointer to user allocated array of delay values */
  PLI_INT32 no_of_delays; /* number of delays */
  PLI_INT32 time_type; /* [vpiScaledRealTime, vpiSimTime, vpiSuppressTime] */
  PLI_INT32 mtm_flag; /* true for mtm values */
  PLI_INT32 append_flag; /* true for append */
  PLI_INT32 pulsere_flag; /* true for pulsere values */
} s_vpi_delay, *p_vpi_delay;

/**************************** value structures ****************************/
/* vector value */
typedef struct t_vpi_vecval
{
  /* following fields are repeated enough times to contain vector */
  PLI_INT32 aval, bval; /* bit encoding: ab: 00=0, 10=1, 11=X, 01=Z */
} s_vpi_vecval, *p_vpi_vecval;

/* strength (scalar) value */
typedef struct t_vpi_strengthval
{
  PLI_INT32 logic; /* vpi[0,1,X,Z] */
  PLI_INT32 s0, s1; /* refer to strength coding below */
} s_vpi_strengthval, *p_vpi_strengthval;

/* strength values */
#define vpiSupplyDrive     0x80
#define vpiStrongDrive     0x40
#define vpiPullDrive       0x20
#define vpiWeakDrive       0x08
#define vpiLargeCharge     0x10
#define vpiMediumCharge    0x04
#define vpiSmallCharge     0x02
#define vpiHiZ             0x01

/* generic value */
typedef struct t_vpi_value
{
  PLI_INT32 format; /* vpi[[Bin,Oct,Dec,Hex]Str,Scalar,Int,Real,String,
                              Vector,Strength,Suppress,Time,ObjType]Val */
  union
    {
      PLI_BYTE8 *str; /* string value */
      PLI_INT32 scalar; /* vpi[0,1,X,Z] */
      PLI_INT32 integer; /* integer value */
      double real; /* real value */
      struct t_vpi_time *time; /* time value */
      struct t_vpi_vecval *vector; /* vector value */
      struct t_vpi_strengthval *strength; /* strength value */
      PLI_BYTE8 *misc; /* ...other */
    } value;
} s_vpi_value, *p_vpi_value;

/* value formats */
#define vpiBinStrVal             1
#define vpiOctStrVal             2
#define vpiDecStrVal             3
#define vpiHexStrVal             4
#define vpiScalarVal             5
#define vpiIntVal                6
#define vpiRealVal               7
#define vpiStringVal             8
#define vpiVectorVal             9
#define vpiStrengthVal          10
#define vpiTimeVal              11
#define vpiObjTypeVal           12
#define vpiSuppressVal          13

/* delay modes */
#define vpiNoDelay               1
#define vpiInertialDelay         2
#define vpiTransportDelay        3
#define vpiPureTransportDelay    4

/* force and release flags */
#define vpiForceFlag             5
#define vpiReleaseFlag           6

/* scheduled event cancel flag */
#define vpiCancelEvent           7

/* bit mask for the flags argument to vpi_put_value() */
#define vpiReturnEvent           0x1000

/* scalar values */
#define vpi0                     0
#define vpi1                     1
#define vpiZ                     2
#define vpiX                     3
#define vpiH                     4
#define vpiL                     5
#define vpiDontCare              6

/*
#define vpiNoChange 7 Defined under vpiTchkType, but
can be used here.
*/
/********************* system task/function structure *********************/
typedef struct t_vpi_systf_data
{
  PLI_INT32 type;          /* vpiSysTask, vpiSysFunc */
  PLI_INT32 sysfunctype;   /* vpiSysTask, vpi[Int,Real,Time,Sized,
                              SizedSigned] Func */
  PLI_BYTE8 *tfname;       /* first character must be `$' */
  PLI_INT32 (*calltf)();
  PLI_INT32 (*compiletf)();
  PLI_INT32 (*sizetf)(); /* for sized function callbacks only */
  PLI_BYTE8 *user_data;
} s_vpi_systf_data, *p_vpi_systf_data;

#define vpiSysTask               1
#define vpiSysFunc               2
/* the subtypes are defined under the vpiFuncType property */

/***************** Verilog execution information structure ****************/
typedef struct t_vpi_vlog_info
{
  PLI_INT32 argc;
  PLI_BYTE8 **argv;
  PLI_BYTE8 *product;
  PLI_BYTE8 *version;
} s_vpi_vlog_info, *p_vpi_vlog_info;

/******************** PLI error information structure *********************/
typedef struct t_vpi_error_info
{
   PLI_INT32 state;              /* vpi[Compile,PLI,Run] */
   PLI_INT32 level;              /* vpi[Notice,Warning,Error,System,Internal] */
   PLI_BYTE8 *message;
   PLI_BYTE8 *product;
   PLI_BYTE8 *code;
   PLI_BYTE8 *file;
   PLI_INT32 line;
} s_vpi_error_info, *p_vpi_error_info;


/* error types */
#define vpiCompile              1
#define vpiPLI                  2
#define vpiRun                  3

#define vpiNotice               1
#define vpiWarning              2
#define vpiError                3
#define vpiSystem               4
#define vpiInternal             5

/************************** callback structures ***************************/
/* normal callback structure */
typedef struct t_cb_data
{
  PLI_INT32 reason; /* callback reason */
  PLI_INT32 (*cb_rtn)(struct t_cb_data *); /* call routine */
  vpiHandle obj; /* trigger object */
  p_vpi_time time; /* callback time */
  p_vpi_value value; /* trigger object value */
  PLI_INT32 index; /* index of the memory word or var select that changed */
  PLI_BYTE8 *user_data;
} s_cb_data, *p_cb_data;

/**************************** CALLBACK REASONS ****************************/
/*************************** Simulation related ***************************/
#define cbValueChange          1
#define cbStmt                 2
#define cbForce                3
#define cbRelease              4

/****************************** Time related ******************************/
#define cbAtStartOfSimTime     5
#define cbReadWriteSynch       6
#define cbReadOnlySynch        7
#define cbNextSimTime          8
#define cbAfterDelay           9

/***************************** Action related *****************************/
#define cbEndOfCompile        10
#define cbStartOfSimulation   11
#define cbEndOfSimulation     12
#define cbError               13
#define cbTchkViolation       14
#define cbStartOfSave         15
#define cbEndOfSave           16
#define cbStartOfRestart      17
#define cbEndOfRestart        18
#define cbStartOfReset        19
#define cbEndOfReset          20
#define cbEnterInteractive    21
#define cbExitInteractive     22
#define cbInteractiveScopeChange 23
#define cbUnresolvedSystf     24

/************************** Added with 1364-2000 **************************/
#define cbAssign              25
#define cbDeassign            26
#define cbDisable             27
#define cbPLIError            28
#define cbSignal              29

/************************* FUNCTION DECLARATIONS **************************/
/* callback related */
XXTERN vpiHandle     vpi_register_cb      PROTO_PARAMS((p_cb_data cb_data_p));
XXTERN PLI_INT32     vpi_remove_cb        PROTO_PARAMS((vpiHandle cb_obj));
XXTERN void          vpi_get_cb_info      PROTO_PARAMS((vpiHandle object,
                                            p_cb_data cb_data_p));
XXTERN vpiHandle     vpi_register_systf   PROTO_PARAMS((p_vpi_systf_data
                                            systf_data_p));
XXTERN void vpi_get_systf_info            PROTO_PARAMS((vpiHandle object,
                                            p_vpi_systf_data systf_data_p));
/* for obtaining handles */
XXTERN vpiHandle      vpi_handle_by_name  PROTO_PARAMS((PLI_BYTE8 *name,
                                            vpiHandle scope));
XXTERN vpiHandle      vpi_handle_by_index PROTO_PARAMS((vpiHandle object,
                                            PLI_INT32 indx));

/* for traversing relationships */
XXTERN vpiHandle      vpi_handle          PROTO_PARAMS((PLI_INT32 type,
                                            vpiHandle refHandle));
XXTERN vpiHandle      vpi_handle_multi    PROTO_PARAMS((PLI_INT32 type,
                                            vpiHandle refHandle1,
                                            vpiHandle refHandle2, ... ));
XXTERN vpiHandle      vpi_iterate         PROTO_PARAMS((PLI_INT32 type,
                                            vpiHandle refHandle));
XXTERN vpiHandle      vpi_scan            PROTO_PARAMS((vpiHandle iterator));

/* for processing properties */
XXTERN PLI_INT32 vpi_get                  PROTO_PARAMS((PLI_INT32 property,
                                            vpiHandle object));

XXTERN PLI_BYTE8 *vpi_get_str             PROTO_PARAMS((PLI_INT32 property,
                                            vpiHandle object));
/* delay processing */
XXTERN void         vpi_get_delays        PROTO_PARAMS((vpiHandle object,
                                            p_vpi_delay delay_p));
XXTERN void         vpi_put_delays        PROTO_PARAMS((vpiHandle object,
                                            p_vpi_delay delay_p));

/* value processing */
XXTERN void       vpi_get_value           PROTO_PARAMS((vpiHandle expr,                                                    p_vpi_value value_p));
XXTERN vpiHandle  vpi_put_value           PROTO_PARAMS((vpiHandle object,
                                            p_vpi_value value_p,
                                            p_vpi_time time_p,
                                            PLI_INT32 flags));

/* time processing */
XXTERN void       vpi_get_time            PROTO_PARAMS((vpiHandle object,
                                            p_vpi_time time_p));

/* I/O routines */
XXTERN PLI_UINT32 vpi_mcd_open            PROTO_PARAMS((PLI_BYTE8 *fileName));
XXTERN PLI_UINT32 vpi_mcd_close           PROTO_PARAMS((PLI_UINT32 mcd));
XXTERN PLI_BYTE8  *vpi_mcd_name            PROTO_PARAMS((PLI_UINT32 cd));
XXTERN PLI_INT32  vpi_mcd_printf           PROTO_PARAMS((PLI_UINT32 mcd,
                                            PLI_BYTE8 *format, ...));

XXTERN PLI_INT32 vpi_printf               PROTO_PARAMS((PLI_BYTE8 *format,
                                            ...));
/* utility routines */
XXTERN PLI_INT32 vpi_compare_objects      PROTO_PARAMS((vpiHandle object1,
                                            vpiHandle object2));
XXTERN PLI_INT32 vpi_chk_error            PROTO_PARAMS((p_vpi_error_info
                                            error_info_p));
XXTERN PLI_INT32 vpi_free_object          PROTO_PARAMS((vpiHandle object));
XXTERN PLI_INT32 vpi_get_vlog_info        PROTO_PARAMS((p_vpi_vlog_info
                                            vlog_info_p));

/* routines added with 1364-2000 */
XXTERN PLI_INT32 vpi_get_data             PROTO_PARAMS((PLI_INT32 id,
                                            PLI_BYTE8 *dataLoc,
                                            PLI_INT32 numOfBytes));
XXTERN PLI_INT32 vpi_put_data             PROTO_PARAMS((PLI_INT32 id,
                                            PLI_BYTE8 *dataLoc,
                                            PLI_INT32 numOfBytes));
XXTERN void *vpi_get_userdata             PROTO_PARAMS((vpiHandle obj));
XXTERN PLI_INT32 vpi_put_userdata         PROTO_PARAMS((vpiHandle obj,
                                            void *userdata));
XXTERN PLI_INT32 vpi_vprintf              PROTO_PARAMS((PLI_BYTE8 *format,
                                            va_list ap));
XXTERN PLI_INT32 vpi_mcd_vprintf          PROTO_PARAMS((PLI_UINT32 mcd,
                                            PLI_BYTE8 *format, va_list ap));
XXTERN PLI_INT32 vpi_flush PROTO_PARAMS((void));
XXTERN PLI_INT32 vpi_mcd_flush            PROTO_PARAMS((PLI_UINT32 mcd));
XXTERN PLI_INT32 vpi_control PROTO_PARAMS((PLI_INT32 operation,
...));
XXTERN vpiHandle vpi_handle_by_multi_index PROTO_PARAMS((vpiHandle obj,
PLI_INT32 num_index,
PLI_INT32 *index_array));

/**************************** GLOBAL VARIABLES ****************************/
PLI_VEXTERN PLI_DLLESPEC void (*vlog_startup_routines[])();
/* array of function pointers, last pointer should be null */
/* #undef PLI_EXTERN */
/* #undef PLI_VEXTERN */
#ifdef VPI_USER_DEFINED_DLLISPEC
#undef VPI_USER_DEFINED_DLLISPEC
/* #undef PLI_DLLISPEC */
#endif
#ifdef VPI_USER_DEFINED_DLLESPEC
#undef VPI_USER_DEFINED_DLLESPEC
/* IEEE */
/* HARDWARE DESCRIPTION LANGUAGE Std 1364-2001 */
/* #undef PLI_DLLESPEC */
#endif
#ifdef PLI_PROTOTYPES
/* #undef PLI_PROTOTYPES */
/* #undef PROTO_PARAMS */
/* #undef XXTERN */
/* #undef EETERN */
#endif

#ifdef __cplusplus
}
#endif

#endif /* VPI_USER_H */

Contents:

infodmp.inc   Some routines that you can include in your PLI source
              using the 1.0 tf_ routines to help with tf_ routine debugging.
              A good way to use this code is to modify it to your taste
              and copy it into your source for viewing t_tfexprinfo
              t_tfnodeinfo structures. 

/*
 * expr and node info dump routines include
 */

/*
 * routine to print contents of exprinfo record 
 */
#ifdef __STDC__
int prt_exprinfo(p_tfexprinfo pinfo) {
#else
int prt_exprinfo(pinfo)
 p_tfexprinfo pinfo;
{
#endif
 register int gi;
 char *exprtyp_tonam();
 char s1[512]; 
 
 io_printf("**** exprinfo dump ****\n");
 io_printf(" expr_type: %s\n", exprtyp_tonam(s1, (int) pinfo->expr_type));
 io_printf(" expr_ngroups: %d\n", pinfo->expr_ngroups);
 if (pinfo->expr_type == TF_READONLYREAL
  || pinfo->expr_type == TF_READWRITEREAL)
   io_printf(" expr_value: %g", pinfo->real_value); 
 else
  {
   for (gi = 0; gi < pinfo->expr_ngroups; gi++) 
    {
     io_printf(" group %d: aval=%x, bval=%x\n", gi,
      pinfo->expr_value_p[gi].avalbits, pinfo->expr_value_p[gi].bvalbits);
    }
  }
 io_printf(" expr_vec_size: %d\n", pinfo->expr_vec_size);
 io_printf(" expr_sign: %d\n", pinfo->expr_sign);
 /* think next 2 unused? */
 io_printf(" expr_lhs_select: %d\n", pinfo->expr_lhs_select);
 io_printf(" expr_lhs_select: %d\n", pinfo->expr_rhs_select);
 io_printf("**** end exprinfo ****\n");
}

/*
 * convert an expr_type expr info field to a name
 */
char *exprtyp_tonam(s, xtyp)
 char *s;
 int xtyp;
{
 switch (xtyp) {
  case TF_NULLPARAM: strcpy(s, "tf_nullparam"); break;
  case TF_STRING: strcpy(s, "tf_string"); break;
  case TF_READONLY: strcpy(s, "tf_readonly"); break;
  case TF_READWRITE: strcpy(s, "tf_readwrite"); break;
  case TF_RWBITSELECT: strcpy(s, "tf_rwbitselect"); break;
  case TF_RWPARTSELECT: strcpy(s, "tf_rwpartselect"); break;
  case TF_RWMEMSELECT: strcpy(s, "tf_rwmemselect"); break;
  case TF_READONLYREAL: strcpy(s, "tf_readonlyreal"); break;
  case TF_READWRITEREAL: strcpy(s, "tf_readwritereal"); break;
  default: 
   tf_message(ERR_INTERNAL, "", "",
   "unknown exprinfo expr_type value %d", xtyp);
 }
 return(s);
}

/*
 * routine to print contents of nodeinfo record 
 */
#ifdef __STDC__
int prt_nodeinfo(p_tfnodeinfo pinfo) {
#else
int prt_nodeinfo(pinfo)
 p_tfnodeinfo pinfo;
{
#endif
 register int gi;
 char *nodetyp_tonam();
 char s1[512]; 
 
 if (pinfo->node_type == TF_NULL_NODE)
  {
   io_printf("**** nodeinfo dump for tf_null_node (no contents) ****\n");
   return;
  }

 if (pinfo->node_symbol == NULL) strcpy(s1, "<empty>");
 else strcpy(s1, pinfo->node_symbol);
 io_printf("**** nodeinfo dump for symbol %s ****\n", s1);
 io_printf(" node_type: %s\n", nodetyp_tonam(s1, (int) pinfo->node_type));
 io_printf(" node_ngroups: %d\n", pinfo->node_ngroups);
 /* notice for now in Cver t_strengthval never for strength vectors value */
 /* bits stored in t_vecval (also for scalars) */
 /* letter to sent to IEEE committee for clarification */
 if (pinfo->node_type == TF_REAL_NODE)
   io_printf(" node_value: %g", *pinfo->node_value.real_val_p); 
 else
  {
   for (gi = 0; gi < pinfo->node_ngroups; gi++) 
    {
     io_printf(" group %d: aval=%x, bval=%x\n", gi,
      pinfo->node_value.vecval_p[gi].avalbits,
      pinfo->node_value.vecval_p[gi].bvalbits);
    }
  }
 io_printf(" node_vec_size: %d\n", pinfo->node_vec_size);
 io_printf(" node_sign: %d\n", pinfo->node_sign);
 io_printf(" node_ms_index: %d\n", pinfo->node_ms_index);
 io_printf(" node_ls_index: %d\n", pinfo->node_ls_index);
 io_printf(" node_mem_size: %d\n", pinfo->node_mem_size);
 io_printf(" node_lhs_element: %d\n", pinfo->node_lhs_element);
 io_printf(" node_rhs_element: %d\n", pinfo->node_rhs_element);
 io_printf("**** end nodeinfo ****\n");
}

/*
 * convert a node_type node info field type to a name
 */
char *nodetyp_tonam(s, ntyp)
 char *s;
 int ntyp;
{
 switch (ntyp) {
  case TF_NULL_NODE: strcpy(s, "tf_null_node"); break;
  case TF_REG_NODE: strcpy(s, "tf_reg_node"); break;
  case TF_INTEGER_NODE: strcpy(s, "tf_integer_node"); break;
  case TF_REAL_NODE: strcpy(s, "tf_real_node"); break;
  case TF_TIME_NODE: strcpy(s, "tf_time_node"); break;
  case TF_NETVECTOR_NODE: strcpy(s, "tf_netvector_node"); break;
  case TF_NETSCALAR_NODE: strcpy(s, "tf_netscalar_node"); break;
  case TF_MEMORY_NODE: strcpy(s, "tf_memory_node"); break;
  default: 
   tf_message(ERR_INTERNAL, "", "",
   "unknown nodeinfo node_type value %d", ntyp);
 }
 return(s);
}

char *prt_tfreason(s, reason)
 char *s;
 int reason;
{
 switch (reason) {
  case REASON_CHECKTF: strcpy(s, "reason_checktf");
  case REASON_SIZETF: strcpy(s, "reason_sizetf"); break;
  case REASON_CALLTF: strcpy(s, "reason_calltf"); break;
  /* not supported by Cver */
  case REASON_SAVE: strcpy(s, "reason_save"); break;
  /* not supported by Cver */
  case REASON_RESTART: strcpy(s, "reason_restart"); break;
  /* not supported by Cver */
  case REASON_DISABLE: strcpy(s, "reason_disable"); break;
  case REASON_PARAMVC: strcpy(s, "reason_paramvc"); break;
  case REASON_SYNCH: strcpy(s, "reason_synch"); break;
  case REASON_FINISH: strcpy(s, "reason_finish"); break;
  case REASON_REACTIVATE: strcpy(s, "reason_reactivate"); break;
  case REASON_ROSYNCH: strcpy(s, "reason_rosynch"); break;
  /* not supported by Cver */
  case REASON_PARAMDRC: strcpy(s, "reason_paramdrc"); break;
  case REASON_ENDOFCOMPILE: strcpy(s, "reason_endofcompile"); break;
  /* not supported by Cver */
  case REASON_SCOPE: strcpy(s, "reason_scope"); break;
  case REASON_INTERACTIVE: strcpy(s, "reason_interactive"); break;
  case REASON_RESET: strcpy(s, "reason_reset"); break;
  case REASON_ENDOFRESET: strcpy(s, "reason_endofreset"); break;
  /* not supported by Cver */
  case REASON_FORCE: strcpy(s, "reason_force"); break;
  /* not supported by Cver */
  case REASON_RELEASE: strcpy(s, "reason_release"); break;
  /* not supported by Cver */
  case REASON_STARTOFSAVE: strcpy(s, "reason_startofsave"); break;
  /* not supported by Cver */
  case REASON_STARTOFRESTART: strcpy(s, "reason_startofrestart"); break;
  default: 
   tf_message(ERR_INTERNAL, "", "", "unknown misctf call reason %d", reason);
 }
 return(s);
}

                            INSTALLING CVER

See instructions in the README file.  

       INSTRUCTIONS FOR MAKING CVER BINARY AND PLI OBJECT


  The following instructions assume you are compiling with gcc on either
a X86 Linux, Sparc Solaris, or Mac OSX, Cygwin (here gcc must be named cc).  
If not, see instructions below. 

  For X86 Linux, type: 

     make -f makefile.lnx all

  For Solaris running Sparc type:

     make -f makefile.sparc-gcc all

  For Apple OSX type:

     make -f makefile.osx all

  For Cygwin:

     make -f makefile.cygwin all

  These commands will build binary cver in ../bin director.  If you type
"../bin/cver", Cver will print its start up message and then terminate with
an error saying no Verilog input files specified.  Next step is to run
install tests in tests_and examples directory.  See README file in top level
directory and in tests_and_examples directory for instructions.

   To make just Cver type "make -f makefile.[OS]  cver".  Type
"make -f makefile.[OS] clean" to remove files so you can remake everything.

A. MAKING CVER ON OTHER SYSTEM

   The makefile.lnx make file should work on any non X86 system running
Linux.  If you are using a different compiler, just edit the various
compiler , library and LD make variables and options around line 20 of the
makefile.lnx file.  If you are not linking with GNU ld, you will need to look
up your linker's partial link options and edit the cverobj dependency line
linking action.

   For other systems, you will probably need to deal with differences in
include files and libraries.  There are only five areas that usually
require changes:

   1) Cver uses dlopen/dlsym dynamic linking to load user PLI dynamic
      libraries using either the +load_pli1= or +load_vpi= options. 
      The programming interface to dynamic linking loading varies
      between system.  Therefore to port to another system, you will
      probably need to add ifdefs that include your system's dlopen and
      dlsym calls.  Your system will probably follow either the unix
      (sparc/linux) conventions or the Apple OSX (??) conventions.
      All dynmaic linking code is at the top of v_vpi.c file
      mostly in the __process_pli_dynamic_libs routine.

   2) Some of the wide math code depends on byte order of your system. See
      the definitions of ENDIAN in the v.h file.  It appears that different
      systems define different ENDIAN constants in different include files.
      Currently, ifdefs are set up for Linux, Apple OSX and Sparc Solaris.

   3) Signals are needed for Cver debugger.  Do a grep for SIGINT and
      signal calls to find possible problem areas.

   4) The debugger allows escaping to shell script using fork.  Look
      at the __escape_to_shell routines in v_dbg.c.  One quick fix for
      this is to just make __escape_to_shell a dummy empty routine since
      user can always start a shell script in another window.

   5) Cver has been ported to many systems so it should not be too hard
      to port to other systems although you may need to add a number of
      ifdefs for your system.

B. MAKING CVER FOR DEBUGGING

   To make a debugging version of either Cver, you need to edit the make
   file or make copy of the make file and edit that.  Change your makefile
   around line 35 to comment out the CFLAGS line that compiles without
   optimization and uncomment the line thatturns on -g.  Then type "gdb cver"
   and use gdb run command with normal Cver command line options.

/* Copyright (c) 1991-2007 Pragmatic C Software Corp. */

/*
   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the
   Free Software Foundation; either version 2 of the License, or (at your
   option) any later version.
 
   This program is distributed in the hope that it will be useful, but
   WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
   General Public License for more details.
 
   You should have received a copy of the GNU General Public License along
   with this program; if not, write to the Free Software Foundation, Inc.,
   59 Temple Place, Suite 330, Boston, MA, 02111-1307.
 
   We are selling our new Verilog compiler that compiles to X86 Linux
   assembly language.  It is at least two times faster for accurate gate
   level designs and much faster for procedural designs.  The new
   commercial compiled Verilog product is called CVC.  For more information
   on CVC visit our website at www.pragmatic-c.com/cvc.htm or contact 
   Andrew at avanvick@pragmatic-c.com
   
 */


/*
 * main module - command option and license manager code
 */

/*
 * main module
 */
#include <stdio.h>
#include <time.h>

#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <errno.h>
#include <sys/time.h>
#include <unistd.h>
#include <string.h>
#include <stdlib.h>

#include <ctype.h>

#include <signal.h>

#include <setjmp.h>

#ifdef __DBMALLOC__
#include "../malloc.h"
#endif

#include "v.h"
#include "cvmacros.h"

static char copyright[]
 = "Copyright (c) 1991-2007 Pragmatic C Software Corp.";

/* declares from v.h */
/* various simulation counting variables */
char *__vers;          /* actual product info */
char *__vers2;
char *__ofdt;
char *__platform;
char *__start_sp, *__end_sp;/* pointer for "big" memory allocator */
char *__pvdate;        /* date in unix form */
char *__pv_timestamp;  /* timestamp for design */
time_t __start_time;   /* start wall clock times in secs. */
time_t __start_mstime; /* start millisecond part */
time_t __end_comp_time;/* end of compilation time */
time_t __end_comp_mstime;
time_t __end_prep_time;/* end of preparation time */
time_t __end_prep_mstime;
time_t __end_time;     /* start and end wall clock times */
time_t __end_mstime;   /* start and end wall clock times */

/* various file variables and global data base flags (i/o vars) */
char **__in_fils;      /* malloced input file list from args */
int32 __siz_in_fils;   /* current size of input files */
int32 __last_inf;      /* last input file in list */
int32 __last_optf;     /* last option file */
int32 __last_lbf;      /* last lib/inc file (starts last_inf + 1) */
int32 __last_srcf;     /* last src containing file for debugger */
struct incloc_t *__inclst_hdr; /* header of included files list */
struct incloc_t *__inclst_end; /* end of included files list */
struct filpos_t *__filpostab; /* in fils size tab of file line pos. */
FILE *__save_log_s;    /* if $nolog executed, value to use if log */
int32 __echo_iactcmds_tolog; /* T => echo interactive cmds to log file */
FILE *__save_key_s;    /* if $nolog executed, value to use if log */
int32 __nokey_seen;    /* $nokey executed and no key */
FILE *__in_s;
FILE *__log_s;
FILE *__cmd_s;         /* command file source or null for tty */ 
FILE *__key_s;         /* if key_s nil but key_fnam not, must open */
struct optlst_t *__opt_hdr;   /* header of expanded option list */
struct optlst_t *__opt_end;   /* wrk end of expanded option list */
word32 *__wsupptab;    /* tab (1 bit/msg) for warn and iact suppress */
char *__blnkline;      /* work blank line */
char __pv_homedir[RECLEN]; /* home dir - . if HOME env. not set */
struct mcchan_t __mulchan_tab[32];/* mc desc. tab (32 built in Ver) */ 
struct fiofd_t **__fio_fdtab; /* array of ptrs to file io stream */
char *__fiolp;         /* fio file input work string ptr */
char *__fiofp;         /* fio file input work fmt string ptr */
long __scanf_pos;      /* byte offset position of scanf in file */
sighandler *__old_int_sig;  /* value of quit (^c) signal on entry */
int32 __force_base;    /* for output force base if not BASENONE */
struct vinstk_t **__vinstk;/* open file/macro list in stack form */
struct vinstk_t *__visp;/* pointer to top of open input stack */
int32 __vin_top;       /* index of top of current file stack */
char *__log_fnam;      /* log file for all terminal output */
char *__sdf_opt_log_fnam; /* sdf log file if set by cmd arg */
FILE *__sdf_opt_log_s; /* and open file ptr */
int32 __sdf_no_warns;  /* T => don't print any SDF warning msgs */
int32 __sdf_no_errs;   /* T => don't print any SDF error msgs */
int32 __sdf_from_cmdarg; /* T => SDF annotation call from cmd option */
char *__cmd_fnam;      /* command interact. input file name */
char *__cmd_start_fnam;/* -i startup interactive input file name */
char *__key_fnam;      /* key file name and stream */
FILE *__tr_s;          /* trace output file - can be stdout */
char *__tr_fnam;
int32 __cmd_ifi;       /* constant command in_fils index */
char *__lic_path;      /* +licpath [path] if option used */
FILE *__sdf_s;         /* current SDF back annotate file/stream */
struct sdfnamlst_t *__sdflst; /* list of sdf annotate option files */
int32 __sdf_sav_enum;  /* saved error num. for annotate inhibit */
int32 __sdf_sav_maxerrs; /* saved max errors so won't stop */
int32 __has_sdfann_calls;/* T => no sdf annotate systsk calls in src */ 
int32 __sdf_active;    /* T => annotating SDF - for PLI erro code  */
struct mod_t *__sdf_mdp; /* special sdf context mod */

/* cfg variables */
char *__cmdl_library;  /* library name to file off the command line */
struct mapfiles_t *__map_files_hd; /* hdr of map files from cmd args */
struct mapfiles_t *__map_files_tail; /* end of map file list */
struct cfglib_t *__cfglib_hd; /* head of list of libs for cfg */
struct cfglib_t *__cfglib_tail; /* and tail */
struct cfg_t *__cfg_hd;/* head of list of cfgs */
struct cfg_t *__cur_cfg;/* current cfg */
struct mod_t *__cfg_mdp;/* SJM - remove me - why global */
char **__bind_inam_comptab;/* during cfg binding, comp descent comps */ 
int32 __siz_bind_comps;/* current malloc size of table */
int32 __last_bind_comp_ndx;/* last currently used comp end index */ 
int32 __cfg_verbose;   /* T => emit cfg reading verbose messages */ 

/* file variables */
int32 __cur_infi;      /* index in in_fils of current file */
struct optlst_t *__new_opt_hdr;/* header of expanded option list */
struct optlst_t *__new_opt_end;/* wrk end of expanded option list */
struct optlst_t *__log_olp;   /* log option, nil if none */
struct optlst_t *__help_olp;  /* help option, nil if none */
struct optlst_t *__quiet_olp; /* quiet option, nil if none */
struct optlst_t *__verb_olp;  /* verbose option, nil if none */  
int32 __vpi_argc;      /* global arg count for vpi */
char **__vpi_argv;     /* global arg array for vpi */
char *__vpi_argv0;     /* argv execed program name */
char *__cur_fnam;      /* being read file name for errors */
int32 __cur_fnam_ind;  /* index in in_fils of cur_fnam */
int32 __sfnam_ind;     /* global file index for current stmt. */
int32 __slin_cnt;      /* global line no. for currently check stmt */
int32 __vpifnam_ind;   /* vpi_ global current file index */
int32 __vpilin_cnt;    /* vpi_ global current line no. */
struct expr_t *__srm_xp; /* current string 'file' for sreadmem */
char *__srm_strp;      /* char. pos. in sreadmem string */
char *__srm_strp_beg;  /* work alloced location for sreadmem string */
int32 __srm_strp_len;  /* alloced length */
int32 __srm_stargi;    /* current string position number */
int32 __in_ifdef_level;/* current processing `ifdef level */ 
int32 __ifdef_skipping;/* T = skipping not included ifdef section */
char *__langstr;       /* work string for `language */
int32 __doing_langdir; /* T => processing `language directive */ 
int32 __rding_top_level; /* T => reading outside top level construct */

/* variables for batch tracing */
word64 __last_trtime;  /* last trace statement time */
word64 __last_evtrtime;/* last event trace time */
struct itree_t *__last_tritp;/* last event traced inst. itree loc. */ 

/* command processing variables and temps */
int32 __pv_err_cnt, __pv_warn_cnt; /* error counts */
int32 __inform_cnt;    /* number of informs */
int32 __outlinpos;     /* current trunc. output line pos. */
long __mem_use;        /* counts allocated mem for debugging */
long __mem_allocated;  /* bytes allocated */
long __mem_freed;      /* bytes freed */
long __memstr_use;     /* counts allocated string mem for debugging */
long __arrvmem_use;    /* allocated bytes for Verilog arrays */
long __mem_udpuse;     /* number of bytes used by udp tables */
word64 __tim_zero;     /* place for time of constant 0 */
int32 __num_glbs;      /* total no. of globals in design */
int32 __num_inmodglbs; /* glbs thar resolve to intra module refs. */
int32 __num_uprel_glbs;/* number of upward relative globals */
int32 __nets_removable;/* flat no. of deletable nets */
int32 __flnets_removable;/* removable static nets */
int32 __gates_removable; /* removable static gates */
int32 __flgates_removable; /* flat no. of deletable gates */
int32 __contas_removable; /* removabale static cont. assigns */
int32 __flcontas_removable; /* flat no. of deletable cont. assigns */

/* special allocate free variables */
struct ncablk_t *__hdr_ncablks; /* blocks used for ncomp recs */
int32 __ncablk_nxti;   /* index of next free pos. */
struct cpblk_t *__hdr_cpblks; /* blocks used for cell recs*/
int32 __cpblk_nxti;    /* index of next free pos. */
struct cppblk_t *__hdr_cppblks; /* blocks used for cell pin recs*/
int32 __cppblk_nxti;   /* index of next free pos. */
struct tnblk_t *__hdr_tnblks;  /* blocks of symb table tree nodes */
int32 __tnblk_nxti;    /* index of next free pos. */ 
struct cpnblk_t *__hdr_cpnblks;  /* blocks of explicit cell pnames */

/* source processing variables */
int32 __lin_cnt;       /* line number while reading a file */
int32 __saverr_cnt;    /* counter to inhibit more than a err in xpr */
int32 __max_errors;    /* maximum errors before stopping */
int32 __rding_comment; /* flag so comment non printable chars ok */
int32 __total_rd_lines;/* total number of lines read */
int32 __total_lang_dirs; /* total num `language directives read */

/* booleans for program options (flags) */
int32 __verbose;       /* T => emit various extra messages */
int32 __quiet_msgs;    /* T => do not emit msgs just errors */
int32 __no_warns;      /* T => don't print warning msgs */
int32 __no_errs;       /* T => don't print error msgs */
int32 __no_informs;    /* T => don't print inform msgs (dflt) */
int32 __debug_flg;     /* T => turn on debugging output */
int32 __opt_debug_flg; /* T => turn on vm compiler debugging output */
int32 __st_tracing;    /* T => trace statement execution */
int32 __ev_tracing;    /* T => trace event schedules and processes */
int32 __pth_tracing;   /* T => trace path delays in detail */
int32 __prt_stats;     /* T => print design statics tables */
int32 __prt_allstats;  /* T => print design and mod content tabs */
int32 __show_cancel_e; /* T => chg val to x on pulse cancelled event */
int32 __showe_onevent; /* T => if showing cancel e, drive x on event */
int32 __warn_cancel_e; /* T => emit warn cancel_e (indep. of cancel) */
int32 __rm_gate_pnd0s; /* T => remove #0 from all gates */
int32 __rm_path_pnd0s; /* T => (default) remove all 0 delay paths */
int32 __dmpvars_all;   /* T => dumpvars all variables */

/* command option booleans */
int32 __lib_verbose;   /* T => emit src.file/lib source messages */
int32 __sdf_verbose;   /* T => emit msgs for SDF annotated delays */
int32 __switch_verbose;/* T => emit msgs for switch/tran chan build */
int32 __chg_portdir;   /* T => chg port dir to bid. for XL compat */
int32 __nb_sep_queue;  /* F => old un-seperated nb in pnd0 queue */
int32 __decompile;     /* T => decompile and print Verilog source */
int32 __compile_only;  /* T => check syntax (inc. lib.) no quads */
int32 __parse_only;    /* T => first pass parse only to chk sep mod */
int32 __dflt_ntyp;     /* Verilog wire type for normal nets */
int32 __mintypmax_sel; /* for (e:e:e) expressions value to use */
int32 __sdf_mintypmax_sel; /* min:nom_max over-ride for $sdf_annotate */
int32 __gateeater_on;  /* T => attempt to remove (disconnect) gates */ 
int32 __no_expand;     /* T => make all wire vectors vectored */
int32 __in_cell_region;/* T => turn on cell bit for every module */
int32 __unconn_drive;  /* if none TOK_NONE else PULL 0 or PULL 1 */
int32 __no_specify;    /* T => check but no simulate with specify */
int32 __no_tchks;      /* T => check but no simulate with tim chks */
int32 __lib_are_cells; /* T => if in lib, the mark as cell (dflt.) */
int32 __design_has_cells;/* T => cells somewhere in design */
int32 __accelerate;    /* T => use short circuits g/prt code if can */
int32 __pli_keep_src;  /* T => keep more source stmt info for pli */
int32 __use_impthdels; /* T => use src-dst im path dels */

/* source input variables and temps */
char __lasttoken[IDLEN];/* current last pushed back symbol name */
char __token[IDLEN];   /* current symbol (in canonical (lc) form) */
int32 __toktyp;        /* place for current toktyp value */
int32 __lasttoktyp;    /* push back token type (= UNDEF if none) */
int32 __last_attr_prefix;/* push back pending attr prefix state */
int32 __itoklen;       /* current number token bit length */
int32 __itoksized;     /* T => token is sized */
int32 __itokbase;      /* base constant for number token */
int32 __itoksizdflt;   /* '[base] form with width (uses dflt.) */
int32 __itok_signed;   /* T => token is signed number */
double __itok_realval; /* actual scannoer double val */
char *__strtoken;      /* growable token to hold string */
int32 __strtok_wid;    /* current size of string token */    
char *__numtoken;      /* growable token to hold numbers */
int32 __numtok_wid;    /* current size of number token */    
int32 __letendnum_state; /* T => letter can end unsized num. */
int32 __macro_sep_width; /* T => possible beginning of macro 2 tok num */
int32 __maybe_2tok_sized_num; /* T => seeing number after macro num */
int32 __macro_sav_nwid;/* value of saved first tok width */
int32 __first_linetok; /* T => token first on line */
int32 __file_just_op;  /* T => new file and no token yet returned */
int32 __first_num_eol; /* T => first tok because number ended line */
char *__macwrkstr;     /* work string for macros */ 
int32 __mac_line_len;  /* actual length of macro line in wrk str */   
int32 __macwrklen;     /* allocated len of mac. work string */
struct macarg_t *__macarg_hdr; /* hdr of list of format mac. args */
int32 __macbs_flag;    /* T=> 8'h`DEFINE catch multiple bases errors */
char *__attrwrkstr;    /* work string for attributes */
int32 __attr_line_len; /* actual length of attribute string */ 
int32 __attrwrklen;    /* alloced len of attr work string - grows */
char *__attrparsestr;  /* string to parse attr out of */
int32 __attrparsestrlen; /* string to parse attr out of */
int32 __attr_prefix;   /* T => token has attribute prefix */
int32 __attr_fnam_ind; /* location of attr inst. */
int32 __attr_lin_cnt;  /* location of attr inst. */
struct attr_t __wrk_attr; /* latest read attribute */
char *__xs, *__xs2;    /* places to put expr to str trunc messages */
int32 __pv_ctv;        /* tmp for white space skipping macros */
int32 __syncto_class;  /* token class sync skipping halted at */
char *__exprline;      /* expr. output line work string */
int32 __exprlinelen;   /* expr. line length */
int32 __cur_sofs;      /* ndx of next ofs (position) in expr line */
word32 *__acwrk;       /* a value work string for scanning number */
word32 *__bcwrk;       /* b value work string for scanning number */
word32 __addrtmp[2];   /* up to 32 bit temp with addr. */
int32 __abwrkwlen;     /* current acwrk a half length in words */
char __portnam[IDLEN];
char __pv_varnam[IDLEN]; /* variable name */
int32 __expr_is_lval;  /* T => parsing proc. assign lhs */
int32 __allow_scope_var; /* T => process systask arg can be scope */

/* vars needed for pushing back numbers (see var. comment) */
int32 __lastitokbase;
int32 __lastitoksized;
int32 __lastitoksizdflt;
int32 __lastitok_signed;
int32 __lastitoklen;
word32 *__lastacwrk;   /* special malloced push back num value */
word32 *__lastbcwrk; 
double __lastitok_realval;

/* the module and module subtask specific work variables */
struct mod_t *__oinst_mod;/* ptr. to old current module for copying */
struct mod_t *__end_mdp; /* end of module def. list */
struct cell_t *__end_cp; /* end of module inst. list */
int32 __cp_num;          /* counter for unnamed gate/inst pos. */ 
struct conta_t *__end_ca; /* end of module conta list */
int32 __conta_num;     /* counter for building symbol for conta */
struct varinitlst_t *__end_mod_varinitlst; /* end of mod var inits */
struct symtab_t *__tfcall_wrksytp;/* wrk tf tab for undecl xmr uprel */  

struct dfparam_t *__end_dfp;/* module current end of defparam list */
struct task_pin_t *__end_tpp; /* end of task port list */
struct task_t *__end_tbp;/* end of top level task/functions/blocks */
struct task_t *__cur_tsk;/* ptr. to current task */
struct net_t *__end_paramnp; /* end of ordered parm decl. list */
struct net_t *__end_loc_paramnp; /* end of ordered parm loc decl. list */
struct net_t *__end_impparamnp; /* end of ordered imprt parm decl lst */
struct net_t *__end_glbparamnp; /* end of ordered glb parm decl. lst */
struct net_t *__end_tskparamnp; /* end of task param decl. list */
struct net_t *__end_tsk_loc_paramnp; /* end of task param decl. list */
struct ialst_t *__end_ialst; /* end of module initial/always list */
struct gref_t *__grwrktab;  /* work table for building mod glbs */
int32 __grwrktabsiz;        /* its size */
int32 __grwrknum;      /* current number of glbs in work table */ 
int32 __cur_declobj;   /* token type of declared mod or task */
int32 __pv_stlevel;    /* tmp. for current stmt nesting level */
int32 __design_no_strens;/* T => no strengths used in design */
int32 __strenprop_chg; /* during propagate pass at least one chged */
int32 __splitting;     /* T => in process of splitting module */
int32 __processing_pnd0s;/* T => in time unit, in end #0 region */
struct dce_expr_t *__cur_dce_expr; /* glb for edge events eval expr */
int32 __lofp_port_decls; /* T => exclusive hdr port decls appeared */ 
struct exprlst_t *__impl_evlst_hd; /* hdr of impl @(*) ev expr list */
struct exprlst_t *__impl_evlst_tail; /* and its tail */
int32 __canbe_impl_evctrl; /* glb switch to allow @(*) as ev ctrl */

/* variables for dumpvars */
int32 __dv_seen;       /* dumpvars seen but not yet setup */
int32 __dv_state;      /* processing state of dumpvars */
word64 __dv_calltime;  /* time dump var. first (and only) called */
int32 __dv_dumplimit_size; /* user set limit of dv file size (0 none) */
int32 __dv_file_size;  /* current size of dumpvars file */
int32 __dv_time_emitted; /* flag to stop repeated same #[time] */
char *__dv_fnam;       /* name of dumpvars output file */
int32 __dv_func;       /* global set with type of dumpvar dumping */
struct mdvmast_t *__dv_hdr; /* hdr of mast dumpvar rec. list */
struct mdvmast_t *__dv_end; /* end of dumpvar rec. list */
struct dvchgnets_t *__dv_netfreelst; /* free list of time var chges */
int32 __dv_fd;         /* file number of dmpvars fd */
char *__dv_buffer;     /* buffer to speed up dumpvars output */
int32 __dv_nxti;       /* next free location */
int32 __dv_outlinpos;  /* line postion in dump vars file */ 
int32 __next_dvnum;    /* highest so far used dumpvars number */
struct dvchgnets_t *__dv_chgnethdr;  /* curr. time var chg list hdr */
int32 __dv_isall_form; /* T doing all of design dumpvar setup */
int32 __dv_allform_insrc;/* T dumpvars all form in source */

/* time scale - precision variables */
word32 __cur_units;    /* current units (0 (1s) - 15 (1ft) */ 
word32 __cur_prec;     /* current digits of precision (0-15) */
word32 __des_timeprec; /* assume -, 0-15 design sim. tick prec. */
word32 __tfmt_units;   /* %t output units (also interact. units) */
word32 __tfmt_precunits;/* %t number of prec. digits */
int32 __des_has_timescales;/* T => design has at least one timescale */
char *__tfmt_suf;      /* suffix for %t */
int32 __tfmt_minfwid;  /* minimum field width for %t */
word64 __itoticks_tab[16];/* table of scales amount from prec. */
char __timstr_unitsuf[4];/* to_timstr units suffix if needed */
word64 __timstr_mult;  /* multiplier if needed */
int32  __nd_timstr_suf;/* T => need to_timstr units */

/* veriusertfs pli user function and task work variables */ 
/* SJM 07/16/02 - need internal veriuser tfs for new +loadpli1 option */
struct t_tfcell *__shadow_veriusertfs; /* internal copy of table */
int32 __last_veriusertf; /* last user veriusertfs tf number */
struct tfinst_t *__tfinst;/* current tf_ inst loc. */
struct tfrec_t *__tfrec;/* current tf_ record */ 
struct dceauxlst_t *__pvc_dcehdr; /* header of current pvc dces */
struct tfrec_t *__tfrec_hdr; /* header of design wide tfrec list */ 
struct tfrec_t *__tfrec_end; /* last el of design wide tfrec list */ 
i_tev_ndx __tehdr_rosynci; /* hdr ndx of slot end ro sync ev lst */ 
i_tev_ndx __teend_rosynci; /* end of slot end ro sync ev lst */ 
int32 __now_resetting; /* reset in progress - for cbs and misctf */  
int32 __rosync_slot;   /* T => processing tf or vpi  ro synch events */
struct loadpli_t *__pli1_dynlib_hd; /* hd of ld pli1 dynamic lb list */
struct loadpli_t *__pli1_dynlib_end; /* and its end */

/* vpi_ work variables */
int32 __last_systf;    /* last vpi_ registered sytfs number */
int32 __num_vpi_force_cbs; /* number of registered vpi force cbs */
int32 __vpi_force_cb_always; /* T => always call back on force */
int32 __num_vpi_rel_cbs; /* number of registered vpi rel cbs */
int32 __vpi_rel_cb_always; /* T => always call back on release */
int32 __allforce_cbs_off; /* T => can't reenter any of all force cbs */
int32 __allrel_cbs_off;/* T => can't reenter any of all release cbs */
char *__wrks1;         /* work string - can not use xs if func */
char *__wrks2;
char __wrk_vpiemsg[IDLEN];/* error msg. work string */
char __wrk_vpiget_str[IDLEN];/* standard required vpi get str string */
char __wrk_vpi_product[256];/* product version */
char __wrk_vpi_errcode[256];/* error codes are Cver err num as str */
double __wrk_vpi_timedbl;/* time double for vpi error rec */
char *__wrkvalbufp;    /* buf for vpi get value value_p contents */ 
int32 __wrkval_buflen; /* and current length */
int32 __vpi_vlog_start_done;/* T => startup done, no systf registering */
struct systftab_t *__systftab; /* table of vpi_ systf records */
int32 __size_systftab; /* current size of systf data rec. table */
struct xstk_t *__cur_sysf_xsp; /* tmp stk_t for vpi sysf ret val */
struct expr_t *__cur_sysf_expr;/* tmp calling expr. for vpi sysf*/
struct st_t *__cur_syst_stp; /* tmp stmt for vpi syst*/
struct dceauxlst_t *__cbvc_dcehdr; /* header of current vc cb dces */
struct rfcblst_t *__rel_allcb_hdr;
struct rfcblst_t *__rel_allcb_end;
struct rfcblst_t *__force_allcb_hdr;
struct rfcblst_t *__force_allcb_end;
i_tev_ndx *__vpicb_tehdri; /* hdr of fixed cb tev list - 1 per class */
i_tev_ndx *__vpicb_teendi; /* end of fixed cb tev list - 1 per class */
int32 __have_vpi_actions;/* some use of __vpi actions */
int32 __have_vpi_gateout_cbs;/* some use of gate out term cbs */
struct h_t *__vpi_hfree_hdr;  /* handle free list hdr */ 
struct hrec_t *__vpi_hrecfree_hdr;  /* handle record free list hdr */ 
struct cbrec_t *__vpi_cbrec_hdr; /* all cbs list header */
int32 __ithtsiz;       /* size of global work ld/drv handle table */
struct h_t *__ithtab;  /* and the work ld/drv handle table */
struct hrec_t *__ithrectab; /* and hrec contents of it */
int32 __ithtsiz2;      /* size of global work ld/drv handle table */
struct h_t *__ithtab2; /* 2nd work for in subtree handles */
struct hrec_t *__ithrectab2; /* and hrec contents of it */
struct vpisystf_t *__vpi_sysf_hdr; /* hdr sys func call src locs */
struct vpisystf_t *__vpi_syst_hdr; /* hdr sys task enable src locs */
int32 __in_vpi_errorcb;/* T => if sim ctrl, suppress error msg error */
int32 __vpierr_cb_active; /* T => at least one cbError reged */
int32 __acc_vpi_erroff;/* acc_ flag to stop internal acc_ error cbs */
int32 __errorcb_suppress_msg; /* T => sim control suppress error msg */
struct h_t *__cur_vpi_inst;
struct hrec_t *__cur_vpi_obj;
struct loadpli_t *__vpi_dynlib_hd; /* hd of ld vpi dynamic lib list */
struct loadpli_t *__vpi_dynlib_end; /* and its end */
struct dcevnt_t *__cbvc_causing_dcep; /* glb for vc cb if it is remed */

/* specify work variables */
struct spfy_t *__cur_spfy;/* current specify block */
struct spcpth_t *__end_spcpths; /* end of specify path st. list */
int32 __path_num;      /* counter for unnamed paths */
struct tchk_t *__end_tchks;/* end of specify time check st. list */
struct net_t *__end_msprms;/* end of specify specparam net list */
struct tchk_t *__cur_tchk;
int32 __tchk_num;      /* counter for unnamed paths */
struct symtab_t *__sav_spsytp;/* save loc. of sym tab in spfy sect. */

/* work compile global variables accessed by routines */
int32 __v1stren;       /* wire/inst. Ver. 1 strength */
int32 __v0stren;       /* wire/inst. Ver. 0 strength */
word32 __pr_iodir;     /* glb. for port ref. expr. I/O direction */
int32 __pr_wid;        /* global for total port ref. expr. width */
int32 __mpref_explicit;/* T => mod def header port ref explicit */
int32 __sym_is_new;    /* set when new symbol added */
struct sy_t **__wrkstab;/* malloced work symbol table area */
int32 __last_sy;       /* last symbol in work area */
int32 __mod_specparams;/* number of declared specparams in mod */
int32 __name_assigned_to;/* glb set if func. def. name assigned to */
struct sy_t *__locfnamsyp; /* place for func. def. chk func. symbol */
int32 __processing_func; /* T => prep or exec of function occuring */
struct st_t **__nbstk; /* func. nest nblock stack (nxt for exec) */
int32 __nbsti;      
struct sy_t *__ca1bit_syp; /* gmsym for 1 bit conta converted gate */
int32 __chking_conta;  /* T => checking a continuous assignment */
int32 __rhs_isgetpat;  /* T => flag for checking stylized getpat */
int32 __lhs_changed;   /* T => assignment changed lhs */
word32 __badind_a;     /* place for a part of in error index value */
word32 __badind_b;     /* and for b part */
int32 __badind_wid;    /* width for bad ind (<32 expr can eval to x) */
int32 __expr_has_real; /* T => know some real in expr. */
int32 __isform_bi_xvi; /* glbl for IS net pin bit index in contab */
int32 __lhsxpr_has_ndel; /* T => component wire of lhs has wire del */
int32 __checking_only; /* T => no error msg, looking for something */ 
int32 __task_has_tskcall;/* T => task calls other task (not name blk) */
int32 __task_has_delay;/* T => task call has del. needs thread */
int32 __func_has_fcall;/* T => func contains has non sys fcall */
int32 __iact_must_sched; /* T => iact stmt(s) have $stop or loop */
int32 __expr_rhs_decl; /* T current expr. is decl. not proc. rhs */ 
int32 __chg_rng_direct;/* T => change rng dir. for implicitly decl */
int32 __has_top_mtm;   /* T => for parameter rhs non () m:t:m */
int32 __nd_0width_catel_remove; /* fx3 file 0 width concat glb */

/* current Verilog module/task/block symbol environment */
struct symtab_t **__venviron;
int32 __top_sti;
struct symtab_t *__modsyms;/* separate symbol table for type names */
struct symtab_t *__pv_defsyms;/* global table for `defines */
struct symtab_t *__syssyms;/* global tab for system tasks and funcs */
struct sy_t **__glbsycmps; /* work global name symbols */
struct expr_t **__glbxcmps;/* work glbal exprs */
int32 __last_gsc;

/* n.l. access headers and tables */
struct mod_t *__modhdr;/* header of top level module list */
struct udp_t *__udphead; /* header udps */
struct udp_t *__udp_last;/* end udp list */
struct inst_t **__top_itab; /* tab of virt inst ptrs of top mods */
int32 *__top_ipind;    /* binary searchable top insts index */
int32 __numtopm;       /* number of uninstanciated top modules */
struct itree_t **__it_roots; /* table of root itree entries */
int32 __ualtrepipnum;  /* udp rep. change threshold */
struct thread_t *__initalw_thrd_hdr; /* list hd of per inst in/al thds */
struct tev_t *__tevtab;/* reallocable tab of events and free evs */
int32 __numused_tevtab;/* num used at least once in tev tab */
int32 __size_tevtab;   /* num tev's allocated in tev tab */ 
word32 *__contab;      /* design wide constant table */
int32 __contabwsiz;    /* currrent size of const tab in words */
int32 __contabwi;      /* next free word32 slot in const tab */
int32 __opempty_contabi; /* special contab ndx for opempty expr leaf */
struct contab_info_t **__contab_hash; /* contab hash information */

/* n.l. access routines */  
struct dfparam_t *__dfphdr; /* design wide defparam list header */
int32 __num_dfps;      /* number of defparams in source */
int32 __num_glbdfps;   /* number of defparams in design */
int32 __num_locdfps;   /* number of local defparams */
int32 __num_inst_pndparams;/* static number of inst. pound params */
int32 __design_gia_pndparams;/* T => at least one gia range pnd params */
int32 __design_gi_arrays;  /* T => design has arrays of g/i */ 
int32 __pndparam_splits; /* T => at least one split from pound params */
int32 __defparam_splits; /* T => at least one split from def params */
int32 __dagmaxdist;    /* max. nested mod. inst. level */
struct mod_t **__mdlevhdr; /* array of ptrs to ith lev linked mods */ 
struct cell_pin_t *__cphdr;   /* header of temp. cell pin list */
struct cell_pin_t *__cpp_last;/* current last cell pin*/
struct tnode_t *__tmp_head;

struct xldlnpp_t *__xldl_hdr; /* other side unproc. xl drv/ld npps */
struct xldlnpp_t *__last_xldl;/* end of list - place to add after */
struct xldlvtx_t **__xldlvtxind; /* table of xl drv/ld net/bit vtx */
int32 __num_xldlvtxs;  /* number of lements in table */
int32 __siz_xldlvtxtab;/* current size of table */

/* udp table building variables */
struct wcard_t *__wcardtab; /* level wildcard table */
int32 __last_wci;      /* last wild card index for line */
word32 *__cur_utab;    /* current udp table */
struct utline_t *__cur_utlp; /* current line info struct */
word32 __cur_uoval;    /* current udp line output value */
int32 __cur_unochange; /* T => cur line has '-' no change output */
struct udp_t *__cur_udp; /* current udp struct */
word32 __cur_upstate;  /* current last input (state) for wide */
int32 __cur_ueipnum;   /* cur. input pos. num of edge (NO_VAL none) */
int32 __cur_utabsel;   /* current edge 1st char - 2nd in state line */

/* expression and function processing variables */
int32 __xndi;          /* next place in collected expression list */
struct expr_t **__exprtab;/* table to collect expressions into */
struct expridtab_t **__expr_idtab; /* expr parse id name info */ 
int32 __exprtabsiz;    /* current operator precedence expr tab siz */
int32 __last_xtk;
struct expr_t *__root_ndp;/* root of built and alloced expression */
struct xstk_t **__xstk;/* expr work vals */
int32 __xspi;          /* expr. pointer */
int32 __maxxnest;      /* current size of expr. stack - must grow */ 
int32 __maxfcnest;     /* size of func. call task stk - must grow */
struct task_t **__fcstk; /* function call nesting stack */
int32 __fcspi;           /* fcall tos index */

/* -y and -v library variables */
struct vylib_t *__vyhdr; /* header of lib. file list */
struct vylib_t *__end_vy;/* last entry on vy lib. list */
int32 __num_ylibs;     /* number of ylibs in options */
int32 __num_vlibs;     /* number of vlibs in options */

struct undef_t *__undefhd;/* head of undefined mod/udp list */   
struct undef_t *__undeftail; /* tail of undefined mod/udp list */
int32 __undef_mods;    /* count of undefined modules */

int32 __lib_rescan;    /* T => rescan from start after each */
int32 __cur_passres;   /* num mods resolved in current pass */
int32 __rescanning_lib;/* T => for `language exclude after 1st pass */ 
int32 __num_ys;        /* number of -y options in lib. */
char **__lbexts;       /* tab of -y library extension suffixes */
int32 __last_lbx;
char **__incdirs;      /* tab of +incdir paths (always / end) */
int32 __last_incdir;

/* simulation preparation variables */
int32 __cur_npii;      /* current index of inst. in cur. mod */
struct gate_t *__cur_npgp;/* current net-pin processing gate */
struct mod_t *__cur_npmdp;/* current net-pin processing module */
struct conta_t *__cur_npcap; /* current net pin proc. conta */
struct tfrec_t *__cur_nptfrp; /* current net pin tf arg drvr rec */
struct net_t *__cur_npnp; /* current net pin net for vpi putv driver */
int32 __cur_npnum;     /* current port number (from 0) */
int32 __cur_pbi;       /* current bit number for PB ICONN npp */
int32 num_optim_cats;  /* number of optimized concats */
int32 num_optim_catels;/* number of all elements in optim concats */
int32 __cur_lhscati1;  /* if lhs concat, high rhs psel index */
int32 __cur_lhscati2;  /* if lhs concat, low rhs psel index */
struct st_t **__prpstk;/* during prep., continue stp */
int32 __prpsti;        /* top of nested stmt. stack */
int32 __nd_parmpnp_free; /* T => after 1st parmnpp need copy not orig */
int32 __num_rem_gate_pnd0s; /* number of removed source #0 gates */
int32 __num_flat_rem_gate_pnd0s; /* and flat number */
int32 __num_rem_mipds; /* number of per bit flat MIPDs 0 delays rmed */
int32 __last_modxi;    /* global counter used by n.l expr xform code */
int32 __last_modsti;   /* and counter for statements */
int32 __optimized_sim; /* generate c code - compile and dl link */
int32 __dump_flowg;    /* dump flow graph for debugging */

/* timing queue scheduling variables */
word64 __whetime;      /* current timing wheel end time */
word64 __simtime;      /* current simulaton time (make 64 bits ?) */
word32 __num_execstmts;/* total number of executed statements */
word32 __num_addedexec;/* number of executed added statements */
word32 __num_proc_tevents;/* total num simulation events processed */
word32 __nxtstmt_freq_update; /* next ev count for xbig freq upd. */ 
word32 __num_cancel_tevents; /* total num sim events processed */
int32 __num_twhevents; /* num of evs currently in timing wheel */
int32 __num_ovflqevents; /* num of events currently in ovflow q */
word32 __inertial_cancels; /* num resched form later inertial del */
word32 __newval_rescheds; /* num rescheduled for same time */
word32 __num_netchges; /* num of processed net change records */
word32 __immed_assigns;/* num immed assign (not scheduled) */ 
word32 __proc_thrd_tevents;/* number of processed thread events */
struct q_hdr_t *__qlist_hdr; /* for $q_ system task q list header */
int32 __num_switch_vtxs_processed; /* total num tranif chan vtx done */
int32 __num_switch_chans; /* total num tranif channels in design */ 

/* storage tables variables */
byte *__btab;          /* design wide scalar (byte) storage table */
int32 __btabbsiz;      /* scalar storage byte table size in bytes */
int32 __btabbi;        /* during var init next index to use */ 
byte *__nchgbtab;      /* table for per inst nchg bytes */
int32 __nchgbtabbsiz;  /* size in btab of nchg action bits */
int32 __nchgbtabbi;    /* during init, next index to use */
word32 *__wtab;        /* design wide var but not mem storage area */
int32 __wtabwsiz;      /* precomputed size (need ptrs into) in words */
int32 __wtabwi;        /* during var init next index to use */ 

/* simulation control and state values */
int32 __stmt_suspend;  /* set when behavioral code suspends */
int32 __run_state;     /* state of current simulation run */
int32 __can_exec;      /* T => for vpi sim ctrl - can now exec */
int32 __wire_init;     /* T => initializing wires */
int32 __no_tmove_levels; /* T => infinite 0 delay loop warn path dist */
struct thread_t *__cur_thd;  /* currently executing thread addr. */
struct thread_t *__suspended_thd; /* cur thread before suspend */
struct itree_t *__suspended_itp; /* cur inst ptr before suspend */
struct itree_t *__inst_ptr; /* current if flattened itree place */ 
struct mod_t *__inst_mod;   /* module of current itree inst */
int32 __inum;          /* iti num  of current inst (always set) */
struct itree_t **__itstk; /* stack of saved itrees */
int32 __itspi;         /* top of itree stack */
i_tev_ndx __fsusp_tevpi;/* in func. step, event to undo(cancel) */
struct itree_t *__tmpitp_freelst; /* free list of wrk itps */
struct inst_t *__tmpip_freelst; /* free list of wrk ips */
struct mod_t *__last_libmdp; /* libary module just read */
int32 __seed;          /* SJM 01/27/04 - glb seed needed if no arg */

/* execution state variables */
word32 __new_gateval;  /* new gate out val (st. possible) */
word32 __old_gateval;  /* before gate change (st. possible) */
word32 __new_inputval; /* new input value for tracing message */
word32 __old_inputval; /* prev. value of input for wide udp eval */
word64 __pdlatechgtim; /* for path tracing latest path chg time */
word64 __pdmindel;     /* for path minimum path delay */
int32 __nd_neg_del_warn; /* T => must emit warn (or err) for <0 del */ 
int32 __force_active;  /* T => for trace deassign while force */ 
int32 __assign_active; /* T => for trace release activates assgn */
struct dceauxlst_t *__qcaf_dcehdr; /* header of current qcaf dces */
int32 __nxt_chan_id;   /* cnter and size for assigning chan ids */
int32 __chanallocsize; /* size of allocated chan tables */
struct chanrec_t *__chantab;/* tab of channel records (one per id) */
struct vtxlst_t *__stvtxtab[8]; /* per stren value vertex list */ 
struct vtxlst_t *__stvtxtabend[8]; /* and ptr to last el on each */
struct vtxlst_t *__chg_vtxlst_hdr; /* list of chged vertices to store */
struct vtxlst_t *__chg_vtxlst_end; /* and ptr to end */
struct vtxlst_t *__off_vtxlst_hdr; /* bid chan vtx list for marks off */
struct vtxlst_t *__off_vtxlst_end; /* and ptr to end */
struct vtxlst_t *__vtxlst_freelst; /* free list for vtx lists */
struct vtx_t *__vtx_freelst;  /* free list for re-using vtxs */   
struct edge_t *__edge_freelst; /* free list for re-using edges */

word32 __acum_sb;      /* accumulator for stren tran chan combined */
word32 __acum_a;       /* accumulator for tran chan non stren */
word32 __acum_b;
byte *__acum_sbp;      /* ptr to stacked strength byte */
struct xstk_t *__acum_xsp; /* ptr to stacked strength byte */

/* end of time slot variables, strobe, monitor, time check */
struct strblst_t *__strobe_hdr; /* list strobe display at slot end */
struct strblst_t *__strobe_end; /* end of strobe display list */
struct strblst_t *__strb_freelst; /* head of free strobe elements */
struct st_t *__monit_stp;/* monit if chg display at slot end stmt */
struct itree_t *__monit_itp; /* current monitor itree element */
word32 __slotend_action; /* word32 of 1 bit switches set for action */
int32 __monit_active;  /* T => monitor can trigger (default) */
struct dceauxlst_t *__monit_dcehdr; /* header of current dces */
struct fmonlst_t *__fmon_hdr; /* list of execed (enabled) fmonitors */
struct fmonlst_t *__fmon_end;
struct fmonlst_t *__cur_fmon; /* current fmon list entry */
struct fmselst_t *__fmonse_hdr; /* this slot end fmon eval list */
struct fmselst_t *__fmonse_end;
struct fmselst_t *__fmse_freelst; /* fmon slot end free list head */

/* interactive execution variables */
struct itree_t *__scope_ptr; /* from $scope itree place */
struct task_t *__scope_tskp; /* from $scope task if present */ 
struct symtab_t *__last_iasytp; /* last found symbol symbol table */
struct iahist_t *__iahtab;/* table of history commands */
int32 __iahsiz;        /* current size of history cmd table */
int32 __iah_lasti;     /* current (latest) command */
struct hctrl_t *__hctrl_hd; /* head of active iact stmts */
struct hctrl_t *__hctrl_end;/* and end */
int32 __history_on;    /* collecting and saving history is on */
int32 __hist_cur_listnum;/* number to list for :history command */
int32 __iasetup;       /* F until interactive entered */
int32 __ia_entered;    /* F (also for reset) until iact entered */
int32 __iact_state;    /* T => in interactive processing */
int32 __iact_can_free; /* T => non monitor/strobe, can free */
int32 __no_iact;       /* T => no interactive processing for run */
int32 __intsig_prt_snapshot; /* T => on no iact end, print shapshot */
int32 __reset_count;   /* count of the number of rests ($reset) */
int32 __reset_value;   /* 2nd $reset value preserved after reset */ 
int32 __list_cur_ifi;  /* index in in fils of current source file */
int32 __list_cur_fd;   /* current opened file no. (-1 if none) */
int32 __list_cur_lini; /* current line no. in current dbg file */
int32 __list_cur_listnum;/* number of lines to list at once */
int32 __list_arg_lini; /* for :b (:ib), user list argument */
int32 __iact_scope_chg;/* T => always move scope to cur on iact st. */
struct brkpt_t *__bphdr;/* header of breakpoint list */ 
int32 __nxt_bpnum;     /* next breakpoint number to use */
struct dispx_t *__dispxhdr;/* header of display list */ 
int32 __nxt_dispxnum;  /* next display number to use */
struct itree_t *__last_stepitp;/* last step inst. itree loc. */ 
struct task_t *__last_steptskp;/* last step task */
int32 __last_stepifi;  /* last step in fils index */
word64 __last_brktime; /* last break or step time */
int32 __dbg_dflt_base; /* :print debugger default base */ 
int32 __iact_stmt_err; /* T => syntax error for iact stmt */
struct mod_t *__iact_mdp; /* current iact dummy module */
int32 __sav_mtime_units; /* prep of iact statements needs tfmt units */

/* interactive variables */
char *__iahwrkline;    /* interactive command line work area */
int32 __iahwrklen;     /* allocated len of iah work string */
int32 __pending_enter_iact;/* T => enter iact as soon as can */
int32 __iact_reason;   /* reason for entering interactive state */
int32 __single_step;   /* T => need to single step */
int32 __step_rep_cnt;  /* number of times to repeat step */
int32 __step_from_thread;/* T step from non thread loc. (^c?) */
struct itree_t *__step_match_itp; /* for istep, exec itp must match */
int32 __step_lini;     /* line stepping from (must step to next) */  
int32 __step_ifi;      /* and file */ 
int32 __verbose_step;  /* T => emit location each step */
int32 __stop_before_sim; /* T => enter interactive before sim */
int32 __dbg_stop_before; /* if >100, T (-100) stop before sim */ 
struct st_t *__blklast_stp; /* stmt loc. saved last stmt in block */
struct dceauxlst_t *__iact_dcehdr; /* header of current iact dces */

/* event list variables */
struct telhdr_t **__twheel;
int32 __twhsize;       /* current size for timing wheel */   
int32 __cur_twi;
i_tev_ndx __p0_te_hdri;/* pound 0 event list header */
i_tev_ndx __p0_te_endi;/* pound 0 event list end */
i_tev_ndx __cur_te_hdri;
i_tev_ndx __cur_tevpi; /* ptr to event list for adding to front */
i_tev_ndx __cur_te_endi;
i_tev_ndx __tefreelsti;/* free list for events */
struct tedputp_t *__tedpfreelst; /* tf_ putp rec free list header */
struct teputv_t *__teputvfreelst; /* vpi_ put value free list hdr */ 
struct nchglst_t *__nchgfreelst; /* change element free list */
struct tc_pendlst_t *__tcpendfreelst; /* free slot end changed tchks */
struct dltevlst_t *__dltevfreelst; /* pend double event free list */
struct tevlst_t *__ltevfreelst; /* pend event free list */
i_tev_ndx __nb_te_hdri; /* non-blocking new end queue hd */ 
i_tev_ndx __nb_te_endi; /* and tail */

/* net change list variables */
struct nchglst_t *__nchg_futhdr; /* header of future net chg list */
struct nchglst_t *__nchg_futend; /* end (for add) of future net chgs */
struct tc_pendlst_t *__tcpendlst_hdr; /* header of pending */ 
struct tc_pendlst_t *__tcpendlst_end; /* end of pending */
i_tev_ndx *__wrkevtab; /* for exit, trace of pending events */
int32 __last_wevti;    /* last filled */
int32 __size_wrkevtab; /* and current allocated size */ 

/* b tree variables */
struct bt_t *__btqroot;/* root of timing overflow q */
/* for fringe node, node previous to place where inserted */
/* storage for path to fringe - node passed thru if not fringe */
struct bt_t **__btndstk; /* nodes with node list length */
struct bt_t **__btndhdrstk;
int32 __topi;
int32 __max_level;
int32 __nd_level;


static void open_logfile(void);
static void init_glbs(void);
static void set_tfmt_dflts(void);
static void init_ds(void);
static void init_cfg(void);
static void xpnd_args(int32, char **);
static struct optlst_t *alloc_optlst(void);
static void copy_xpnd_onelev_args(void);
static void ins_optlst_marker(int32, int32);
static void dmp_xpnd_olist(register struct optlst_t *);
static int32 find_opt(char *);
static void do_args(void);
static void bld_inflist(void);
static void do_sdflocdef(char *, char *, int32);
static void do_cmdmacdef(char *, struct optlst_t *);
static int32 bld_incdtab(char *, struct optlst_t *);
static struct loadpli_t *bld_loadpli_lbs(char *, struct optlst_t *, int32);
static int32 bld_boot_rout_list(struct loadpli_t *, char *);
static int32 check_rnam_str(char *);
static int32 bld_lbxtab(char *, struct optlst_t *);
static void add_lbfil(char *, char);
static struct vylib_t *alloc_vylib(char *);
static int32 add_suppwarn(char *, struct optlst_t *);
static void wrhelp(void);
static void init_modsymtab(void);
static void init_stsymtab(void);
static void add_systsksym(struct systsk_t *);
static void add_sysfuncsym(struct sysfunc_t *);
static void prep_vflist(void);
static void do_timescale(void);
static int32 prt_summary(void);
static void prt_deswide_stats(void);
static int32 count_tran_nets(void);
static void mem_use_msg(int32);
static void prt_alldesmod_tabs(void);
static void prt2_desmod_tab(void);
static void bld_modnam(char *, struct mod_t *, int32);
static void count_mods(int32 *, int32 *);
static int32 count_cells(struct mod_t *);
static int32 count_gates(struct mod_t *, int32 *);
static void prt2_permod_wiretab(void);
static int32 cnt_modprt_bits(struct mod_t *);
static void cnt_modwires(struct mod_t *, int32 *, int32 *, int32 *, int32 *, int32 *,
 int32 *, int32 *);
static void st_prt2_permod_wiretab(void);
static void st_cnt_modprt_bits(struct mod_t *, int32 *, int32 *, int32 *);
static void st_cnt_modwires(struct mod_t *, int32 *, int32 *, int32 *, int32 *);
static void prt2_permod_tasktabs(void);
static void cnt_modtasks(struct mod_t *, int32 *, int32 *, int32 *, int32 *, int32 *,
 int32 *);
static void prt_modhdr(struct mod_t *);
static void reset_cntabs(int32 *, int32 *, int32 *, int32 *, int32 *, int32, int32 *,
 int32 *, int32 *, int32);
static void accum_usecnts(struct mod_t *, int32 *, int32 *, int32 *, int32 *, int32 *,
 int32 *, int32 *, int32 *, int32 *);



/* extern prototypes (maybe defined in this module) */
extern int32 __dig_main(int32, char **);
extern void __setup_dbmalloc(void);
extern void __start_chkchain(void);
extern void __my_ftime(time_t *, time_t *);
extern void __prt_end_msg(void);
extern void __add_infil(char *);
extern void __grow_infils(int32);
extern int32 __open_sfil(void);
extern void __push_vinfil(void);
extern int32 __pop_vifstk(void);
extern void __do_decompile(void);
extern void __process_cdir(void);
extern char *__get_tmult(char *, word32 *);
extern void __prt2_mod_typetab(int32);
extern int32 __enum_is_suppressable(int32);

/* extern prototypes defined in other module */
extern void __xform_nl_to_modtabs(void);
extern void __initialize_dsgn_dces(void);
extern int32 __comp_sigint_handler(void);
extern char *__my_malloc(int32);
extern char *__my_realloc(char *, int32 , int32);
/* pv stralloc is fast small section string alloc but can't be freed */ 
extern char *__pv_stralloc(char *);
extern struct symtab_t *__alloc_symtab(int32);
extern char *__prt_vtok(void);
extern char *__to_wtnam2(char *, word32);
extern int32 __fr_wtnam(int32);
extern int32 __get_arrwide(struct net_t *);
extern struct tnode_t *__vtfind(char *, struct symtab_t *);
extern void __do_foreign_lang(void);
extern void __init_acc(void);
extern void __my_dv_flush(void);
extern void __push_wrkitstk(struct mod_t *, int32);
extern void __pop_wrkitstk(void);
extern void __setup_contab(void);
extern void __my_exit(int32, int32);


extern char *__to_timunitnam(char *, word32);
extern FILE *__tilde_fopen(char *, char *);
extern char *__bld_lineloc(char *, word32, int32);
extern char *__schop(char *, char *);
extern void __my_fprintf(FILE *, char *, ...);
extern void __cv_msg(char *s, ...);
extern void __dbg_msg(char *, ...);
extern void __crit_msg(char *s, ...);
extern void __ip_msg(char *s, ...);
extern void __ip2_msg(char *s, ...);
extern void __pv_ferr(int32, char *, ...);
extern void __pv_err(int32, char *, ...);
extern void __pv_warn(int32, char *, ...);
extern void __gfwarn(int32, word32, int32, char *, ...);
extern void __pv_fwarn(int32, char *, ...);
extern void __gfinform(int32, word32, int32, char *, ...);
extern void __gferr(int32, word32, int32, char *, ...);
extern void __finform(int32, char *, ...);
extern void __fterr(int32, char *, ...);
extern void __pv_terr(int32, char *, ...);
extern void __arg_terr(char *, int32);
extern void __case_terr(char *, int32);
extern void __misc_terr(char *, int32);
extern int32 __fixup_nl(void);
extern void __prep_sim(void);
extern void __unget_vtok(void);
extern void __call_all_checktfs(void);
extern int32 __get1_vtok(FILE *);
extern void __skipover_line(void);
extern int32 __chk_beg_line(int32);
extern void __collect_line(void);
extern void __process_sdf_files(void);
extern void __exec_all_compiletf_routines(void);
extern void __vpi_endcomp_trycall(void);
extern void __free_design_pnps(void);
extern void __rem_0path_dels(void);
extern void __init_sim(void);
extern void __call_misctfs_streset(void);
extern void __vpi_startreset_trycall(void);
extern void __reset_to_time0(void);
extern void __pv_sim(void);
extern void __vpi_endsim_trycall(void);
extern void __alloc_xsval(struct xstk_t *, int32);
extern void __my_fclose(FILE *);
extern void __my_free(char *, int32);
extern void __maybe_open_trfile(void);
extern int32 __get_cmdtok(FILE *);
extern void __do_macdefine(char *, char *);
extern void __add_sym(char *, struct tnode_t *);
extern void __setup_veriusertf_systfs(void);
extern void __call_vlog_startup_procs(void);
extern void __dmp_mod(FILE *, struct mod_t *);
extern void __dmp_udp(FILE *, struct udp_t *);
extern void __get_vtok(void);
extern void __rd_ver_src(void);
extern void __rd_ver_mod(void);
extern int32 __bqline_emptytail(register char *);
extern void __process_pli_dynamic_libs(struct loadpli_t *);
extern int32 __rd_cfg(void);
extern void __expand_lib_wildcards(void); 
extern void __rd_ver_cfg_src(void);
extern void __sym_addprims(void);



/* externs for system error messages */
extern int32 errno;

/* special external for setjmp environment - reset environment */ 
extern jmp_buf __reset_jmpbuf;
extern char __pv_ctab[];



/*
 * main
 */
extern int32 __dig_main(int32 argc, char **argv)
{
 int32 rv, save_quiet;
 long t1;
 double timd1;
 char s1[RECLEN];

 /* only does something if db malloc define set */ 
 __setup_dbmalloc();


 __start_sp = __end_sp = NULL;
 __log_s = NULL;
 /* set compilation int32 signal and save entry signal so can restore */
#if defined(INTSIGS)
 __old_int_sig = (sighandler *) signal(SIGINT, __comp_sigint_handler);
#else
 __old_int_sig = (sighandler *) signal(SIGINT,
   (void (*)()) __comp_sigint_handler);
#endif

 init_glbs();


 /* vpi argument special format argv only set if needed */
 __vpi_argc = 0;
 __vpi_argv = NULL;
 /* no by convention argv 0 always has program name */
 __vpi_argv0 = __pv_stralloc(argv[0]);

 /* expand options so have list that looks as if all on command line */
 xpnd_args(argc, argv);

 /* process special early options - any errors here only to std out */
 /* notice no verbose message for quiet */
 if (__quiet_olp != NULL)
  {
   __quiet_msgs = TRUE;
   /* vendor1 runs with -q need to allow verbose switches to be turned on */ 
   __verbose = FALSE;
  }
 open_logfile();

#ifdef __linux__
#ifdef __ELF__
 __platform = __pv_stralloc("Linux-elf");
#else
 __platform = __pv_stralloc("Linux-aout");
#endif
#endif

#ifdef __CYGWIN32__
 __platform = __pv_stralloc("Cygwin32");
#endif

#ifdef __MINGW32__
 __platform = __pv_stralloc("Mingw32");
#endif


#ifdef __FreeBSD__
 __platform = __pv_stralloc("X86 FreeBSD");
#endif

#ifdef __APPLE__
 __platform = __pv_stralloc("Mac OSX");
#endif

#ifdef __sparc
 __platform = __pv_stralloc("Sparc-Solaris");
#endif
#if defined(__i386__) && defined(__SVR4)
 __platform = __pv_stralloc("X86-Solaris");
#endif

#ifdef __hpux
 __platform = __pv_stralloc("hpux");
#endif

#ifdef __CYGWIN32__
 __platform = __pv_stralloc("Cygwin32");
#endif

 __vers = __pv_stralloc(VERS);
 __vers2 = __pv_stralloc(VERS2);
 __ofdt = __pv_stralloc(OFDT);
 __ip2_msg("%s%s of %s (%s).\n", __vers, __vers2, __ofdt, __platform);

 /* SJM 08/27/03 - change so have separate commercial and open source msgs */ 
 __ip2_msg("Copyright (c) 1991-2007 Pragmatic C Software Corp.\n");
 __ip2_msg(
  "  All Rights reserved.  Licensed under the GNU General Public License (GPL).\n");
 __ip2_msg(
  "  See the 'COPYING' file for details.  NO WARRANTY provided.\n");

 __cv_msg("Today is %s.\n", __pvdate);

 if (__help_olp != NULL)
  {
   wrhelp();
   __cv_msg("**Special help mode successfully completed.\n");
   return(0);
  }

 if (__verb_olp != NULL)
  {
   if (!__quiet_msgs)
    { __verbose = TRUE; __cv_msg("  Verbose mode is on.\n"); }
  }
 if (__log_s != NULL && strcmp(__log_fnam, DFLT_LOGFNAM) != 0)
  {
   if (__verbose)
    __cv_msg("  Output log will be written to \"%s\".\n", __log_fnam);
  }
 if (__verbose) __cv_msg("  Invoked by: \"%s\".\n", argv[0]);  

 do_args();


 bld_inflist();

 __modhdr = __end_mdp = NULL;
 __init_acc();

 init_modsymtab();
 /* must initialize pli table after file processed */
 init_stsymtab();
 /* --- DBG remove
 if (__verbose) 
  __cv_msg("  Initialization used %ld bytes of allocated memory (%ld free).\n",
  __memstr_use + __mem_use + TWHINITSIZE*sizeof(struct telhdr_t),
  __mem_free);
 --- */


 /* SJM 12/05/03 - for now assuming if +config options to specify lib map */ 
 /* file, then do not read default lib.map in cwd - is that correct? */ 
 if (__map_files_hd == NULL)
  {
   FILE *fp;

   if ((fp = __tilde_fopen("lib.map", "r")) != NULL)
    {
     __my_fclose(fp); 
     __map_files_hd = __map_files_tail = (struct mapfiles_t *) 
      __my_malloc(sizeof(struct mapfiles_t));
     __map_files_hd->mapfnam = __pv_stralloc("lib.map");
     __map_files_hd->mapfnxt = NULL;
     if (__verbose)
      {
       __cv_msg(
        "  Using map.lib config file because no +config options specified.\n");
      }
    }
   else if (__verbose)
    {
     __cv_msg(
      "  P1364 2001 config map library not specified - using -y/-v libraries.\n"); 
    }
  }

 /* read the cfg lib.map file list and build internal d.s. */ 
 if (__verbose) __cv_msg("  Begin Translation:\n");

 if (__map_files_hd != NULL)
  {
   /* SJM - 05/26/04 if config used, ignore any command line .v files */
   if (__last_inf != __last_optf)
    {
     __pv_warn(3138,
      "config used but verilog files specified on command line - files ignored");
    }
   if (__verbose) __cv_msg("  Reading config map.lib files:\n");
   __rd_cfg();
   if (__cmdl_library == NULL) __cmdl_library = __pv_stralloc("work");
   /* after expansion, each library element is a concrete file name */
   __expand_lib_wildcards(); 
   __rd_ver_cfg_src();
  }
  else
   {
    /* use pre-2001 files reading routines */
    prep_vflist();
    __rd_ver_src();
   }

 if (__parse_only)
  {
   __cv_msg("  Parsing only run complete.\n");
   __my_ftime(&__end_time, &__end_mstime);
   if (__pv_err_cnt != 0) rv = 1; else rv = 0;
   goto done2;
  }

 if (__in_ifdef_level != 0)
  {
   __pv_err(924, "last `ifdef unterminated in source stream");
  }
 if (__end_mdp == NULL)
  {
   if (__pv_err_cnt != 0) goto err_done;
   __crit_msg("**Design contains no modules - nothing to do.\n");
   goto set_etime;
  }

 /* calls to fixup routines here */
 if (__verbose)
  {
   __cv_msg("  Begin pass 2:\n");
  }
 /* if verbose off will not print anything */
 mem_use_msg(FALSE); 
 if (!__fixup_nl()) goto err_done;

 if (__pv_err_cnt != 0) goto err_done; 
 if (__decompile) __do_decompile();
 __my_ftime(&__end_comp_time, &__end_comp_mstime);
 if (__numtopm == 0)
  {
   __crit_msg("  Unable to begin simulation - no top level modules.\n");   
set_etime:
   __my_ftime(&__end_time, &__end_mstime);
   rv = 1;
   goto done2;
  }
 
 /* notice compilation must include prep. for at least udp checking */
 __prep_sim();

 if (__pv_err_cnt == 0)
  {
   if (__prt_stats || __prt_allstats)
    {
     save_quiet = __quiet_msgs;
     __quiet_msgs = FALSE;
     prt_alldesmod_tabs();
     __quiet_msgs = save_quiet;
    }
   else if (__verbose)
    {
     save_quiet = __quiet_msgs;
     __quiet_msgs = FALSE;
     prt_deswide_stats();
     __quiet_msgs = save_quiet;
    }
  }
 /* RELEASE remove -- */
 /* LOOKATME - for now need this even when read source only mode */
 if (__verbose)
  {
   __cv_msg(
    "  Variable storage in bytes: %d for scalars, %d for non scalars.\n", 
    (__btabbsiz + __nchgbtabbsiz), 4*__wtabwsiz);
  }

 if (__compile_only)
  {
   __cv_msg("  Translation only run complete.\n");
   __my_ftime(&__end_time, &__end_mstime);
   goto done;
  }
 if (__pv_err_cnt != 0) goto err_done;

 if (__verbose) __cv_msg("  Begin load/optimize:\n");
 mem_use_msg(FALSE);

 __run_state = SS_LOAD;
 __can_exec = FALSE;

 /* now that all storage allocated and given some val, call checktf */
 /* routines, these can call anything not sim queue depended but shouldn't */
 if (__tfrec_hdr != NULL)
  {
   __run_state = SS_RESET;
   __call_all_checktfs();
   __run_state = SS_LOAD;
  }

 /* notice advantage of option is allows use in initialization */
 /* assumes called from first top level module */ 
 if (__sdflst != NULL)
  {
   __process_sdf_files();
   if (__pv_err_cnt != 0) goto err_done;
  }
 __sfnam_ind = 0;
 __slin_cnt = 0;
 /* final step in loading is calling vpi_ systf checktf routines */ 
 /* can not do until here because d.s. built */ 
 if (__vpi_sysf_hdr != NULL || __vpi_syst_hdr != NULL)
  {
   /* compiletf run in reset state because no time and no events */
   __run_state = SS_RESET;
   __exec_all_compiletf_routines();
   __run_state = SS_LOAD;
  }

 /* still can use changed params (either type) to elaborate delays */
 /* from params and set delays even where no delay in source here */
 /* BEWARE - must not move to after new compile prep xform because exprs */
 /*          exprs not moved (if move later must add link and chg expr ptr */
 if (__have_vpi_actions) __vpi_endcomp_trycall();


 if (__pv_err_cnt != 0) goto err_done;

 /* SJM 01/14/00 - always can free design pnps since (LABEL does not work */
 /*                (error emitted) in $sdf_annotate systask calls */
 /* SJM for sdf do not free - see if works  
 __free_design_pnps();
 -- */

 /* after here, delays elaborated - only vpi change of delays now possible */
 /* but vpi_ change probably not alloed under P1364 */
 /* SJM 01/14/00 - must allow param changes from label during sim */
 /*                for sdf annotate calls - undefined change points */ 
 /*                also can't remove all 0 paths delays may change still */ 
 if (!__has_sdfann_calls)
  {
   /* go through disable all 0 delay only paths - never causes error */
   if (__rm_path_pnd0s) __rem_0path_dels();
  }

 /* but can remove gates and any added all 0 mipds (maybe added again if */
 /* annotate systask used later) so need messages here */ 
 if (__num_rem_gate_pnd0s != 0 && __verbose)
  {
   __cv_msg(
    "  %d (%d flat) gate or udp zero delays coded in source removed.\n",
    __num_rem_gate_pnd0s, __num_flat_rem_gate_pnd0s);
  }
 if (__num_rem_mipds != 0 && __verbose)
  {
   __cv_msg("  %d flattened bits of 0 delay MIPDS removed - no effect.\n",
    __num_rem_mipds);
  }
 /* always do transformations to group elements into per module tables */
 __xform_nl_to_modtabs();

 /* SJM 05/04/05 - now can only initialize dce previous values */
 __initialize_dsgn_dces();

 __init_sim();
 __my_ftime(&__end_prep_time, &__end_prep_mstime);

 if (__verbose) __cv_msg("  Begin simulation:\n");
 mem_use_msg(TRUE);
 if (__verbose) __cv_msg("\n");

 /* on setup returns 0, on lng jmp returns 1, but always just exec sim */
 /* since restart */
 /* on set returns 0, do not run re-init code */
 if (setjmp(__reset_jmpbuf) != 0)
  {
   if (__tfrec_hdr != NULL) __call_misctfs_streset();
   if (__have_vpi_actions) __vpi_startreset_trycall();
   __now_resetting = TRUE;
   __run_state = SS_RESET;
   /* change to sim run state in here */
   __reset_to_time0();
   /* by here state back to SIM */
  }


 __pv_sim();
 /* LOOKATME - think also call end sim cb here but LRM says $finish */
 if (__have_vpi_actions) __vpi_endsim_trycall();

 /* LOOKATME - remove since does not match ovi __cv_msg("\n"); */
 /* notice must know current end time */
 __my_ftime(&__end_time, &__end_mstime);
 __prt_end_msg();
 goto done;

err_done:
 __cv_msg("  Unable to begin simulation.\n");
 __my_ftime(&__end_time, &__end_mstime);

done:
 if (__dv_fd != -1) __my_dv_flush();
 if (__verbose)
  {
   if (__dv_fd != -1)
    {
     if ((t1 = lseek(__dv_fd, 0, SEEK_END)) != -1) 
      {
       __cv_msg("  $dumpvars %ld bytes written to file \"%s\".\n", t1,
        __dv_fnam); 
      }
    } 
   mem_use_msg(FALSE);
  }
 rv = prt_summary();
done2:
 /* DBG remove --- */
 if (__xspi != -1 || __itspi != -1 || __fcspi != -1)
  __misc_terr(__FILE__, __LINE__);
 /* --- */
 strcpy(s1, ctime(&__end_time));

 s1[24] = '\0';
 __pvdate = __pv_stralloc(s1);
 timd1 = (double) (__end_time - __start_time)
  + ((double) (__end_mstime - __start_mstime))/1000.0;
 __cv_msg("End of %s%s at %s (elapsed %.1lf seconds).\n",
  __vers,__vers2, __pvdate, timd1);
 __my_exit(rv, FALSE);
 /* needed to stop warns but exit prevents control from reaching here */
 return(0);
}

#ifdef __DBMALLOC__
/*
 * start malloc debugging - can call from anywhere
 */
extern void __setup_dbmalloc(void)
{
 union dbmalloptarg m;

 /* m.i = M_HANDLE_IGNORE; */
 m.i = M_HANDLE_ABORT;
 dbmallopt(MALLOC_WARN,&m);
 m.str = "malloc.log";
 dbmallopt(MALLOC_ERRFILE,&m);

 /* set to 1 to turn on */
 /* --- */
 m.i = 1;
 dbmallopt(MALLOC_CKCHAIN,&m);
 /* -- */

 /* 0 means don't check str/mem func args */
 /* --- */
 m.i = 1;
 dbmallopt(MALLOC_CKDATA,&m);
 /* --- */
 /* --- */
 m.i = 0;
 dbmallopt(MALLOC_REUSE,&m);
 /* --- */
 /* -- */
 m.i = 2;
 /* m.i = 3; */
 dbmallopt(MALLOC_FILLAREA, &m);
 /* -- */
}

extern void __start_chkchain(void)
{
 union dbmalloptarg m;

 m.i = 1;
 dbmallopt(MALLOC_CKCHAIN,&m);
 /* -- */
 m.i = 1;
 dbmallopt(MALLOC_CKDATA,&m);
 /* -- */
}
#else
/* nil if db malloc not used */
extern void __setup_dbmalloc(void)
{ 
}
extern void __start_chkchain(void)
{
}
#endif

/*
 * routine to compute current time in seconds and milliseconds (if possible)
 */
extern void __my_ftime(time_t *secs, time_t *msecs)
{

#ifdef __MINGW32__    
 *secs = 0;
 *secs = time(secs);
 *msecs = 0;
#else
 struct timeval tv;
 struct timezone tz; 

 if (gettimeofday(&tv, &tz) == EINVAL) __arg_terr(__FILE__, __LINE__); 
 *secs = (long) tv.tv_sec;
 *msecs = (long) (tv.tv_usec/1000);
#endif
}

/*
 * print ending verbose message 
 */
extern void __prt_end_msg()
{
 int32 t1;
 double timd1, timd2, timd3;

 t1 = (int32) __num_proc_tevents - (int32) __proc_thrd_tevents;
 if (t1 < 0) t1 = 0;
 __cv_msg(
  "%d simulation events and %u declarative immediate assigns processed.\n",
   t1 , __immed_assigns);
 /* number of cancelled should equal newval (0 del.) and inertial cancels? */ 
 if (__num_execstmts - __num_addedexec > 0)
  {
     __cv_msg("%u behavioral statements executed (%u procedural suspends).\n",
      __num_execstmts - __num_addedexec, __proc_thrd_tevents);
  }
 else
  {
   if (__proc_thrd_tevents > 0 && __optimized_sim)
    {
     __cv_msg("Optimized code execution (%u procedural suspends).\n",
      __proc_thrd_tevents);
    }
  }
 if (__verbose && __debug_flg)
  {
   __cv_msg(
    "  %u(%u) inertial reschedules, %u net changes, %u continuous assigns,\n",
    __num_cancel_tevents, __inertial_cancels + __newval_rescheds,
    __num_netchges, __immed_assigns);
   __cv_msg("  and %d tran/tranif switch vertices processed.\n",
    __num_switch_vtxs_processed);
  }

 timd1 = (double) (__end_comp_time - __start_time)
  + ((double) (__end_comp_mstime - __start_mstime))/1000.0;
 timd2 = (double) (__end_prep_time - __end_comp_time)
  + ((double) (__end_prep_mstime - __end_comp_mstime + 50))/1000.0;
 timd3 = (double) (__end_time - __end_prep_time)
  + ((double) (__end_mstime - __end_prep_mstime + 50))/1000.0;
 __cv_msg(
  "  Times (in sec.):  Translate %.1f, load/optimize %.1f, simulation %.1f.\n",
  timd1, timd2, timd3);
}

/*
 * STARTUP INITIALIZATION ROUTINES
 */

/*
 * initialize various globals (including flags)
 *
 * sets things that are set and then returned to initial value when done
 * but routine that uses variable
 */
static void init_glbs(void)
{
 char *cp;
 char s1[RECLEN];

 /* initialize things needed before any memory can be allocated */
 __mem_use = __mem_freed = __mem_allocated = __memstr_use = 0L;
 __mem_udpuse = __arrvmem_use = 0L;

 /* initialize some vars */
 __pv_err_cnt = __pv_warn_cnt = __inform_cnt = 0;
 __max_errors = MAX_ERRORS;

 /* initialize flags */
 __verbose = FALSE;
 __quiet_msgs = FALSE;
 __lib_verbose = FALSE;
 __cfg_verbose = FALSE;
 __lib_rescan = FALSE;
 __rescanning_lib = FALSE;
 __switch_verbose = FALSE;
 __chg_portdir = FALSE;
 __cmd_s = NULL;
 __cmd_fnam = NULL;
 __cmd_start_fnam = NULL;
 __key_s = __save_key_s = NULL;
 /* default for trace output if stdout */
 __tr_s = stdout; 
 __tr_fnam = __pv_stralloc("stdout");
 __sdflst = NULL;
 __sdf_s = NULL;
 __sdf_mdp = NULL;
 __sdf_verbose = FALSE; 
 __sdf_opt_log_fnam = NULL;
 __sdf_opt_log_s = NULL;
 __has_sdfann_calls = FALSE;

 __map_files_hd = __map_files_tail = NULL;
 __cmdl_library = NULL;
 __cfglib_hd = __cfglib_tail = NULL;
 __cfg_hd = NULL;
 __cur_cfg = NULL;
 __cfg_mdp = NULL;
 __bind_inam_comptab = NULL;
 __siz_bind_comps = 0;
 __last_bind_comp_ndx = -1;

 __sdf_active = FALSE;
 __sdf_no_warns = FALSE;
 __sdf_no_errs = FALSE;
 __sdf_from_cmdarg = FALSE;
 __nokey_seen = FALSE;
 __key_fnam = NULL;
 /* notice warns on by default */
 /* should be more selective about which warnings turned off */
 __no_warns = FALSE;
 __no_errs = FALSE;
 __outlinpos = 0;
 /* notice informs off by default */
 __no_informs = TRUE;
 __compile_only = FALSE;
 __parse_only = FALSE;
 __optimized_sim = FALSE;
 __dump_flowg = FALSE;
 __opt_debug_flg = FALSE;
 __iact_state = FALSE;
 __no_iact = FALSE;
 __intsig_prt_snapshot = FALSE;
 __pending_enter_iact = FALSE;
 __stop_before_sim = FALSE;
 /* this is for :reset so off (< 100) on start */
 __dbg_stop_before = 0;
 __decompile = FALSE;
 __debug_flg = FALSE;
 __mintypmax_sel = DEL_TYP;
 __sdf_mintypmax_sel = __mintypmax_sel;
 __chking_conta = FALSE;
 __rhs_isgetpat = FALSE;
 __expr_rhs_decl = FALSE;
 __chg_rng_direct = FALSE;
 __has_top_mtm = FALSE;
 __nd_0width_catel_remove = FALSE;
 __next_dvnum = 0;
 __dv_allform_insrc = FALSE;
 __st_tracing = FALSE;
 __ev_tracing = FALSE;
 __pth_tracing = FALSE;
 /* SJM 07/13/01 - add option and get code to support src-dst MIPDs working */
 __use_impthdels = FALSE;
 __gateeater_on = FALSE;
 __prt_stats = FALSE;
 __prt_allstats = FALSE;
 /* show cancel event pulse handling all off (Verilog default inertial) */ 
 __show_cancel_e = FALSE;
 __showe_onevent = TRUE;
 __warn_cancel_e = FALSE;
 /* always want to remove all 0 delay path unless turned off */
 __rm_path_pnd0s = TRUE;
 __rm_gate_pnd0s = FALSE;
 __num_rem_gate_pnd0s = 0;
 __num_flat_rem_gate_pnd0s = 0;
 __num_rem_mipds = 0;
 __dmpvars_all = FALSE;
 __num_execstmts = 0;
 __num_addedexec = 0;
 /* this may get turned on for good in timformat fixup code */ 
 __nd_timstr_suf = FALSE;
 __num_glbs = 0;
 __num_uprel_glbs = 0;
 __num_dfps = __num_glbdfps = __num_locdfps = 0;
 __num_inst_pndparams = 0;
 __design_gi_arrays = FALSE;
 __design_gia_pndparams = FALSE;
 __mdlevhdr = NULL;
 __xldl_hdr = __last_xldl = NULL; 
 __xldlvtxind = NULL;
 __num_xldlvtxs = 0;
 __siz_xldlvtxtab = 0;

 __nets_removable = __flnets_removable = 0;
 __gates_removable = __flgates_removable = 0;
 __contas_removable = __flcontas_removable = 0;
 __num_ys = 0;
 __num_inmodglbs = 0;
 __accelerate = TRUE;
 __history_on = TRUE;

 /* set compiler directive values - can be reset to these with `resetall */
 set_tfmt_dflts();
 __dflt_ntyp = N_WIRE;
 __in_cell_region = FALSE;
 __unconn_drive = TOK_NONE;
 __no_expand = FALSE;
 __no_specify = FALSE;
 __no_tchks = FALSE;
 __lib_are_cells = TRUE;
 __design_has_cells = FALSE;

 /* 06/22/00 - SJM - possible cross macro 2 token must start off */
 __macro_sep_width = FALSE;
 __maybe_2tok_sized_num = FALSE;
 __macro_sav_nwid = FALSE;

 __rding_comment = FALSE;
 __splitting = FALSE;
 __run_state = SS_COMP;
 __no_tmove_levels = INFLOOP_MAX;
 __checking_only = TRUE;
 __iasetup = FALSE;
 __ia_entered = FALSE;
 __force_active = FALSE;
 __assign_active = FALSE;
 __qcaf_dcehdr = NULL;

 /* need to leave these so stmt chking does not do special func body chk */
 __name_assigned_to = TRUE;
 __locfnamsyp = NULL;
 /* assume no strengths - if unc. pull, turned off before stren marking*/
 __design_no_strens = TRUE;
 __cur_dce_expr = NULL;
 __impl_evlst_hd = NULL;
 __impl_evlst_tail = NULL;
 __canbe_impl_evctrl = FALSE;
 __nb_sep_queue = TRUE;

 __my_ftime(&__start_time, &__start_mstime);
 cp = ctime(&__start_time);
 strcpy(s1, cp);
 s1[24] = '\0';
 __pvdate = __pv_stralloc(s1);
 __pv_timestamp = __pv_stralloc(s1);
 __end_comp_time = 0L;
 __end_comp_mstime = 0L;
 __end_prep_time = 0L;
 __end_prep_mstime = 0L;
 /* sim time need for possible pli calls */ 
 __simtime = 0ULL;
 init_ds();
 init_cfg();
}

/*
 * set various time format defaults
 */
static void set_tfmt_dflts(void)
{
 /* default is 1 ns. */
 __cur_units = 9;
 __cur_prec = 0;
 /* this is always set to min. of all modules (and is total) */
 __des_timeprec = 9;
 __tfmt_units = 9;
 /* next three default values required by LRM */
 __tfmt_precunits = 0;
 __tfmt_suf = __pv_stralloc("");

 /* this includes space + suffix if suffix is non empty string */
 __tfmt_minfwid = 20;    
 __des_has_timescales = FALSE;
}

/*
 * initialize data structures if needed
 */
static void init_ds(void)
{
 register int32 i;
 int32 len;
 word64 p, u;
 char *chp;

 /* HOME env. variable for use by tilde */
 if ((chp = (char *) getenv ("HOME")) == NULL) strcpy(__pv_homedir, ".");
 else
  {
   strcpy(__pv_homedir, chp);
   len = strlen(__pv_homedir);
   if (__pv_homedir[len - 1] == '/') __pv_homedir[len - 1] = '\0';
  }

 __blnkline = __my_malloc(RECLEN + 1);
 for (i = 0; i < OUTLINLEN; i++) __blnkline[i] = ' ';
 __blnkline[OUTLINLEN] = '\0';

 __venviron = (struct symtab_t **)
  __my_malloc(MAXLEVELS*sizeof(struct symtab_t *));
 for (i = 0; i < MAXLEVELS; i++) __venviron[i] = NULL;

 __glbsycmps = (struct sy_t **) __my_malloc(MAXGLBCOMPS*sizeof(struct sy_t *));
 __glbxcmps = (struct expr_t **)
  __my_malloc(MAXGLBCOMPS*sizeof(struct expr_t *));
 for (i = 0; i < MAXGLBCOMPS; i++)
  { __glbsycmps[i] = NULL; __glbxcmps[i] = NULL; }

 /* allocate a work table for building per module global refs */
 __grwrktab = (struct gref_t *) __my_malloc(100*sizeof(struct gref_t));
 __grwrktabsiz = 100; 
 __grwrknum = 0;

 /* initialize expr. parse table and ID name/loc table */
 __exprtabsiz = 1000;
 __exprtab = (struct expr_t **)
  __my_malloc(__exprtabsiz*sizeof(struct expr_t *));
 /* need first node in case of null expr. */
 __exprtab[0] = (struct expr_t *) __my_malloc(sizeof(struct expr_t));
 for (i = 1; i < __exprtabsiz; i++) __exprtab[i] = NULL;
 __expr_is_lval = FALSE;

 __expr_idtab = (struct expridtab_t **) 
  __my_malloc(__exprtabsiz*sizeof(struct expridtab_t *));
 for (i = 0; i < __exprtabsiz; i++) __expr_idtab[i] = NULL;

 /* allocate and initialize eval stack - must grow for recursive functions */
 __maxxnest = MAXXNEST;
 __xstk = (struct xstk_t **) __my_malloc(__maxxnest*sizeof(struct xstk_t *));
 /* assume 1 work dummy size here - just need some value */
 for (i = 0; i < __maxxnest; i++)
  {
   __xstk[i] = (struct xstk_t *) __my_malloc(sizeof(struct xstk_t));
   /* this fills xstack table fields */ 
   __alloc_xsval(__xstk[i], 1);
  }
 /* notice this is dynamic nesting of recursive func. calls - must grow */ 
 __maxfcnest = MAXFCNEST;
 __fcstk = (struct task_t **)
  __my_malloc(__maxfcnest*sizeof(struct task_t *));
 for (i = 0; i < __maxfcnest; i++) __fcstk[i] = NULL;

 __nbstk = (struct st_t **) __my_malloc(MAXPRPSTNEST*sizeof(struct st_t *));
 for (i = 0; i < MAXPRPSTNEST; i++) __nbstk[i] = NULL;
 __nbsti = -1;

 /* allocate macro definition work string (it grows)*/
 __macwrklen = IDLEN;
 __macwrkstr = __my_malloc(__macwrklen);
 __mac_line_len = 0;
 __macarg_hdr = NULL;
 __macbs_flag = FALSE;

 /* allocate attribute collection work string (it grows)*/
 __attrwrklen = IDLEN;
 __attrwrkstr = __my_malloc(__attrwrklen);
 __attr_line_len = 0;
 __attr_prefix = FALSE; 

 __attrparsestrlen = IDLEN;
 __attrparsestr = __my_malloc(__attrparsestrlen);

 /* make this so big that even if IDLEN length 2 IDs still will fit */
 __xs = __my_malloc(2*IDLEN);
 __xs2 = __my_malloc(2*IDLEN);
 __wrks1 = __my_malloc(2*IDLEN);
 __wrks2 = __my_malloc(2*IDLEN);
 /* SJM 03/20/00 alloc start size for string and number assembly tokens */
 __strtoken = __my_malloc(IDLEN + 1);
 __strtok_wid = IDLEN + 1;
 __numtoken = __my_malloc(IDLEN + 1);
 __numtok_wid = IDLEN + 1;

 /* need malloc since need to be re-allocated */ 
 __acwrk = (word32 *) __my_malloc(WRDBYTES*DFLTIOWORDS);
 __bcwrk = (word32 *) __my_malloc(WRDBYTES*DFLTIOWORDS);
 __abwrkwlen = DFLTIOWORDS;
 /* to turn off number, set to TRUE but must be left in F state */
 __exprline = __my_malloc(IDLEN);
 __cur_sofs = 0;
 __exprlinelen = IDLEN;
 __force_base = BNONE;
 /* first to use is base */
 __last_veriusertf = BASE_VERIUSERTFS - 1; 
 /* SJM 07/16/02 - nee internal shdown table for dynamic pli1 boostrap ret */
 __shadow_veriusertfs = NULL;
 /* this is used as counter then added to veriuser tf last */
 __last_systf = __last_veriusertf;

 /* globals for $q_ system tasks */
 __qlist_hdr = NULL;

 /* not used until sim, but init here */
 __tfinst = NULL;
 __tfrec = NULL;
 __tfrec_hdr = __tfrec_end = NULL;
 /* lists of locationss for every registered vpi systf that has compiletf */
 __vpi_sysf_hdr = __vpi_syst_hdr = NULL;
 /* SJM 07/08/02 - now pli loads dynamic library with bootstrp func */  
 __vpi_dynlib_hd = __vpi_dynlib_end = NULL;
 __pli1_dynlib_hd = __pli1_dynlib_end = NULL;

 __siz_in_fils = MAXFILS;
 __in_fils = (char **) __my_malloc(__siz_in_fils*sizeof(char *));
 __last_lbf = 0;
 __last_srcf = 0;
 __inclst_hdr = __inclst_end = NULL;
 __vinstk = (struct vinstk_t **)
  __my_malloc(MAXFILNEST*sizeof(struct vinstk_t *));
 __vyhdr = NULL;
 __end_vy = NULL;
 __num_ylibs = __num_vlibs = 0;

 /* initialized here since built-in and define + options are added */
 __pv_defsyms = __alloc_symtab(FALSE);
 /* LOOKATME - need more than thes 6 defines */
 __do_macdefine("`__cver__", "");
 __do_macdefine("`__CVER__", "");
 __do_macdefine("`__P1364__", "");
 __do_macdefine("`__p1364__", "");

 __last_lbx = -1;
 __lbexts = (char **) __my_malloc(MAXLBEXTS*sizeof(char *));
 __lbexts[0] = NULL;

 __last_incdir = -1;
 __incdirs = (char **) __my_malloc(MAXINCDIRS*sizeof(char *));
 __incdirs[0] = NULL;

 __undefhd = __undeftail = NULL;
 __undef_mods = 0;

 __wsupptab = (word32 *) __my_malloc(MAXWSWRDS*sizeof(word32));
 for (i = 0; i < MAXWSWRDS; i++) __wsupptab[i] = 0L;
 __in_ifdef_level = 0;
 __ifdef_skipping = FALSE;
 __processing_func = FALSE;
 __first_num_eol = FALSE;
 __langstr = NULL;
 __doing_langdir = FALSE;
 __rding_top_level = TRUE;

 __itstk = (struct itree_t **)
  __my_malloc((MAXITDPTH + 1)*sizeof(struct itree_t *));
 for (i = 0; i <= MAXITDPTH; i++) __itstk[i] = NULL;
 __itstk[0] = (struct itree_t *) 0xffffffff;
 __itstk = &(__itstk[1]);

 __xspi = __itspi = __fcspi = -1;
 __inst_ptr = NULL;
 __inst_mod = NULL;
 /* change to test different udp reps. */
 __ualtrepipnum = UALTREPIPNUM;
 /* DBG all wide __ualtrepipnum = 1; */ 

 /* filled when used */
 __wcardtab = (struct wcard_t *)
  __my_malloc((MAXUPRTS + 1)*sizeof(struct wcard_t));

 __prpstk = (struct st_t **) __my_malloc(MAXPRPSTNEST*sizeof(struct st_t *));
 for (i = 0; i < MAXPRPSTNEST; i++) __prpstk[i] = NULL;

 __btndstk = (struct bt_t **) __my_malloc(MAXBTDPTH*sizeof(struct bt_t *));
 __btndhdrstk = (struct bt_t **) __my_malloc(MAXBTDPTH*sizeof(struct bt_t *));
 for (i = 0; i < MAXBTDPTH; i++) __btndstk[i] = __btndhdrstk[i] = NULL;

 __tmpitp_freelst = NULL;
 __tmpip_freelst = NULL;
 
 __last_libmdp = NULL;

 /* SJM 01/27/04 - initializing global seed for $random and other dist */
 /* systfs in case uses omits the seed inout arg */ 
 /* guessing that 0 will match 2001 LRM rand generator standard */
 __seed = 0;

 __dv_fnam = __pv_stralloc(DFLTDVFNAM);
 __dv_fd = -1;
 __dv_file_size = 0;
 __dv_buffer = NULL;
 __dv_nxti = 0;

 /* BEWARE - since this table reallocated for cgen access must index */
 /* not use address ptr because when reallated to grow ptr will be wrong */
 __tevtab = (struct tev_t *) __my_malloc(2048*sizeof(struct tev_t));
 /* do not need to initialize because freed and reused where init needed */
 __size_tevtab = 2048;

 /* pre-allocate design wide constant table and set some fixed values */
 __setup_contab();

 /* no var storage value table until prep */
 __wtab = NULL;
 __wtabwsiz = -1;
 __wtabwi = -1;

 __btab = NULL;
 __btabbsiz = -1;
 __btabbi = -1;

 __nchgbtab = NULL;
 __nchgbtabbsiz = -1;
 __nchgbtabbi = -1;

 /* least first one unused */
 __numused_tevtab = 0; 
 /* need to set tev list empty because need to allocate for action cbs */
 /* this makes sure at start event table empty */
 __tefreelsti = -1;

 /* set ticks long structs - 16 (built into lang.) by word64 values */
 __itoticks_tab[0] = 1ULL;
 u = 10ULL;
 for (i = 1; i < 16; i++) 
  {
   p = u *__itoticks_tab[i - 1];
   __itoticks_tab[i] = p;
  }
 __tim_zero = 0ULL;
 /* initialize multichannel descriptor table */
 /* notice on reset will be overwritten */
 /* SJM 03/26/00 - 32 is unusable for new Verilog 2000 file I/O but */
 /* init here so wil show as not open */
 for (i = 2; i < 32; i++)
  {
   __mulchan_tab[i].mc_s = NULL;
   __mulchan_tab[i].mc_fnam = NULL;
  }
 /* desc. 0 is hardwired as stdout and 1 to stderr */
 __mulchan_tab[0].mc_s = stdout;
 __mulchan_tab[0].mc_fnam = __pv_stralloc("stdout"); 
 __mulchan_tab[1].mc_s = stderr;
 __mulchan_tab[1].mc_fnam = __pv_stralloc("stderr"); 

 /* AIV 09/05/03 - initialization code for new P1364 2001 fileio streams */
 /* SJM 09/05/03 - rewrote to match mulchan I/O program organization */

 /* use first free with closing and freeing algorithm per Unix and mcds */
 /* SJM 05/17/04 - LOOKATME - stdio.h 16 value is wrong - trying 1024 */ 
 __fio_fdtab = (struct fiofd_t **)
  __my_malloc(MY_FOPEN_MAX*sizeof(struct fiofd_t *));

 for (i = 0; i < MY_FOPEN_MAX; i++) __fio_fdtab[i] = NULL; 

 /* numbers probably same as unix but LRM requires predefined 0,1,2 */
 __fio_fdtab[0] = (struct fiofd_t *) __my_malloc(sizeof(struct fiofd_t));
 __fio_fdtab[0]->fd_error = FALSE;
 /* name only needed for user opened in case stdio fopen fails */
 __fio_fdtab[0]->fd_name = __pv_stralloc("stdin"); 
 __fio_fdtab[0]->fd_s = stdin;

 __fio_fdtab[1] = (struct fiofd_t *) __my_malloc(sizeof(struct fiofd_t));
 __fio_fdtab[1]->fd_error = FALSE;
 __fio_fdtab[1]->fd_name = __pv_stralloc("stdout"); 
 __fio_fdtab[1]->fd_s = stdout;

 __fio_fdtab[2] = (struct fiofd_t *) __my_malloc(sizeof(struct fiofd_t));
 __fio_fdtab[2]->fd_error = FALSE;
 __fio_fdtab[2]->fd_name = __pv_stralloc("stdout"); 
 __fio_fdtab[2]->fd_s = stdout;

 __fiolp = NULL;
 __fiofp = NULL;
 __scanf_pos = -1;

 /* start with no array for ncomp elements */
 __ncablk_nxti = -1;
 __hdr_ncablks =  NULL;
 __cpblk_nxti = -1;
 __hdr_cpblks = NULL;
 __cppblk_nxti = -1;
 __hdr_cppblks = NULL;
 __tnblk_nxti = -1;
 __hdr_tnblks = NULL;

 /* initialize the vpi_ variables - reset must leave */
 __vpi_hfree_hdr = NULL;
 __vpi_hrecfree_hdr = NULL;
 __have_vpi_actions = FALSE;
 __have_vpi_gateout_cbs = FALSE; 
 /* normal mode is not free iterator handles unless user does explicitly */
 __wrkval_buflen = 0;

 __num_vpi_force_cbs = 0;
 __vpi_force_cb_always = FALSE;
 __vpi_rel_cb_always = FALSE;
 __num_vpi_rel_cbs = 0;
 /* SJM 07/24/00 - add flag so no all force/rel vc reentry - off until call */
 __allforce_cbs_off = FALSE;
 __allrel_cbs_off = FALSE;

 __vpi_cbrec_hdr = NULL;
 __errorcb_suppress_msg = FALSE;
 /* debugging values - set when vpi dump obj routine called */
 __cur_vpi_inst = NULL;
 __cur_vpi_obj = NULL;
 __cbvc_causing_dcep = NULL;
 __in_vpi_errorcb = FALSE;
 __acc_vpi_erroff = FALSE;
 __ithtsiz = 0;
 __ithtab = NULL;
 __ithrectab = NULL;
 __ithtsiz2 = 0;
 __ithtab2 = NULL;
 __ithrectab2 = NULL;

 __vpicb_tehdri = (i_tev_ndx *)
  __my_malloc((TOPVPIVAL + 1)*sizeof(i_tev_ndx));
 __vpicb_teendi = (i_tev_ndx *)
  __my_malloc((TOPVPIVAL + 1)*sizeof(i_tev_ndx));
 for (i = 0; i <= TOPVPIVAL; i++)
  __vpicb_tehdri[i] = __vpicb_teendi[i] = -1;

 __rosync_slot = FALSE;
 __tehdr_rosynci = __teend_rosynci = -1;
 __vpifnam_ind = 0;
 __vpilin_cnt = 0;

 /* must allocate first block */
 __hdr_cpnblks = (struct cpnblk_t *) __my_malloc(sizeof(struct cpnblk_t));
 __hdr_cpnblks->cpnblknxt = NULL;
 __hdr_cpnblks->cpnblks = __hdr_cpnblks->cpn_start_sp 
  = __my_malloc(BIG_ALLOC_SIZE);
 __hdr_cpnblks->cpn_end_sp = __hdr_cpnblks->cpn_start_sp + BIG_ALLOC_SIZE - 16;

}

/*
 * initialize cfg globals
 *
 * CFG FIXME - just add to init glb do not need routine
 */
static void init_cfg(void)
{
}

/*
 * OPTION AND COMMAND FILE ARGUMENT PROCESSING ROUTINES
 */

/* these must be positive word32 up to 16 bit values - gaps ok */
#define CO_HELP 1
#define CO_F 2
#define CO_LOG 3
#define CO_KEY 4
#define CO_IAINPUT 5
#define CO_VERB 6
#define CO_QUIET 7
#define CO_MAXERRS 8
#define CO_C 9
#define CO_PARSEONLY 10
#define CO_D 11
#define CO_A 12
#define CO_AOFF 13
#define CO_X 14
#define CO_STOP 15
#define CO_E 16
#define CO_W 17
#define CO_INFORM 18
#define CO_UC 19
#define CO_V 20
#define CO_Y 21
#define CO_LBVERB 22
#define CO_LIBORD 23
#define CO_LIBRESCAN 24
#define CO_LIBNOHIDE 25
#define CO_DEBUG 26
#define CO_MINDEL 27
#define CO_TYPDEL 28
#define CO_MAXDEL 29
/* options than need to be changed to system tasks */
/* also $cleartrace here */
#define CO_SETTRACE 30 
#define CO_SETEVTRACE 31
#define CO_SETPTHTRACE 32
#define CO_TRACEFILE 33
/* this uses assumed lengths - if change option name must change consts */
/* also not in normal table */
#define CO_LBEXT 34
#define CO_SUPPWARNS 35
#define CO_DEFINE 36
#define CO_INCDIR 37
#define CO_GATE_EATER 38
#define CO_NO_GATE_EATER 39
#define CO_PRTSTATS 40
#define CO_PRTALLSTATS 41
#define CO_SPIKEANAL 42
#define CO_SDFANNOTATE 43
#define CO_SDFVERB 44
#define CO_NOIACT 45
#define CO_NOSPFY 46
#define CO_NOTCHKS 47
#define CO_LIBNOCELL 48


#define CO_SHOWCANCELE 51
#define CO_NOSHOWCANCELE 52
#define CO_PULSEX_ONEVENTE 53
#define CO_PULSEX_ONDETECT 54
#define CO_WARNCANCELE 55
#define CO_NOWARNCANCELE 56
#define CO_RMGATEPND0S 57
#define CO_NORMPTHPND0S 58
#define CO_NOKEEPCOMMANDS 59
#define CO_PLIKEEPSRC 60
#define CO_OPT_SIM 61
#define CO_OPT_DEBUG 62
#define CO_SNAPSHOT 63
#define CO_FRSPICE 64
#define CO_SWITCHVERB 65
#define CO_CHG_PORTDIR 66
#define CO_NB_NOSEP_QUEUE 67
#define CO_SDF_LOG 68
#define CO_SDF_NO_ERRS 69
#define CO_SDF_NO_WARNS 70 
#define CO_LOADPLI1 71
#define CO_LOADVPI 72
#define CO_LIBLIST 73
#define CO_LIBMAP 74

/* command line option table */
/* this does not need to be alphabetical */
/* single token but parsed options not here */
static struct namlst_t cmdopts[] = {
 { CO_HELP, "-h" },
 { CO_HELP, "-H" },
 { CO_HELP,  "-?" },
 { CO_F , "-f" },
 { CO_LOG, "-l" },
 { CO_SDF_LOG, "+sdf_log_file" },
 { CO_KEY, "-k" },
 { CO_IAINPUT, "-i" },
 { CO_VERB, "+verbose" },
 { CO_QUIET, "-q" },
 { CO_MAXERRS, "+maxerrors" },
 { CO_C, "-c" },
 { CO_PARSEONLY, "+parseonly" },
 { CO_D, "-d" },
 { CO_A, "-a" }, 
 { CO_AOFF, "-aoff" },
 { CO_X, "-x" }, 
 { CO_STOP,  "-s" },
 { CO_E , "-e" },
 { CO_W , "-w" },
 { CO_INFORM,  "-informs" },
 { CO_UC, "-u"},
 { CO_V, "-v" },
 { CO_Y, "-y" },
 { CO_LBVERB, "+libverbose" },
 { CO_LIBORD, "+liborder" },
 { CO_LIBRESCAN, "+librescan" },
 { CO_LIBNOHIDE, "+libnohide" },
 { CO_DEBUG, "+debug" },
 { CO_MINDEL, "+mindelays" },
 { CO_TYPDEL , "+typdelays" },
 { CO_MAXDEL , "+maxdelays" },
 { CO_SETTRACE, "-t" },
 { CO_SETEVTRACE, "-et" },
 { CO_SETPTHTRACE, "-pt" },
 { CO_TRACEFILE, "+tracefile" },
 { CO_NO_GATE_EATER, "+nogateeater" },
 { CO_GATE_EATER, "+gateeater" },
 { CO_PRTSTATS, "+printstats" },
 { CO_PRTALLSTATS, "+printallstats" },
 { CO_SDFANNOTATE, "+sdfannotate" },  
 { CO_SDFANNOTATE, "+sdf_annotate" },  
 { CO_SDFVERB, "+sdfverbose" },
 { CO_SDFVERB, "+sdf_verbose" },
 { CO_NOIACT, "+nointeractive" },
 { CO_NOSPFY, "+nospecify" },
 { CO_NOTCHKS, "+notimingchecks" },
 { CO_NOTCHKS, "+notimingcheck" },
 { CO_LIBNOCELL, "+libnocell" },
 { CO_SPIKEANAL, "+spikes" },
 { CO_SHOWCANCELE, "+show_canceled_e" },
 { CO_NOSHOWCANCELE, "+noshow_canceled_e" },
 { CO_PULSEX_ONEVENTE, "+pulse_e_style_onevent" },
 { CO_PULSEX_ONDETECT, "+pulse_e_style_ondetect" },
 { CO_WARNCANCELE, "+warn_canceled_e" },
 { CO_NOWARNCANCELE, "+nowarn_canceled_e" },
 { CO_RMGATEPND0S, "+remove_gate_0delays" },
 { CO_NORMPTHPND0S, "+noremove_path_0delays" },
 { CO_NOKEEPCOMMANDS, "+nokeepcommands" },
 { CO_OPT_SIM, "+optimized_sim" },
 { CO_OPT_SIM, "-O" },
 { CO_OPT_DEBUG, "+Odebug" },
 { CO_SNAPSHOT, "+snapshot" },
 { CO_FRSPICE, "+fromspice" },
 { CO_SWITCHVERB, "+switchverbose" },
 { CO_CHG_PORTDIR, "+change_port_type" },
 { CO_NB_NOSEP_QUEUE, "+no_separate_nb_queue" },
 { CO_SDF_NO_ERRS, "+sdf_noerrors" },
 { CO_SDF_NO_WARNS, "+sdf_nowarns" },
 { CO_LIBLIST, "-L"},
 { CO_LIBMAP, "+config"}
};
#define NCMDOPTS (sizeof(cmdopts) / sizeof(struct namlst_t))

/*
 * build command option linked list
 *
 * only fatal errors here since still no log file
 */
static void xpnd_args(int32 argc, char **argv)
{
 register int32 i;
 int32 oi;
 struct optlst_t *olp;
 char *chp;

 /* first convert arg list to option list */
 /* know argv[0] is name of program */
 /* for command args "file" name is [arg] and lin cnt is arg. no. */
 /* 0 is [arg] and later none, and 1 is stdin */
 __opt_hdr = __opt_end = NULL;
 __last_inf = -1;
 __add_infil("[args]");
 __cur_fnam = __in_fils[__last_inf];
 /* for command number, location indicator - literal index for this */
 __add_infil("CMD");
 __cmd_ifi = __last_inf;

 for (olp = NULL, i = 1; i < argc; i++)
  {
   if ((int32) strlen(argv[i]) >= IDLEN - 1)
    {
     __lin_cnt = i;
     __pv_ferr(919, "command argument too long (%d) - ignored", IDLEN - 1);
     continue;
    }
   olp = alloc_optlst();
   if (__opt_end == NULL) __opt_hdr = __opt_end = olp;
   else { __opt_end->optlnxt = olp; __opt_end = olp; }
   olp->opt = __pv_stralloc(argv[i]);
   /* level is 0 for top */
   olp->optlev = 0;
   /* this must be index of args */
   olp->optfnam_ind = 0;
   olp->optlin_cnt = i;
  }

 /* repeatedly pass through list and expand good -fs */
 copy_xpnd_onelev_args();
 /* DBG --- notice no debug flag at this point ---
 dmp_xpnd_olist(__opt_hdr);
 --- */

 /* final step sets some pointers for special options into tab */
 for (olp = __opt_hdr; olp != NULL; olp = olp->optlnxt)
  {
   chp = olp->opt;
   if (olp->is_bmark || olp->is_emark) continue;

   if (*chp == '+' || *chp == '-')
    {
     oi = find_opt(chp);
     olp->optnum = oi;
     /* notice - algorithm is to use last if repeated */
     switch (oi) {
      case CO_LOG: __log_olp = olp; break;   
      case CO_HELP: __help_olp = olp; break;
      case CO_QUIET: __quiet_olp = olp; break;
      case CO_VERB: __verb_olp = olp; break;
     }
    }
  }
}

/*
 * allocate and initialize an option list element
 */
static struct optlst_t *alloc_optlst(void)
{
 struct optlst_t *olp;

 olp = (struct optlst_t *) __my_malloc(sizeof(struct optlst_t)); 
 olp->opt = NULL;
 olp->optnum = 0;
 olp->optlev = 0;
 olp->is_bmark = FALSE;
 olp->is_emark = FALSE;
 olp->is_argv = FALSE;
 olp->argv_done = FALSE;
 olp->optfnam_ind = 0;
 olp->optlin_cnt = -1;
 olp->optlnxt = NULL;
 return(olp);
}

/*
 * copy from 1 level from hdr liast to new list
 */
static void copy_xpnd_onelev_args(void)
{
 register struct optlst_t *olp;
 int32 savlast_inf, savlin_cnt, some_expanded, lev;
 struct optlst_t *olp2, *new_olp;
 FILE *opt_s;
 char *chp;

 __new_opt_end = __new_opt_hdr = NULL;
 for (lev = 1;; lev++)
  {
   some_expanded = FALSE;
   for (olp = __opt_hdr; olp != NULL;) 
    {
     /* anything but -f just remains in list */
     /* optnum only CO_F if previous error */
     if (olp->is_bmark || olp->is_emark
       || strcmp(olp->opt, "-f") != 0 || olp->optnum == CO_F)
      {
       olp2 = olp->optlnxt;
       if (__new_opt_end == NULL) __new_opt_hdr = __new_opt_end = olp;
       else { __new_opt_end->optlnxt = olp; __new_opt_end = olp; }
       olp->optlnxt = NULL;
       olp = olp2;
       continue;
      } 
     /* logic to possibly (if can be opened) a -f [file] element */
     olp2 = olp->optlnxt; 

     if (olp2 == NULL) { olp->optnum = CO_F; break; }
     chp = olp2->opt;

     /* if cannot open, or not followed by file name, leave - error later */
     /* but leave both -f and [arg] but move 1 past arg */
     if (chp == NULL || *chp == '+' || *chp == '-'
      || (opt_s = __tilde_fopen(chp, "r")) == NULL)
      {
       olp->optnum = CO_F;
       if (__new_opt_end == NULL) __new_opt_hdr = __new_opt_end = olp;
       else { __new_opt_end->optlnxt = olp; __new_opt_end = olp; }
       __new_opt_end->optlnxt = olp2;
       __new_opt_end = olp2;
       olp = olp2->optlnxt;
       olp2->optlnxt = NULL;
       continue;
      }

     /* move olp one past -f and [file name] */
     olp = olp2->optlnxt;
     __add_infil(chp);   
     __cur_fnam = __in_fils[__last_inf];
     savlin_cnt =  __lin_cnt;
     savlast_inf = __last_inf;
     __lin_cnt = 1;

     /* add beginning marker */
     ins_optlst_marker(TRUE, lev);
     /* fill a new option list */
     for (;;)
      {
       if ((__toktyp = __get_cmdtok(opt_s)) == TEOF) break;

       new_olp = alloc_optlst();
       if (__new_opt_end == NULL) __new_opt_hdr = __new_opt_end = new_olp;
       else { __new_opt_end->optlnxt = new_olp; __new_opt_end = new_olp; }
       new_olp->opt = __pv_stralloc(__token);
       new_olp->optlev = lev;
       new_olp->optfnam_ind = __last_inf;
       new_olp->optlin_cnt = __lin_cnt;
       some_expanded = TRUE;
      }
     /* add end marker */
     ins_optlst_marker(FALSE, lev);
     __my_fclose(opt_s); 
     __cur_fnam = __in_fils[savlast_inf];
     __lin_cnt = savlin_cnt;
    }
   /* DBG --- no debug flag at this point ---
   dmp_xpnd_olist(__new_opt_hdr);
   --- */
   __opt_hdr = __new_opt_hdr;
   __opt_end = __new_opt_end;
   if (!some_expanded) break;
   __new_opt_hdr = __new_opt_end = NULL;
  } 
 /* DBG remove --- no debug flag at this point ---
 dmp_xpnd_olist(__opt_hdr);
 --- */
}

/*
 * insert a marker
 */
static void ins_optlst_marker(int32 is_bmark, int32 lev)
{
 struct optlst_t *new_olp;
 
 /* this also initializes */
 new_olp = alloc_optlst();
 if (__new_opt_end == NULL) __new_opt_hdr = __new_opt_end = new_olp;
 else { __new_opt_end->optlnxt = new_olp; __new_opt_end = new_olp; }
 /* must not be seen as input file */
 new_olp->optnum = -2;
 if (is_bmark) new_olp->is_bmark = TRUE;
 else new_olp->is_emark = TRUE;
 new_olp->optlev = lev;
 new_olp->optfnam_ind = __last_inf;
 new_olp->optlin_cnt = __lin_cnt;
}

/*
 * dump expanded option list
 */
static void dmp_xpnd_olist(register struct optlst_t *olp)
{
 int32 olnum;

 if (olp == NULL)
  {
   __dbg_msg("&& argument list empty.\n");
   return;
  }
 __dbg_msg("&&& start of expanded argument list dump.\n"); 
 for (olnum = 1; olp != NULL; olp = olp->optlnxt, olnum++)
  {
   if (olp->is_bmark || olp->is_emark)
    {
     if (olp->is_bmark)
      {
       __dbg_msg(">> no. %d lev %d: BEGIN MARK at %s\n", olnum, olp->optlev,
        __bld_lineloc(__xs, olp->optfnam_ind, olp->optlin_cnt));
      }
     else
      {
       __dbg_msg("<< no. %d lev %d: END MARK at %s\n", olnum, olp->optlev,
       __bld_lineloc(__xs, olp->optfnam_ind, olp->optlin_cnt));
      }
    }
   else
    {
     __dbg_msg("&& no. %d level %d: %s (value %d) at %s\n", olnum,
      olp->optlev, olp->opt, olp->optnum, __bld_lineloc(__xs,
      olp->optfnam_ind, olp->optlin_cnt));
    }
  }
 __dbg_msg("&&& expanded argument list end.\n"); 
}

/*
 * find an option from table
 * scheme assume no options with arguments but directions can have arguments
 * assuming then end with ;
 */
static int32 find_opt(char *aval)
{
 register int32 i;

 /* first search for normal option (if arg white space separated) */ 
 for (i = 0; i < NCMDOPTS; i++)
  {
   if (strcmp(aval, cmdopts[i].lnam) == 0) return((int32) cmdopts[i].namid);
  }
 /* notice these special options are not in cmdopts table */
 if (strncmp(aval, "+libext+", 8) == 0) return(CO_LBEXT);
 if (strncmp(aval, "+incdir+", 8) == 0) return(CO_INCDIR);
 if (strncmp(aval, "+suppress_warns+", 16) == 0) return(CO_SUPPWARNS);
 if (strncmp(aval, "+define+", 8) == 0) return(CO_DEFINE);
 /* notice next 2 unusual because use = instead of + since only one pair */
 if (strncmp(aval, "+loadpli1=", 10) == 0) return(CO_LOADPLI1);
 if (strncmp(aval, "+loadvpi=", 9) == 0) return(CO_LOADVPI);
 return(-1);
}

/*
 * open log file (need if at all possible)
 */
static void open_logfile(void)
{
 char *chp;
 struct optlst_t *arg_olp;
 char s1[RECLEN];
 
 strcpy(s1, DFLT_LOGFNAM);
 __save_log_s = NULL;
 if (__log_olp != NULL)
  {
   arg_olp = __log_olp->optlnxt;
   if (arg_olp != NULL) chp = arg_olp->opt; else chp = NULL;
   if (chp == NULL || *chp == '+' || *chp == '-')
    {
     __gfwarn(505, __log_olp->optfnam_ind, __log_olp->optlin_cnt,
      "-l option not followed by log file name - %s used", DFLT_LOGFNAM); 
     goto no_explicit;
    }
   /* must mark so not seen as input file */
   arg_olp->optnum = -2;
   if ((__log_s = __tilde_fopen(chp, "w")) == NULL)
    {
     __gfwarn(505, arg_olp->optfnam_ind, arg_olp->optlin_cnt,
      "cannot open -l log file %s - trying default", chp);
     goto no_explicit;
    }
   __log_fnam = __pv_stralloc(chp);
   goto done;
  }

no_explicit:
 if ((__log_s = __tilde_fopen(s1, "w")) == NULL)
  {
   __pv_fwarn(505, "cannot open default log file %s - no log file", s1);
   return;
  }
 else __log_fnam = __pv_stralloc(s1);

done:;
 /* SM 03/26/00 - 2 (bit 4) no longer used for log file - lumped in with 1 */
 /* ---
 __mulchan_tab[2].mc_s = __log_s;
 --- */
 /* know this is closed so no previous name to free */
 /* ---
 __mulchan_tab[2].mc_fnam = __pv_stralloc(__log_fnam);
 --- */
}

/*
 * read command line args
 */
static void do_args(void )
{
 register struct optlst_t *olp; 
 int32 oi, tmp, len;
 FILE *f;
 struct optlst_t *sav_olp;
 struct loadpli_t *ldp;
 struct mapfiles_t *mapfp;
 char *chp, *chp2, *chp3;
 char s1[2*RECLEN];

 /* notice for options with arguments must mark arg as -2 or will be */
 /* seen as input file */ 
 for (olp = __opt_hdr; olp != NULL;)
  {
   /* ignore markers added for building vpi argc/argv */
   if (olp->is_bmark || olp->is_emark)
    { olp = olp->optlnxt; continue; }

   chp = olp->opt;
   /* no + or -, ignore for now - next pass add to file list */
   if (*chp != '-' && *chp != '+') { olp = olp->optlnxt; continue; }

   /* unrecognized +/-, if -, warning, else inform */ 
   if (olp->optnum == -1)
    {
     if (strlen(chp) == 1)
      {
       __gfwarn(506, olp->optfnam_ind, olp->optlin_cnt,
        "%s option prefix without following option name illegal - ignored",
         chp);
       olp = olp->optlnxt;
       continue;
      } 

     if (*chp == '-')
      __gfwarn(506, olp->optfnam_ind, olp->optlin_cnt,
       "unrecogized option %s - ignored ", olp->opt);
     else __gfinform(410, olp->optfnam_ind, olp->optlin_cnt,
      "assuming unrecognized option %s for pli or other simulator",
      olp->opt);
     
     olp = olp->optlnxt;
     continue;
    }
   oi = olp->optnum;
   switch (oi) {
    /* ignore already processed */
    case CO_LOG: case CO_HELP: case CO_QUIET: case CO_VERB: break;
    /* if was not able to open nest file error here */
    case CO_F: 
     /* if -f option expanded - will be removed before here */
     /* left only if error (cannot open file) */
     if (olp->optlnxt == NULL)
      {
       __gferr(920, olp->optfnam_ind, olp->optlin_cnt,
        "-f include argument not followed by file name");
       continue;
      }
     olp = olp->optlnxt; 
     /* -f not followed by file name in nested -f file */
     if (olp->is_emark)
      {
       /* here may have long list of emarks that must be skipped */
       __gferr(920, olp->optfnam_ind, olp->optlin_cnt,
        "nested -f include argument not followed by file name");
       break;
      }
     __gferr(920, olp->optfnam_ind, olp->optlin_cnt,
      "cannot open -f include argument file %s", olp->opt);
     olp->optnum = -2;
     break;

    /* options followed by 1 white space separated argument */
    case CO_IAINPUT:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || chp == NULL || *chp == '+'
      || *chp == '-')
      {
       __gfwarn(505, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "-i option not followed by startup interactive input file name"); 
       continue;
      }
     olp->optnum = -2;
     /* make sure it can be opened */
     if ((f = __tilde_fopen(chp, "r")) == NULL)
      {
       __gfwarn(505, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "cannot open -i startup interactive input file %s - input from stdin",
        chp);
       break;
      }
     __my_fclose(f);
     __cmd_start_fnam = __pv_stralloc(chp);
     if (__verbose)
      __cv_msg("  Startup interactive input will be read from file \"%s\".\n",
       __cmd_start_fnam);
     break; 
    case CO_KEY:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(505, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "-k option not followed by file name for transcript of typed keys");
       continue; 
      }  
     olp->optnum = -2;
     __gfwarn(621, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
      "-k option no effect - key files not supported (use $input scripts)");
     /* only open if needed (must go in malloc as separate) */
     break;
    case CO_TRACEFILE:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(509, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
       "+tracefile option not followed by file name - previous (stdout?) used");
       continue; 
      }  
     olp->optnum = -2;
     /* only open when tracing enabled */
     if (strcmp(chp, "STDOUT") == 0) strcpy(chp, "stdout"); 
     if (__tr_fnam != NULL) __my_free(__tr_fnam, strlen(__tr_fnam) + 1);
     __tr_fnam = __pv_stralloc(chp);
     __tr_s = NULL;
     if (__verbose)
      __cv_msg(
       "  Statement and/or event trace output will be written to file \"%s\".\n",
       __tr_fnam);
      /* in case -t or -et precedes this option open now */
     if (__st_tracing || __ev_tracing || __pth_tracing) __maybe_open_trfile();
     break;
    case CO_SDF_LOG:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(505, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "+sdf_log_file setting option not followed by file name");
       continue; 
      }  
     olp->optnum = -2;
     if (__sdf_opt_log_fnam != NULL)
      __my_free(__sdf_opt_log_fnam, strlen(__sdf_opt_log_fnam) + 1);
     __sdf_opt_log_fnam = __pv_stralloc(chp);

     if (__verbose)
      {
       __cv_msg(
        "  SDF messages and errors will be written to separate SDF log file %s.\n",
        __sdf_opt_log_fnam);
      }
     break;
    case CO_SDFANNOTATE:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(593, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "+sdf_annotate option not followed by [file][+<optional scope name>] - ignored");
       continue;
      }
     olp->optnum = -2;
     do_sdflocdef(chp, __in_fils[sav_olp->optfnam_ind], sav_olp->optlin_cnt);
     break;
    case CO_MAXERRS:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
bad_maxerrs:
       __gfwarn(502, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "maximum error number must be 0 (no limit) or positive");
       continue;
      }
     olp->optnum = -2;
     if (sscanf(chp, "%d", &tmp) != 1 || tmp < 0) goto bad_maxerrs;
     __max_errors = tmp; 
     if (__max_errors != 0 && __verbose)
      __cv_msg(
       "  Translation will stop after %d errors instead of default %d.\n",
       __max_errors, MAX_ERRORS); 
     else
      {
       if (__verbose)
        __cv_msg("  Default error termination limit disabled.\n");
      }
     break;
#ifdef __CVLIC__
    case CO_LICPTH:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(502, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "+licpath option not followed by required [path] - ignored");
       continue;
      }
     olp->optnum = -2;
     __lic_path = __pv_stralloc(chp);
     if (__verbose)
      {
       __cv_msg(
        "  License authorization file cver.lic searched for in directory \"%s\".\n",
        __lic_path);
      }
     break;
#endif
    case CO_V:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(501, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "-v library file option not followed by file name - ignored");
       continue;
      }
     olp->optnum = -2;
     if (strcmp(chp, ".") == 0 || strcmp(chp, "..") == 0)
      {
       __gfwarn(623, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "-v library file %s illegal", chp);
      }
     add_lbfil(chp, 'v');
     if (__verbose)
      __cv_msg("  File \"%s\" in library from -v option.\n", chp); 
     break;
    case CO_LIBLIST:
     /* -L library */
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(501, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "-L library map file option not followed by file name - ignored");
       continue;
      }
     olp->optnum = -2;
     /* set the global name of the -L library name */
     __cmdl_library = __pv_stralloc(chp);
     if (__verbose)
      __cv_msg("  File \"%s\" in library from -L option.\n", chp); 
     break;
    case CO_LIBMAP:
     /* +config [filename] */
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(501, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "+config [file] library map file option not followed by file name - ignored");
       continue;
      }
     olp->optnum = -2;

     mapfp = (struct mapfiles_t *) __my_malloc(sizeof(struct mapfiles_t));
     mapfp->mapfnam = __pv_stralloc(chp);
     mapfp->mapfnxt = NULL;

     if (__map_files_hd == NULL) __map_files_hd = __map_files_tail = mapfp;
     else
      {
       __map_files_tail->mapfnxt = mapfp;
       __map_files_tail = mapfp;
      }
     if (__verbose)
      __cv_msg(
       "  Will read \"%s\" map lib file specified by +config [file] option.\n",
       mapfp->mapfnam); 
     break;
    case CO_FRSPICE:
     break;
    case CO_Y:
     sav_olp = olp;
     olp = olp->optlnxt; 
     if (olp != NULL) chp = olp->opt;
     if (olp == NULL || olp->is_emark || *chp == '+' || *chp == '-')
      {
       __gfwarn(593, sav_olp->optfnam_ind, sav_olp->optlin_cnt,
        "-y library directory option not followed by path name - ignored");
       continue;
      }
     olp->optnum = -2;
     add_lbfil(chp, 'y');
     if (__verbose)
      __cv_msg("  Directory \"%s\" searched for libraries from -y option.\n",
      olp->opt); 
     break;
    case CO_DEFINE:
     chp = olp->opt;
     do_cmdmacdef(&(chp[8]), olp);
     break;
    case CO_INCDIR:
     chp2 = olp->opt;
     /* error message on bad format emitted inside here */
     if (!bld_incdtab(&(chp2[8]), olp)) break;
     if (__verbose)
      {
       __cv_msg(
        "  %s additional +incdir+ paths searched to find `include files.\n",
        &(olp->opt[7])); 
      }
     break;
    case CO_LOADPLI1:
#ifdef __STATIC_PLI__
    __gfwarn(3123, olp->optfnam_ind, olp->optlin_cnt,
     "+loadpli1 = option illegal when using old style statically linked cverobj.o - ignored");
#else
     chp2 = olp->opt;
     if ((ldp = bld_loadpli_lbs(&(chp2[10]), olp, TRUE)) == NULL) break;
     if (__verbose)
      {
       /* this can't fail since know well formed */
       chp3 = strrchr(chp2, ':');
       /* DBG LINT remove -- */
       if (chp3 == NULL) __misc_terr(__FILE__, __LINE__);
       /* -- */
       if (strcmp(chp3, "") == 0) strcpy(__xs, "[none]");
       else strcpy(__xs, chp3);
       __cv_msg(
        "  +loadpli1 dynamic library %s loaded with bootstrap routine(s) %s\n",
        ldp->libnam, __xs);
      }
#endif
     break;
    case CO_LOADVPI:
#ifdef __STATIC_PLI__
    __gfwarn(3123, olp->optfnam_ind, olp->optlin_cnt,
     "+loadvpi= option illegal when using old style statically linked cverobj.o - ignored");
#else
     chp2 = olp->opt;
     if ((ldp = bld_loadpli_lbs(&(chp2[9]), olp, FALSE)) == NULL) break;
     if (__verbose)
      {
       /* this can't fail since know well formed */
       chp3 = strrchr(chp2, ':');
       /* DBG LINT remove -- */
       if (chp3 == NULL) __misc_terr(__FILE__, __LINE__);
       /* -- */
       if (strcmp(chp3, "") == 0) strcpy(__xs, "[none]");
       else strcpy(__xs, chp3);
       __cv_msg(
        "  +loadvpi= dynamic library %s loaded with bootstrap routine(s) %s\n",
        ldp->libnam, __xs);
      }
#endif
     break;
    case CO_LBEXT:
     chp2 = olp->opt;
     if (__last_lbx != -1)
      {
       __gfwarn(598, olp->optfnam_ind, olp->optlin_cnt,
        "+libext+ option for -y library directories cannot be repeated - ignored");
       /* need to move to next option */
       break;
      }
    
     if (!bld_lbxtab(&(chp2[8]), olp)) break;
     if (__verbose)
      {
       __cv_msg(
        "  %s suffix(es) used for -y library extensions from +libext+ options.\n",
        &(olp->opt[7])); 
      }
     break;
    /* options where arg is suffix of option */
    case CO_SUPPWARNS:
     chp2 = olp->opt;
     len = strlen(chp2);
     /* if optional ending plus left out - add here */
     if (chp2[len - 1] != '+')
      {
       /* SJM - 12/20/02 - must copy to work string because no room to add */
       /* plus if not added by user */
       strcpy(s1, chp2);
       s1[len] = '+'; s1[len + 1] = '\0';
       chp2 = s1;
      }

     /* returns F on error, so tracing for not emitted on T */
     if (add_suppwarn(chp2, olp)) 
      {
       if (__verbose)
        __cv_msg(
         "  Following warning or interactive message(s) %s will not be emitted.\n",
         &(chp2[16]));
      }
     break;
    /* options without arguments */
    case CO_C:
     if (__verbose)
      {
       __cv_msg(
        "  Translate only - all files and library directories will be checked.\n");
      }
     __compile_only = TRUE;
     break;
    case CO_PARSEONLY:
     if (__verbose)
      {
       __cv_msg(
        "  Parse only - for quick syntax check of separate modules.\n");
      }
     __parse_only = TRUE;
     break;
    case CO_STOP:
     if (__verbose)
      __cv_msg("  Stopping into interactive mode before simulation begins.\n");
     /* this is not checked until sim begins (if it does) */
     __stop_before_sim = TRUE;
     break;
    case CO_E:
     __no_errs = TRUE;
     if (__verbose) __cv_msg("  Error messages will not be printed.\n");
     break;
    case CO_D:
     __decompile = TRUE;
     if (__verbose)
      __cv_msg(
       "  Source after defparam expansion will be decompiled and printed.\n");
     break;
    case CO_A:
     if (__verbose)
      __cv_msg("-a accelerate option no effect - on by default.\n");
     break;
    case CO_AOFF:
     if (__verbose)
      __cv_msg("port and gate assignments will not be accelerated.\n");
     __accelerate = FALSE;
     break;
    case CO_X:
     if (__verbose)
      __cv_msg("-x option no effect - vector wires expanded by default.\n");
     break;
    case CO_DEBUG:
     __debug_flg = TRUE;
     if (__verbose)
      __cv_msg("  Debugging information will be printed.\n");
     break;
    case CO_MINDEL:
     __mintypmax_sel = DEL_MIN;
     if (__verbose)
      __cv_msg("  Min:typ:max expressions will use the minimum value.\n");
     break;
    case CO_TYPDEL:
     __mintypmax_sel = DEL_TYP;
     if (__verbose)
      __cv_msg(
       "  Min:typ:max expressions will use the typical value (default).\n");
     break;
    case CO_MAXDEL:
     __mintypmax_sel = DEL_MAX;
     if (__verbose)
      __cv_msg("  Min:typ:max expressions will use the maximum value.\n");
     break;
    case CO_SETTRACE:
     __st_tracing = TRUE;
     __maybe_open_trfile();
     if (__verbose)
      __cv_msg("  Execution of behavioral statements will be traced.\n");
     break;
    case CO_SETEVTRACE:
     __ev_tracing = TRUE;
     __maybe_open_trfile();
     if (__verbose) __cv_msg("  Event processing will be traced.\n");
     break;
    case CO_SETPTHTRACE:
     __pth_tracing = TRUE;
     __maybe_open_trfile();
     if (__verbose)
      __cv_msg("  Specify delay Path will be traced in detail.\n");
     break;
    case CO_GATE_EATER: case CO_NO_GATE_EATER:
     __gfwarn(507, olp->optfnam_ind, olp->optlin_cnt,
      "  +gateeater option obsolete - option ignored");
     break;
    case CO_W:
     __no_warns = TRUE;
     if (__verbose) __cv_msg("  Warning messages will not be printed.\n");
     break;
    case CO_INFORM:
     __no_informs = FALSE;
     if (__verbose) __cv_msg("  Inform messages will be printed.\n");
     break;
    case CO_UC:
     __gfwarn(507, olp->optfnam_ind, olp->optlin_cnt,
      "  -u option unsupported - input is case sensitive");
     break;
    case CO_SDFVERB:
     __sdf_verbose = TRUE;
     
     if (__verbose)
      __cv_msg("  SDF annotation tracing verbose mode is on.\n");
     break;
    case CO_SDF_NO_ERRS:
     __sdf_no_errs = TRUE;
     if (__verbose) __cv_msg("  SDF error messages will not be printed.\n");
     break;
    case CO_SDF_NO_WARNS:
     __sdf_no_warns = TRUE;
     if (__verbose) __cv_msg("  SDF warning messages will not be printed.\n");
     break;
    case CO_LBVERB:
     __lib_verbose = TRUE;
     __cfg_verbose = TRUE;
     if (__verbose) __cv_msg("  Library tracing verbose mode is on.\n");
     break;
    case CO_SWITCHVERB:
     __switch_verbose = TRUE;
     /* SJM 11/29/00 - message only output if verbose not switch verbose */
     if (__verbose)
      __cv_msg("  Switch channel construction verbose mode is on.\n");
     break;
    case CO_CHG_PORTDIR:
     /* SJM 11/29/00 - new option that changes port direction if connected */  
     /* as inout, most designs do not need this option but some do */
     __chg_portdir = TRUE;
     if (__verbose)
      __cv_msg(
       "  Changing port type (direction) to inout for ports connected as inout.\n");
     break;
    case CO_NB_NOSEP_QUEUE:
     /* AIV 06/28/05 - new option that changes causes old non blocking */
     /* algorithm that did not have separate after pnd0 (each section) */
     /* event queue to be used */
     __nb_sep_queue = FALSE;
     if (__verbose)
      {
       __cv_msg(
        "  Using old Cver non-blocking scheduling - no separate non blocking queuel\n");
      }
     break;
    case CO_LIBRESCAN:
     __lib_rescan = TRUE;
     if (__verbose)
      __cv_msg(
       "  Library rescanned from beginning after every name resolved.\n");
     break;
    case CO_LIBORD:
     __gfwarn(503, olp->optfnam_ind, olp->optlin_cnt,
      "+liborder option unsupported");
lib_mth:
     if (__verbose)
      __cv_msg("  Using default or +librescan library scanning method.\n");
     break;
    case CO_LIBNOHIDE:
     __gfwarn(594, olp->optfnam_ind, olp->optlin_cnt,
      "+libnohide option unsupported");
     goto lib_mth;
    case CO_PRTSTATS:
     __prt_stats = TRUE;
     if (__verbose) __cv_msg("  Design content tables will be written.\n");
     break;
    case CO_PRTALLSTATS:
     __prt_allstats = TRUE;
     if (__verbose)
      __cv_msg(
       "  Voluminous design and module content tables will be written.\n");
     break;
    case CO_SPIKEANAL:
     __gfwarn(591, olp->optfnam_ind, olp->optlin_cnt,
      "+spikes option name changed - use standardized +show_canceled_e instead");
     break;
    case CO_SHOWCANCELE:
     __show_cancel_e = TRUE;
     if (__verbose)
      __cv_msg("  Pulse canceled events X shown (glitches cause X output).\n");
     break;
    case CO_NOSHOWCANCELE:
     __show_cancel_e = FALSE;
     if (__verbose)
      __cv_msg(
       "  Pulse canceled events not shown (glitches removed - default).\n");
     break;
    case CO_PULSEX_ONEVENTE:
     __showe_onevent = TRUE;
     if (__verbose)
      __cv_msg("  Pulse shown Xs scheduled at pulse leading edge (default).\n");
     break;
    case CO_PULSEX_ONDETECT:
     __showe_onevent = FALSE;
     if (__verbose)
      __cv_msg("  Pulse shown Xs set when pulse (glitch) detected.\n");
     break;
    case CO_WARNCANCELE:
     __warn_cancel_e = TRUE;
     if (__verbose)
      __cv_msg("  Warning message emitted when pulse (glitch) detected.\n");
     break;
    case CO_NOWARNCANCELE: 
     __warn_cancel_e = FALSE;
     if (__verbose)
      {
       __cv_msg(
        "  No warning message emitted when pulse (glitch) detected (detected).\n");
      }
     break;
    case CO_RMGATEPND0S:
     __rm_gate_pnd0s = TRUE;  
     if (__verbose)
      {
       __cv_msg(
        "  All gate #0 delays converted to no delay to speed up simulation.\n");
      }
     break;
    case CO_NORMPTHPND0S:
     /* remove path pound 0 delays by default */
     __rm_path_pnd0s = FALSE;  
     if (__verbose)
      {
       __cv_msg("  Disabling removal of all 0 (no effect) path delays.\n");
      }
     break;
    case CO_NOKEEPCOMMANDS:
     __history_on = FALSE;
     if (__verbose)
      {
       __cv_msg(
       "  Entered (or $input or piped in) commands not kept on history list.\n");
      }
     break;
    case CO_PLIKEEPSRC:
     if (__verbose)
      { 
       __cv_msg(
        "  +pli_keep_source option removed - all PLI source access kept");
      }
     break;
    case CO_NOIACT:
     /* if no signal - then no interactive automatic but flag must be */
     /* off since still need callbacks for invoking signal handler */
     __no_iact = TRUE;
     if (__verbose)
      __cv_msg("  No interactive commands for this run - ^c causes finish.\n");
     break;
    case CO_SNAPSHOT:
     __intsig_prt_snapshot = TRUE;
     if (__verbose)
      __cv_msg(
       "  Activity snap shot printed upon interrupt signal (^c) termination");
     break;
    case CO_NOSPFY:
     __no_specify = TRUE;
     if (__verbose)
      __cv_msg("  Specify section(s) will be discarded before simulation.\n");
     break;
    case CO_NOTCHKS:
     __no_tchks = TRUE;
     if (__verbose)
      __cv_msg("  Timing checks will be discarded before simulation.\n");
     break;
    case CO_LIBNOCELL:
     __lib_are_cells = FALSE;
     if (__verbose)
      __cv_msg(
       "  Library modules will not be cells unless in `celldefine region.\n");
     break;
    /* just ignore if optimization not compiled in */
    case CO_OPT_DEBUG:
    case CO_OPT_SIM:
     __gfwarn(3121, olp->optfnam_ind, olp->optlin_cnt,
      " -O native assembly code simulation not enabled in this version.\n");
     break;
  
    default: __case_terr(__FILE__, __LINE__);
   }
   olp = olp->optlnxt; 
  }
 /* some option consistency checks */
 if (__intsig_prt_snapshot && !__no_iact)
  {
   __pv_warn(508,
     "+snapshot option no effect because +nointeractive (or +compiled_sim) not selected");
  }
}

/*
 * build input file list after freeing list for argumnts
 * know now done with arguments
 */
static void bld_inflist(void)
{
 register struct optlst_t *olp; 
 struct optlst_t *olp2; 

 /* must not free option files - need for mc scan args pli task ? */
 /* notice can copy because [args] and *none* same length */
 strcpy(__in_fils[0], "*none*");
 __last_optf = __last_inf;

 for (olp = __opt_hdr; olp != NULL; olp = olp->optlnxt) 
  {
   /* -1 are unrecognized +/- options, -2 is file used as arg, > 0 is opt */
   /* so 0 is verilog input file */ 
   if (olp->optnum == CO_F)
    {
     olp2 = olp->optlnxt;
     if (olp2 != NULL) olp = olp2;
     continue;
    }
   /* added markers automaticaly ignored */
   if (olp->optnum == 0) __add_infil(olp->opt);
  }
}

/*
 * add an in file
 * used first for -f command file and then reused for source and include
 * files
 * last inf is location of new file
 * fatal error if more than 64k in files
 */
extern void __add_infil(char *fnam)
{
 if (++__last_inf >= __siz_in_fils) __grow_infils(__last_inf);
 __in_fils[__last_inf] = __pv_stralloc(fnam);
}

/*
 * re allocate in fils pointer table 
 */
extern void __grow_infils(int32 new_last)
{
 int32 osize, nsize;

 /* file index must fit in word32 16 bits still */
 if (new_last >= 0xfffe)
  {
   __fterr(305,
    "too many comand -f , input, `include and library files (%d)",
    0xfffe);
  }
 /* re-alloc area */
 osize = __siz_in_fils*sizeof(char *); 
 __siz_in_fils *= 2;
 /* if hits fffd this will do a realloc that does nothing */
 if (__siz_in_fils >= 0xfffd) __siz_in_fils = 0xffff;
 nsize = __siz_in_fils*sizeof(char *); 
 /* notice realloc may move but works because ptrs to the strings */
 __in_fils = (char **) __my_realloc((char *) __in_fils, osize, nsize);
}
     
/*
 * extract SDF annotation file name and optional scope and save in list
 */
static void do_sdflocdef(char *sdfloc, char *optfnam, int32 oplin_cnt)
{
 register char *chp;
 struct sdfnamlst_t *sdfp, *sdfp2, *last_sdfp;
 char *chp2; 
 char fnam[IDLEN], pthnam[IDLEN]; 

 /* form is [file name]+[optional scope] */
 strcpy(pthnam, "");
 if ((chp = strchr(sdfloc, '+')) == NULL) strcpy(fnam, sdfloc);
 else  
  {
   if (chp == sdfloc || chp[-1] == '\\')
    {
     chp2 = chp + 1;
     for (;;)
      {
       if ((chp = strchr(chp2, '+')) == NULL)
        { strcpy(fnam, sdfloc); goto sep_done; }

       if (chp[-1] != '\\') goto bld_both;
       chp2 = chp + 1;
      }
    }
bld_both:
   strncpy(fnam, sdfloc, chp - sdfloc);
   fnam[chp - sdfloc] = '\0';  
   strcpy(pthnam, ++chp);
  }
  
sep_done:
 sdfp = (struct sdfnamlst_t *) __my_malloc(sizeof(struct sdfnamlst_t));
 sdfp->fnam = __pv_stralloc(fnam); 
 sdfp->scopnam = __pv_stralloc(pthnam);  
 sdfp->optfnam = __pv_stralloc(optfnam);
 sdfp->opt_slcnt = oplin_cnt;
 sdfp->sdfnamnxt = NULL;
 last_sdfp = NULL;

 /* put on end since must do in order */
 for (sdfp2 = __sdflst; sdfp2 != NULL; sdfp2 = sdfp2->sdfnamnxt)
  last_sdfp = sdfp2;
 if (last_sdfp == NULL) __sdflst = sdfp; else last_sdfp->sdfnamnxt = sdfp;
 if (strcmp(sdfp->scopnam, "") == 0) 
  {
   if (__verbose)
    {
     __cv_msg(
      "  Delay annotation values read from SDF 3.0 file \"%s\" design context.\n",
      sdfp->fnam); 
    }
  }
 else
  {
   if (__verbose)
    {  
     __cv_msg(
      "  Delay annotation values read from SDF 3.0 file \"%s\" scope context %s.\n",
     sdfp->fnam, sdfp->scopnam); 
    }
  }
}

/*
 * process a +define argument and do the define and emit verbose msg 
 *
 * know defarg starts just after +define+
 */
static void do_cmdmacdef(char *defarg, struct optlst_t *olp) 
{
 int32 slen; 
 char *chp, *chp2, *chp3;
 char optnam[IDLEN], optval[IDLEN], s1[3*IDLEN];

 for (chp = defarg;;)
  {
   /* know chp pointer to char after current + */ 
   /* separate off string to next '+' */
   if ((chp2 = strchr(chp, '+')) == NULL) { strcpy(s1, chp); goto got_def; } 

got_plus:
   chp2--;
   /* if escaped +, keep looking until find end non escaped */
   if (*chp2 == '\\')
    {
     chp2++; chp2++;
     chp3 = chp2;
     if ((chp2 = strchr(chp3, '+')) == NULL)
      { strcpy(s1, chp); goto got_def; }
     goto got_plus;
    }
   /* nove back to point to + */
   chp2++;
   strncpy(s1, chp, chp2 - chp);
   s1[chp2 - chp] = '\0'; 

got_def:
   /* now have define in s1 with chp2 either name nil */
   optnam[0] = '`'; 
   if ((chp = strchr(s1, '=')) == NULL)
    {
     if (strcmp(s1, "") == 0)
      {
bad_nam:
       __gferr(962, olp->optfnam_ind, olp->optlin_cnt,
        "+define+[name]+ ... or +define+[name]=[value] option empty [name] illegal");
       return;
      }
     strcpy(&(optnam[1]), s1);
     if (__verbose)
      __cv_msg("  `define of %s (no value form) added from command option.\n",
       s1); 
     __do_macdefine(optnam, "");
    }
   else
    {
     strncpy(&(optnam[1]), s1, chp - s1); 
     /* notice plus 1 because 1st char of optnam already filled */
     optnam[chp - s1 + 1] = '\0';  
     if (strcmp(optnam, "`") == 0) goto bad_nam;
     chp++;
     if (*chp == '\\' && *chp == '"') chp++;
     strcpy(optval, chp);
     slen = strlen(optval);
     /* if escaped " remove escape */
     if (slen > 1)
      {
       if (optval[slen - 2] == '\\' && optval[slen - 1] == '"')
        { optval[slen - 2] = optval[slen - 1]; optval[slen - 1] = '\0'; }
      }
     if (__verbose)
      __cv_msg("  `define of %s value %s added from command option.\n",
       &(optnam[1]), optval); 
     __do_macdefine(optnam, optval);
    }
   /* chp2 either points to NULL or ending '+' */
   /* end can be NULL or final '+' */
   if (chp2 == NULL) break;
   chp2++;
   if (*chp2 == '\0') break;
   chp = chp2;
  }
}

/*
 * build (add to) +incdir path table
 *
 * concatenate on end (in option order) for +incdir+ list
 * if path does not end in / one is added - `include cated on end
 * and attempt is made to open that path
 */
static int32 bld_incdtab(char *incdirptr, struct optlst_t *olp) 
{
 int32 len;
 char *cp, *cpbg, *chp2;
 char s1[IDLEN], s2[IDLEN];

 len = strlen(incdirptr);
 if (len == 0)
  {
   __gfwarn(505, olp->optfnam_ind, olp->optlin_cnt,
    "+incdir+ option missing include file path name list - option ignored");
   return(FALSE);
  }

 /* if optional ending plus left out - add here */
 if (incdirptr[len - 1] != '+')
  {
   chp2 = s2;
   strcpy(chp2, incdirptr);
   chp2[len] = '+';
   chp2[len + 1] = '\0';
  }
 else chp2 = incdirptr;

 for (cpbg = chp2, len = 0;;)
  {
   /* notice - if no + will just be one - this is internal fmt screw up */
   if ((cp = strchr(cpbg, '+')) == NULL || (len = cp - cpbg) >= IDLEN - 1)
    __misc_terr(__FILE__, __LINE__);

   if (++__last_incdir >= MAXINCDIRS)
    __pv_terr(306, "+incdir+ option - too many include file paths (%d)",
     MAXINCDIRS);
   if (len > 0)
    {
     strncpy(s1, cpbg, len);
     if (s1[len - 1] != '/') { s1[len] = '/'; len++; }
     s1[len] = '\0';
     __incdirs[__last_incdir] = __pv_stralloc(s1);
    }
   else
    {
     __gfwarn(514, olp->optfnam_ind, olp->optlin_cnt,
      "+incdir+ path list contains empty (++) path - just skipping"); 
     __last_incdir--;
    }
   cpbg = ++cp;
   if (*cpbg == '\0') break;
  }
 return(TRUE);
}

/*
 * process +loadpli1 or +loadvpi PLI dynamic library and bootstrap load arg
 *
 * formats exactly:
 *   +loadpli1=[.so lib]:[boostrap routines (, sep - none legal)]
 *   +loadvpi=[.so lib]:[boostrap routines (, sep - none legal)]
 *
 * LOOKATME - option must be contiguous - some shells may require
 * quoting on command line (not in -f files) but quotes stripped by shell 
 */
static struct loadpli_t *bld_loadpli_lbs(char *loadpliptr,
 struct optlst_t *olp, int32 is_pli1)
{
 int32 len;
 char *cp;
 char lbnam[IDLEN], rnams[IDLEN], onam[RECLEN];
 struct loadpli_t *ldp;

 if (is_pli1) strcpy(onam, "+loadpli1="); else strcpy(onam, "+loadvpi=");
 len = strlen(loadpliptr);
 if (len == 0)
  {
   __gfwarn(505, olp->optfnam_ind, olp->optlin_cnt,
    "%s option missing [dynamic lib]:[bootstrap routine list] pair - option ignored",
    onam);
   return(NULL);
  }
 /* if dynamic library missing - use dlsym look up in all other libs */
 if (loadpliptr[0] == ':')
  { 
   /* library missing - ok if boot routine defined in some other dyn lib */
   __gfwarn(505, olp->optfnam_ind, olp->optlin_cnt,
    "%s [dynamic lib] omitted - required because mixed static/dynamic not supported - option ignored",
    onam);
   return(NULL);
  }
 for (cp = &(loadpliptr[len - 1]);;)
  {
   if (*cp == ':') break;
   if (--cp == loadpliptr)
    {
     __gfwarn(505, olp->optfnam_ind, olp->optlin_cnt,
    "%s [dynamic lib] and [bootstrap routine] ':' separator missing - option ignored",
     onam);
     return(NULL);
    }
  }
 strncpy(lbnam, loadpliptr, cp - loadpliptr);
 lbnam[cp - loadpliptr] = '\0'; 
 cp++;
 strcpy(rnams, cp);
 /* FIXME ??? - think should allow omitted lib and static and dynamic  */
 if (strcmp(rnams, "") == 0)
  {
   /* missing bootstrap ok since other load pli option can supply boostrap */ 
   __gfwarn(505, olp->optfnam_ind, olp->optlin_cnt,
    "%s [bootstrap routine] missing - ok since not required", onam);
   return(NULL);
  }

 /* LOOKATME - maybe should remove extra ' or " */
 /* fill the load pli record */
 ldp = (struct loadpli_t *) __my_malloc(sizeof(struct loadpli_t));
 if (is_pli1) ldp->pli1_option = TRUE; else ldp->pli1_option = FALSE;
 ldp->libnam = __pv_stralloc(lbnam);
 ldp->load_plinxt = NULL;
 if (!bld_boot_rout_list(ldp, rnams))
  {
   __my_free((char *) ldp, sizeof(struct loadpli_t));
   return(NULL);   
  }

 if (is_pli1)
  {
   /* need separate lists since pli1 can add user systf tfcell elements */
   if (__pli1_dynlib_hd == NULL)
    { __pli1_dynlib_hd = __pli1_dynlib_end = ldp; }
   else
    {
     /* add to end - libs must be processed in option order */  
     __pli1_dynlib_end->load_plinxt = ldp;
     __pli1_dynlib_end = ldp;
    }
   return(ldp);
  }

 /* build the vpi list */
 if (__vpi_dynlib_hd == NULL) { __vpi_dynlib_hd = __vpi_dynlib_end = ldp; }
 else
  {
   /* add to end - libs must be processed in option order */  
   __vpi_dynlib_end->load_plinxt = ldp;
   __vpi_dynlib_end = ldp;
  }
 return(ldp);
}

/*
 * routine to check 
 */
static int32 bld_boot_rout_list(struct loadpli_t *ldp, char *rnams)
{
 int32 len;
 struct dynboot_t *dnbp, *last_dnbp;
 char *chp2, *chp;
 char s1[RECLEN];

 /* first check for one routine name or , separated list - no spaces */  
 if (!check_rnam_str(rnams)) return(FALSE);

 last_dnbp = NULL;
 chp2 = rnams;
 for (chp = rnams;; chp++)
  {
   if (*chp == ',' || *chp == '\0')
    {
     len = chp - chp2;
     strncpy(s1, chp2, len);
     s1[len] = '\0';
     dnbp = (struct dynboot_t *) __my_malloc(sizeof(struct dynboot_t));
     dnbp->bootrout_nam = __pv_stralloc(s1);
     dnbp->dynu.vpi_rout = NULL;
     dnbp->ret_veriusertf = NULL;
     dnbp->dynbootnxt = NULL;

     if (last_dnbp == NULL) ldp->dynblst = dnbp;
     else last_dnbp->dynbootnxt = dnbp;
     last_dnbp = dnbp;

     if (*chp == '\0') break;
     chp2 = chp;
     chp2++;
    }
  }
 return(TRUE);
}

/*
 * check to make sure boot routine has legal no space , sep list
 */
static int32 check_rnam_str(char *rnams)
{
 int32 len;
 char *chp, *chp2;

 if (strlen(rnams) == 1 && rnams[0] == ',') return(FALSE);
 chp2 = rnams;
 for (chp = rnams; *chp != '\0'; chp++)
  {
   if (isspace(*chp)) return(FALSE);
   if (*chp == '.') return(FALSE);
   if (*chp == ',')
    {
     len = chp - chp2;
     if (len == 0) return(FALSE);
     chp2 = chp + 1;
    }
  }
 chp--;
 if (*chp == ',') return(FALSE);
 return(TRUE);
}

/*
 * build (add to) lib. ext. table
 * concatenate on end (in option order) for +libext+ list
 *
 * LOOKATME - following XL only one +libext+ option allowed - maybe should
 * allow more (this routine never called if __last lbx > -1)
 */
static int32 bld_lbxtab(char *lbxptr, struct optlst_t *olp)
{
 int32 len;
 char *cp, *cpbg, *chp2;
 char s1[IDLEN], s2[IDLEN];

 len = strlen(lbxptr);
 if (len == 0)
  {
   __gfwarn(505, olp->optfnam_ind, olp->optlin_cnt,
    "+libext+ option missing libary extension list - ignored");
   return(FALSE);
  }
 
 /* if optional ending plus left out - add here */
 if (lbxptr[len - 1] != '+')
  { chp2 = s2; strcpy(chp2, lbxptr); chp2[len] = '+'; chp2[len + 1] = '\0'; }
 else chp2 = lbxptr;

 for (cpbg = chp2, len = 0;;)
  {
   /* notice - if no + will just be one - this is internal fmt screw up */
   if ((cp = strchr(cpbg, '+')) == NULL || (len = cp - cpbg) >= IDLEN - 1)
    __misc_terr(__FILE__, __LINE__);

   if (++__last_lbx >= MAXLBEXTS)
    {
     __pv_terr(306, "+libext+ option - too many library suffixes (%d)",
      MAXLBEXTS);
    }
   /* notice empty is legal extension - name as is */
   if (len > 0) strncpy(s1, cpbg, len);
   s1[len] = '\0';
   __lbexts[__last_lbx] = __pv_stralloc(s1);
   cpbg = ++cp;
   if (*cpbg == '\0') break;
  }
 return(TRUE);
}

/*
 * add one library file to list
 */
static void add_lbfil(char *fnam, char tlet)
{
 struct vylib_t *vyp;

 vyp = alloc_vylib(fnam);
 if (tlet == 'y') __num_ylibs++;
 else if (tlet == 'v') __num_vlibs++;
 else __case_terr(__FILE__, __LINE__);
 vyp->vytyp = tlet;
 if (__vyhdr == NULL) __vyhdr = vyp; else __end_vy->vynxt = vyp;
 __end_vy = vyp;
}

/*
 * allocate a vylib entry
 */
static struct vylib_t *alloc_vylib(char *nam)
{
 struct vylib_t *vyp;

 vyp = (struct vylib_t *) __my_malloc(sizeof(struct vylib_t));
 vyp->vyu.vyfnam = __pv_stralloc(nam);
 vyp->vyfnam_ind = 0;
 vyp->vytyp = ' ';
 vyp->yfiles = NULL;
 vyp->vynxt = NULL;
 return(vyp);
}

struct warnsup_t {
  int32 rngbeg;
  int32 rngend;
};

struct warnsup_t warnsuptab[] = {
 /* 1 to 399 - fatal errors */
 /* 400 to 679 suppressable normal informs and warnings */
 { 400, 679 },
 /* 680 to 1399 normal errors */ 
 /* iact errors 1400 to 1499 can be suppressed */
 { 1400, 1499 },
 /* 1500 to 1599 are SDF errors - not suppressable */
 /* 1600-1699 are iact warnings - can be suppressed */
 { 1600, 1699 },
 /* 1700 to 1999 are PLI errors */
 /* 2000 to 2199 are PLI warns and informs */
 { 2000, 2199 },
 /* 2200 to 2499 are vendor specific warns and informs */
 { 2200, 2499 },
 /* 2500 to 2599 are code gen warns and informs */
 { 2500, 2599 },

 /* 2600 - 2899 vendor specific errors or unused - not suppressable */
 /* 2900 - 2999 optimizer errors or unused - not suppressable */
 /* 3000 to 3099 are new Verilog 2000 informs - suppressable */
 /* 3100 to 3499 are new Verilog 2000 warns - suppressable */
 { 3000, 3399 },
 /* 3400 to 4000 Verilog 2000 errors - not suppressable */ 
 { -1, -1 }
};

/*
 * return T if error message is suppressable (i.e. inform or warn)
 */
extern int32 __enum_is_suppressable(int32 errnum)
{
 register int32 i;

 for (i = 0;; i++)
  {
   if (warnsuptab[i].rngbeg == -1) break;

   if (errnum >= warnsuptab[i].rngbeg && errnum <= warnsuptab[i].rngend)
    return(TRUE);
  }
 return(FALSE);
}

/*
 * add each +num+ num to table of suppressed warnings (or in 1) 
 * this returns F on error 
 * know if + at end left off, will have been added
 */
static int32 add_suppwarn(char *pluslst, struct optlst_t *olp) 
{
 int32 ernum, len, noerr;
 char *cp, *cpbg;
 char s1[IDLEN];

 cpbg = &(pluslst[16]);
 for (noerr = TRUE, len = 0;;)
  {
   if ((cp = strchr(cpbg, '+')) == NULL || (len = cp - cpbg) >= IDLEN)
    {
     __misc_terr(__FILE__, __LINE__);
     return(FALSE);
    }
   strncpy(s1, cpbg, len);
   s1[len] = '\0';
   if (sscanf(s1, "%d", &ernum) != 1)
    {
bad_num:
     __gfwarn(513, olp->optfnam_ind, olp->optlin_cnt,
      "+suppress_warnings number %s not warn, not inform, or out of range - ignored",
      s1); 
     noerr = FALSE;
     goto nxt_msg;
    }
   if (!__enum_is_suppressable(ernum)) goto bad_num;

   __wsupptab[ernum/WBITS] |= (1 << (ernum % WBITS)); 

nxt_msg:
   cpbg = ++cp;
   if (*cpbg == '\0') break;
  }
 return(noerr);
}

#include "gpl_wrhelp.h"

/*
 * write the help message to standard output and log file
 */
static void wrhelp(void)
{
 int32 i;

 for (i = 0; *txhelp[i] != '\0'; i++) __crit_msg("%s\n", txhelp[i]);
}

/*
 * BUILT IN INITIALIZATTON ROUTINES
 */

/* built-in Verilog gates */
/* gateid is, if has corresponding operator gate id, else G_ symbol */
static struct primtab_t prims[] = {
 /* special gate for continuous assign */
 /* notice since starts with number can never be found accidently */
 { G_ASSIGN, GC_LOGIC, NULL, "1-bit-assign" },
 { G_BITREDAND, GC_LOGIC , NULL, "and" },
 { G_BUF, GC_LOGIC, NULL, "buf" },
 { G_BUFIF0, GC_BUFIF, NULL, "bufif0" },
 { G_BUFIF1, GC_BUFIF, NULL, "bufif1" },
 { G_CMOS, GC_CMOS, NULL, "cmos" },
 { G_NAND, GC_LOGIC, NULL, "nand" },
 { G_NMOS, GC_MOS, NULL, "nmos" },
 { G_NOR, GC_LOGIC, NULL, "nor" },
 { G_NOT, GC_LOGIC, NULL, "not" },
 { G_NOTIF0, GC_BUFIF, NULL, "notif0" },
 { G_NOTIF1, GC_BUFIF, NULL, "notif1" },
 { G_BITREDOR, GC_LOGIC, NULL, "or" },
 { G_PMOS, GC_MOS, NULL, "pmos" },
 /* next 2 initialized so can drive fi>1 wires but do not exist */
 { G_PULLDOWN, GC_PULL, NULL, "pulldown" },
 { G_PULLUP, GC_PULL, NULL, "pullup" },
 { G_RCMOS, GC_CMOS, NULL, "rcmos" },
 { G_RNMOS, GC_MOS, NULL, "rnmos" },
 { G_RPMOS, GC_MOS, NULL, "rpmos" },
 { G_RTRAN, GC_TRAN, NULL, "rtran" },
 { G_RTRANIF0, GC_TRANIF, NULL, "rtranif0" },
 { G_RTRANIF1, GC_TRANIF, NULL, "rtranif1" },
 { G_TRAN, GC_TRAN, NULL, "tran" },
 { G_TRANIF0, GC_TRANIF, NULL, "tranif0" },
 { G_TRANIF1, GC_TRANIF, NULL, "tranif1" },
 { G_BITREDXOR, GC_LOGIC, NULL, "xor" },
 { G_REDXNOR, GC_LOGIC, NULL, "xnor" },
};
#define NPRIMS (sizeof(prims) / sizeof(struct primtab_t))

static void init_modsymtab(void)
{
 __cur_fnam_ind = 0;

 __cur_fnam = __in_fils[__cur_fnam_ind];
 __lin_cnt = 0;
 /* disguised trigger for expired copy expiration */
 __slotend_action = 0;
 /* this symbol table is not a symbol table of any symbol */
 __modsyms = __alloc_symtab(FALSE);
 __sym_addprims();
}

/*
 * add primitives to module type name symbol table - separate name space
 */
extern void __sym_addprims(void)
{
 register int32 i;
 struct sy_t *syp;
 struct tnode_t *tnp;
 struct primtab_t *primp;

 for (i = 0, primp = prims; i < NPRIMS; i++, primp++)
  {
   /* spcial 1 bit continuous assign primitive - not searched in table */
   tnp = __vtfind(primp->gatnam, __modsyms);
   /* err if inconsistent primitive table */
   if (!__sym_is_new) __misc_terr(__FILE__, __LINE__);
   __add_sym(primp->gatnam, tnp);
   (__modsyms->numsyms)++;
   syp = tnp->ndp;
   syp->sytyp = SYM_PRIM;
   syp->sydecl = TRUE;
   syp->el.eprimp = primp;

   /* need global when 1 bit continuous assigns converted */
   if (primp->gateid == G_ASSIGN) __ca1bit_syp = syp;
  }
}

/*
 * predefined built-in system tasks
 *
 * system task arguments are defined by fixup checking code and follow
 * no pattern 
 */
static struct systsk_t vsystasks[] = {
 { STN_CLEARDEBUG, "$cleardebug" },
 { STN_CLEAREVTRACE, "$clearevtrace" },
 { STN_CLEARTRACE, "$cleartrace" },
 { STN_DEFINEGROUPWAVES, "$define_group_waves" },
 { STN_DISPLAY, "$display" },
 { STN_DISPLAYB, "$displayb" },
 { STN_DISPLAYH, "$displayh" },
 { STN_DISPLAYO, "$displayo" },
 { STN_DUMPALL, "$dumpall" },
 { STN_DUMPFILE, "$dumpfile" },
 { STN_DUMPFLUSH, "$dumpflush" },
 { STN_DUMPLIMIT, "$dumplimit" },
 { STN_DUMPOFF, "$dumpoff" },
 { STN_DUMPON, "$dumpon" },
 { STN_DUMPVARS, "$dumpvars" },
 { STN_FCLOSE, "$fclose" },
 { STN_FDISPLAY, "$fdisplay" },
 { STN_FDISPLAYB, "$fdisplayb" },
 { STN_FDISPLAYH, "$fdisplayh" },
 { STN_FDISPLAYO, "$fdisplayo" },
 { STN_FINISH, "$finish" },
 { STN_FLUSHLOG, "$flushlog" }, 
 { STN_FMONITOR , "$fmonitor" },
 { STN_FMONITORB, "$fmonitorb" },
 { STN_FMONITORH, "$fmonitorh" },
 { STN_FMONITORO, "$fmonitoro" },
 { STN_FREEZEWAVES, "$freeze_waves" },
 { STN_FSTROBE, "$fstrobe" },
 { STN_FSTROBEB, "$fstrobeb" },
 { STN_FSTROBEH, "$fstrobeh" },
 { STN_FSTROBEO, "$fstrobeo" },
 { STN_FWRITE, "$fwrite" },
 { STN_FWRITEB, "$fwriteb" },
 { STN_FWRITEH, "$fwriteh" },
 { STN_FWRITEO, "$fwriteo" },
 { STN_GRREMOTE, "$gr_remote" },
 { STN_GRREGS, "$gr_regs" },
 { STN_GRSYNCHON, "$gr_synchon" },
 { STN_GRWAVES, "$gr_waves" },
 { STN_HISTORY, "$history" },
 { STN_INCSAVE, "$incsave" },
 { STN_INPUT, "$input" },
 { STN_KEEPCMDS, "$keepcommands" },
 { STN_KEY, "$key" },
 { STN_LIST, "$list" },
 { STN_LOG, "$log" },
 { STN_MEMUSE, "$memuse" },
 { STN_MONITOR, "$monitor" },
 { STN_MONITORB, "$monitorb" },
 { STN_MONITORH, "$monitorh" },
 { STN_MONITORO, "$monitoro" },
 { STN_MONITOROFF, "$monitoroff" },
 { STN_MONITORON, "$monitoron" },
 { STN_NOKEEPCMDS, "$nokeepcommands" },
 { STN_NOKEY, "$nokey" },
 { STN_NOLOG, "$nolog" },
 { STN_PRINTTIMESCALE, "$printtimescale" },
 { STN_PSWAVES, "$ps_waves" },
 { STN_Q_ADD, "$q_add" },
 { STN_Q_EXAM, "$q_exam" },
 { STN_Q_INITIALIZE, "$q_initialize" },
 { STN_Q_REMOVE, "$q_remove" },
 { STN_READMEMB, "$readmemb" },
 { STN_READMEMH, "$readmemh" },
 { STN_RESET, "$reset" },
 { STN_RESTART, "$restart" },
 { STN_SAVE, "$save" },
 { STN_SCOPE, "$scope" },
 { STN_SDF_ANNOTATE, "$sdf_annotate" },
 { STN_SETDEBUG, "$setdebug" },
 { STN_SETEVTRACE, "$setevtrace" },
 { STN_SETTRACE, "$settrace" },
 { STN_SHOWALLINSTANCES, "$showallinstances" },
 { STN_SHOWEXPANDEDNETS, "$showexpandednets" },
 { STN_SHOWSCOPES, "$showscopes" },
 { STN_SHOWVARIABLES, "$showvariables" },
 { STN_SHOWVARS, "$showvars" },
 { STN_SNAPSHOT, "$snapshot" },
 { STN_SREADMEMB, "$sreadmemb" },
 { STN_SREADMEMH, "$sreadmemh" },
 { STN_STOP, "$stop" },
 { STN_STROBE, "$strobe" },
 { STN_STROBEB, "$strobeb" },
 { STN_STROBEH, "$strobeh" },
 { STN_STROBEO, "$strobeo" },
 { STN_SUPWARNS, "$suppress_warns" },
 { STN_ALLOWWARNS, "$allow_warns" },
 { STN_SYSTEM, "$system" },
 { STN_TIMEFORMAT, "$timeformat" },
 { STN_TRACEFILE, "$tracefile" },
 { STN_WRITE, "$write" },
 { STN_WRITEB, "$writeb" },
 { STN_WRITEH, "$writeh" },
 { STN_WRITEO, "$writeo" },
 /* AIV 09/05/03 - added for fileio - only one that is sys task */
 { STN_FFLUSH, "$fflush"},
 /* SJM 09/05/03 - also add the new fileio string forms - see 2001 LRM */
 /* SJM 05/21/04 - these are sys tasks not functs (but LRM inconsistent) */
 { STN_SWRITE, "$swrite" },
 { STN_SWRITEB, "$swriteb" },
 { STN_SWRITEH, "$swriteh" },
 { STN_SWRITEO, "$swriteo" },
 /* same as $swrite except 2nd arg (can be var) must be only format string */
 { STN_SFORMAT, "$sformat" },
 /* patches for getting models to compile pli tasks -- */
 /* STN_LAI_INPUTS, "$lai_inputs", */
 /* STN_LAI_OUTPUTS, "$lai_outputs", */
 /* STN_ERRORNTL, "$errorNTL", */
 /* STN_SUSPENDCHECK, "$suspendCheck", */
 { 0, "" }
};

/* predefined built-in system functions */
/* mostly alphabetical but for now really does not need to be */
/* and new transcendentals at end */ 
struct sysfunc_t __vsysfuncs[] = {
 /* { internal num., ret. type, signed (1), type, returned width, name } */
 { STN_BITSTOREAL, N_REAL, 1, SYSF_BUILTIN, REALBITS, "$bitstoreal"},
 { STN_COUNT_DRIVERS, N_REG, 0, SYSF_BUILTIN, WBITS, "$countdrivers"},
 { STN_DIST_CHI_SQUARE, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_chi_square"},
 { STN_DIST_ERLANG, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_erlang"},
 { STN_DIST_EXPONENTIAL, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_exponential"},
 { STN_DIST_NORMAL, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_normal"},
 { STN_DIST_POISSON, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_poisson"},
 { STN_DIST_T, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_t"},
 { STN_DIST_UNIFORM, N_REG, 1, SYSF_BUILTIN, WBITS, "$dist_uniform"},
 { STN_FOPEN, N_REG, 1, SYSF_BUILTIN, WBITS, "$fopen"},
 /* width is really width of argument memory */
 /* only allow on rhs of cont. assign */
 { STN_GETPATTERN, N_REG, 0, SYSF_BUILTIN, WBITS, "$getpattern"},
 { STN_ITOR, N_REAL, 1, SYSF_BUILTIN, REALBITS, "$itor"},
 { STN_Q_FULL, N_REG, 0, SYSF_BUILTIN, WBITS, "$q_full"},
 { STN_RANDOM, N_REG, 1, SYSF_BUILTIN, WBITS, "$random"},
 { STN_REALTIME, N_REAL, 1, SYSF_BUILTIN, REALBITS , "$realtime"},
 /* this codes the real as 64 bit and b part */
 { STN_REALTOBITS, N_REG, 0, SYSF_BUILTIN, 64, "$realtobits"},
 { STN_RESET_COUNT, N_REG, 0, SYSF_BUILTIN, WBITS, "$reset_count" },
 { STN_RESET_VALUE, N_REG, 1, SYSF_BUILTIN, WBITS, "$reset_value"},
 { STN_RTOI, N_REG, 1, SYSF_BUILTIN, WBITS, "$rtoi"},
 /* scale takes as argument the module whose scale to return */
 { STN_SCALE, N_REAL, 0, SYSF_BUILTIN, REALBITS, "$scale"},
 /* SJM 10/01/03 - special conversion to signed - arg size is ret size */
 { STN_SIGNED, N_REG, 1, SYSF_BUILTIN, 0, "$signed" }, 
 { STN_STIME, N_REG, 0, SYSF_BUILTIN, WBITS, "$stime"},
 { STN_TESTPLUSARGS, N_REG, 0, SYSF_BUILTIN, WBITS, "$test$plusargs" },
 { STN_SCANPLUSARGS, N_REG, 0, SYSF_BUILTIN, WBITS, "$scan$plusargs" },
 { STN_VALUEPLUSARGS, N_REG, 0, SYSF_BUILTIN, WBITS, "$value$plusargs" },
 { STN_TIME, N_TIME, 0, SYSF_BUILTIN, TIMEBITS, "$time"},
 /* cver system function extensions */
 { STN_STICKSTIME, N_REG, 0, SYSF_BUILTIN, WBITS, "$stickstime"},
 { STN_TICKSTIME, N_TIME, 0, SYSF_BUILTIN, TIMEBITS, "$tickstime"},
 /* SJM 10/01/03 - special conversion to signed - arg size is ret size */
 { STN_UNSIGNED, N_REG, 0, SYSF_BUILTIN, 0, "$unsigned" }, 
 /* new transcendental functions */
 { STN_COS, N_REAL, 1, SYSF_BUILTIN, WBITS, "$cos"},
 { STN_SIN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$sin"},
 { STN_TAN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$tan"},
 { STN_ACOS, N_REAL, 1, SYSF_BUILTIN, WBITS, "$acos"},
 { STN_ASIN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$asin"},
 { STN_ATAN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$atan"},
 { STN_ATAN2, N_REAL, 1, SYSF_BUILTIN, WBITS, "$atan2"},
 { STN_COSH, N_REAL, 1, SYSF_BUILTIN, WBITS, "$cosh"},
 { STN_SINH, N_REAL, 1, SYSF_BUILTIN, WBITS, "$sinh"},
 { STN_TANH, N_REAL, 1, SYSF_BUILTIN, WBITS, "$tanh"},
 { STN_ACOSH, N_REAL, 1, SYSF_BUILTIN, WBITS, "$acosh"},
 { STN_ASINH, N_REAL, 1, SYSF_BUILTIN, WBITS, "$asinh"},
 { STN_ATANH, N_REAL, 1, SYSF_BUILTIN, WBITS, "$atanh"},
 /* LOOKATME - think this should be removed - other ways to get sign */
 /* next 2 new transcendental except returns int32 */
 { STN_SGN, N_REG, 1, SYSF_BUILTIN, WBITS, "$sgn"},
 { STN_INT, N_REG, 1, SYSF_BUILTIN, WBITS, "$int"},
 { STN_LN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$ln"},
 { STN_LOG10, N_REAL, 1, SYSF_BUILTIN, WBITS, "$log10"},
 { STN_ABS, N_REAL, 1, SYSF_BUILTIN, WBITS, "$abs"},
 { STN_POW, N_REAL, 1, SYSF_BUILTIN, WBITS, "$pow"},
 { STN_SQRT, N_REAL, 1, SYSF_BUILTIN, WBITS, "$sqrt"},
 { STN_EXP, N_REAL, 1, SYSF_BUILTIN, WBITS, "$exp"},
 { STN_MIN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$min"},
 { STN_MAX, N_REAL, 1, SYSF_BUILTIN, WBITS, "$max"},
 { STN_HSQRT, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hsqrt" },
 { STN_HPOW, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hpow" },
 { STN_HPWR, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hpwr" },
 { STN_HLOG, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hlog" },
 { STN_HLOG10, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hlog10" },
 { STN_HDB, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hdb" },
 { STN_HSIGN, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hsign" },
 { STN_HYPOT, N_REAL, 1, SYSF_BUILTIN, WBITS, "$hypot" },
 /* AIV 09/05/03 - add the fileio sy funcs */
 { STN_FGETC, N_REG, 1, SYSF_BUILTIN, WBITS, "$fgetc" },
 { STN_UNGETC, N_REG, 1, SYSF_BUILTIN, WBITS, "$ungetc" },
 { STN_FGETS, N_REG, 1, SYSF_BUILTIN, WBITS, "$fgets" },
 { STN_FTELL, N_REG, 1, SYSF_BUILTIN, WBITS, "$ftell" },
 { STN_REWIND, N_REG, 1, SYSF_BUILTIN, WBITS, "$rewind" },
 { STN_FSEEK, N_REG, 1, SYSF_BUILTIN, WBITS, "$fseek" },
 { STN_FERROR, N_REG, 1, SYSF_BUILTIN, WBITS, "$ferror" },
 { STN_FREAD, N_REG, 1, SYSF_BUILTIN, WBITS, "$fread" },
 { STN_FSCANF, N_REG, 1, SYSF_BUILTIN, WBITS, "$fscanf" },
 { STN_SSCANF, N_REG, 1, SYSF_BUILTIN, WBITS, "$sscanf" },
 { 0, 0, 0, 0, 0, "" }
};

/*
 * initialize the system task symbol table
 * this is special symbol table used to find module and primitives
 * not in normal symbol table stack 
 */
static void init_stsymtab(void)
{
 register int32 i;
 struct systsk_t *stbp;
 struct sysfunc_t *sfbp;

 /* system symbols handled specially - only tasks and funcs */
 /* this sets symbol table to emtpy also */
 /* not a symbol table of any symbol */
 __syssyms = __alloc_symtab(FALSE);
 __cur_fnam_ind = 0;
 __cur_fnam = __in_fils[__cur_fnam_ind];
 __lin_cnt = 0;

 /* add system tasks */
 /* then normal system tasks - var. (or unknown) args */
 for (i = 0;; i++)
  {
   stbp = &(vsystasks[i]);
   if (strcmp(stbp->stsknam, "") == 0) break;
   add_systsksym(stbp);
  }
 /* add system functions */
 for (i = 0;; i++)
  {
   sfbp = &(__vsysfuncs[i]);
   if (strcmp(sfbp->syfnam, "") == 0) break;
   add_sysfuncsym(sfbp);
  }

 /* SJM 07/08/02 - setup both old veriusertfs systf and new +loadpli1 */
 __setup_veriusertf_systfs();


 /* SJM 07/08/02 - handle all +loadvpi option dynamic lib loading */
 __process_pli_dynamic_libs(__vpi_dynlib_hd);

 /* because variable number of vpi_ systf (dynamic registering), must add */
 /* tf_ first, vpi_ registered systfs one after last tf_ */
 __call_vlog_startup_procs();
}

/*
 * add system tasks symbol to syssyms table
 */
static void add_systsksym(struct systsk_t *stbp)
{
 struct tnode_t *tnp;
 struct sy_t *syp;

 tnp = __vtfind(stbp->stsknam, __syssyms);
 /* built in system task table mis-coded */ 
 if (!__sym_is_new) __misc_terr(__FILE__, __LINE__);
 __add_sym(stbp->stsknam, tnp);
 (__syssyms->numsyms)++;
 syp = tnp->ndp;
 syp->sytyp = SYM_STSK;
 syp->sydecl = TRUE;
 syp->sylin_cnt = 0;
 syp->syfnam_ind = 0;
 syp->el.esytbp = stbp;
}

/*
 * add system function to system symbol symbol table
 */
static void add_sysfuncsym(struct sysfunc_t *sfbp)
{
 struct tnode_t *tnp;
 struct sy_t *syp;

 tnp = __vtfind(sfbp->syfnam, __syssyms);
 /* built in system function table mis-coded */ 
 if (!__sym_is_new) __misc_terr(__FILE__, __LINE__);
 __add_sym(sfbp->syfnam, tnp);
 (__syssyms->numsyms)++;
 syp = tnp->ndp;
 syp->sytyp = SYM_SF;
 syp->sydecl = TRUE;
 syp->sylin_cnt = 0;
 syp->syfnam_ind = 0;
 syp->el.esyftbp = sfbp;
}

/*
 * INPUT FILE PREPARATION ROUTINES
 */

/*
 * prepare the input file stack (know input files infiles[0:__last_inf])
 * macro expansions and `include put on top of stack
 * this puts one open file struct on tos and open 1st file with guts
 */
static void prep_vflist(void)
{
 register int32 fi;

 /* no files since 0  and 1 are special */
 if (__last_inf == __last_optf)
  __pv_terr(301, "no Verilog input files specified");
 __last_lbf = __last_inf;

 /* set open file/macro exp./include stack to empty */
 for (fi = 0; fi < MAXFILNEST; fi++) __vinstk[fi] = NULL;
 __vin_top = -1;
 __lasttoktyp = UNDEF;
 __last_attr_prefix = FALSE;
 /* this builds the empty top of stack entry */
 __push_vinfil();
 /* fill with 1st file and open it */
 /* __in_fils[0] is no file "none" */
 /* set to one after last option file */
 __cur_infi = __last_optf + 1;
 if (!__open_sfil())
  __pv_terr(301, "no Verilog input - all files empty or cannot be opened");
}


/*
 * try to open the next input source file and fill top of stack with its info
 * file must be openable and have contents
 * return F on no sucess in opening any of succeeding files
 */
extern int32 __open_sfil(void)
{
again:
 /* if not first time, close previous file */
 if (__visp->vi_s != NULL)
  { __my_fclose(__visp->vi_s); __visp->vi_s = NULL; }
 __cur_fnam = __in_fils[__cur_infi];
 if ((__in_s = __tilde_fopen(__cur_fnam, "r")) == NULL)
  {
   __pv_err(700, "cannot open Verilog input file %s - skipped", __cur_fnam);
try_next:
   if (__cur_infi + 1 > __last_inf) return(FALSE);
   __cur_infi++;
   goto again;
  }
 if (feof(__in_s))
  {
   __pv_warn(508, "Verilog input file %s empty", __cur_fnam);
   goto try_next;
  }
 /* whenever open new file must discard pushed back */
 __lasttoktyp = UNDEF;
 __visp->vi_s = __in_s;
 /* in fils of 0 is no file "none" */
 /* vilin_cnt always 0 when opened */
 __visp->vifnam_ind = __cur_infi;
 __cur_fnam_ind = __cur_infi;
 __cur_fnam = __in_fils[__cur_fnam_ind];
 __lin_cnt = 1;
 /* emit source filed compiled unless -q */
 __cv_msg("Compiling source file \"%s\"\n", __cur_fnam);
 __file_just_op = TRUE;
 __first_num_eol = FALSE; 
 /* 06/22/00 - SJM - possible cross macro 2 token number off on new file */
 __macro_sep_width = FALSE;
 __maybe_2tok_sized_num = FALSE;
 __macro_sav_nwid = FALSE;
 return(TRUE);
}

/*
 * allocate a new Verilog input file stack element on top
 * this does not open or fill anything just builds the tos entry
 * this sets global __visp
 */
extern void __push_vinfil(void)
{
 if (++__vin_top >= MAXFILNEST)
  __pv_terr(308, "`define macro and `include nesting level too large (%d)",
   MAXFILNEST);
 if (__vinstk[__vin_top] == NULL)
  {
   __vinstk[__vin_top] = (struct vinstk_t *)
     __my_malloc(sizeof(struct vinstk_t));
  }
 __visp = __vinstk[__vin_top];
 __visp->vilin_cnt = 0;
 /* in fils of 0 is no file "none" */
 __visp->vifnam_ind = 0;
 __visp->vi_s = NULL;
 __visp->vichp = NULL;
 __visp->vichplen = -1;
 __visp->vichp_beg = NULL;
}

/*
 * previous file(s) eof encounted pop stack (know thing under open)
 */
extern int32 __pop_vifstk(void)
{
 /* first pop previous */
 if (__vin_top == 0)
  {
   /* PUT ME BACK */
   return(FALSE);
  }
 /* notice never pop below bottom open current source file */
 /* if reached end of current source file, pop */
 /* define stack should never be popped below bottom */
 if (__vin_top < 0) __misc_terr(__FILE__, __LINE__);

 /* close current top file if open or null out macro */
 __visp = __vinstk[__vin_top];
 if (__visp->vi_s != NULL)
  { __my_fclose(__visp->vi_s); __visp->vi_s = NULL; }
 if (__visp->vichp != NULL)
  {
   /* if -1, pointing to non arg macro in symbol table must not free */
   /* for use of fixed visp for parsing from history list will just be -1 */
   /* else len built for arg macro and must be freed */
   /* need original start which is - length since at ending 0 */
   if (__visp->vichplen != -1)
    __my_free(__visp->vichp_beg, __visp->vichplen + 1);
   __visp->vichp = NULL;
   __visp->vichp_beg = NULL;
   __visp->vichplen = -1;
  }

 /* once popped gone for ever except in_fils entry stays */
 __visp = __vinstk[--__vin_top];

 /* then access under - notice number of simultaneously open files may */
 /* be limited by os */

 /* handle nested macro expansion */
 /* notice here can never be first token for reprocessing `directive */
 /* since "`define xx `include "yy"" then line with `xx only is illegal */ 
 /* FIXME - this can never be exec because already set to nil ??? */
 if (__visp->vichp != NULL)
  {
   /* must not change file name and line number */
   __in_s = NULL;
   return(TRUE);
  }
 /* pop down to previously opened file - macro exp. end or `include */
 __cur_fnam_ind = __visp->vifnam_ind;
 __cur_fnam = __in_fils[__cur_fnam_ind];
 __lin_cnt = __visp->vilin_cnt;
 __in_s = __visp->vi_s;
 __file_just_op = TRUE;
 __first_num_eol = FALSE; 
 return(TRUE);
}

/*
 * return to print internally stored source
 * know only called if no errors
 *
 * must save cur iti num since this is debug routine that can be called
 * from anywhere
 */
extern void __do_decompile(void)
{
 register struct mod_t *mdp;
 register struct udp_t *udpp;
 int32 first_time;

 __cv_msg("  Reconstructing post compilation source:\n");

 /* for debugging dump every inst. need flag for has IS forms */
 for (first_time = TRUE, mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   if (!mdp->msym->sydecl) continue;
   if (first_time)
    { __cur_units = 9; __cur_prec = 0; first_time = FALSE; }
   __push_wrkitstk(mdp, 0);
   __dmp_mod(stdout, mdp);
   __pop_wrkitstk();
  }
 for (udpp = __udphead; udpp != NULL; udpp = udpp->udpnxt)
  __dmp_udp(stdout, udpp);

}

/*
 * TOP LEVEL SOURCE PROCESSING ROUTINES - ALSO DIRECTIVE HANDLING
 */

/*
 * read the Verilog source input
 * know 1st file and 1st token read
 */
extern void __rd_ver_src(void)
{
 __total_rd_lines = 0;
 __total_lang_dirs = 0;
 /* go through loop once for each module */
 /* everything in Verilog in modules */
 /* enter loop with first token in toktyp */
 for (;;)
  {
   /* EOF is eof of all in files - get tok. will open next input if need */
   __get_vtok();
   if (__toktyp == TEOF) break;
   /* system tasks not allowed at top level - interacte mode handled */
   /* elsewhere - but may be a compiler directive */
   if (__toktyp >= CDIR_TOKEN_START && __toktyp <= CDIR_TOKEN_END)
    __process_cdir();
   /* if ever will have synced to one before file level thing */
   else
    {
     /* SJM 03/20/00 - build top level attribute if present */
     if (__attr_prefix)
      {
       __wrk_attr.attr_tok = MODULE;
       __wrk_attr.attr_seen = TRUE;
       __wrk_attr.attrnam = __pv_stralloc(__attrwrkstr);
       __wrk_attr.attr_fnind = __attr_fnam_ind;
       __wrk_attr.attrlin_cnt = __attr_lin_cnt;
      }
     else __wrk_attr.attr_seen = FALSE;

     __rding_top_level = FALSE;
     __rd_ver_mod();
     __rding_top_level = TRUE;
    }
   if (__toktyp == TEOF) break;
  }
}

/*
 * process built in compiler directives
 * know directive read and for now just reads what is needed
 * if `define form will be handled by get tok
 * directive here only if allowed (and probably required) outside of module
 */
extern void __process_cdir(void)
{
 int32 wtyp, savlin_cnt;
 char s1[RECLEN];

 if (!__chk_beg_line(__toktyp))
  {
   __pv_fwarn(605, "directive %s not first token on line - ignored",
    __prt_vtok());
   /* still skip rest of line */
   if (!__iact_state) __skipover_line();
   return;
  } 
 switch ((byte) __toktyp) {
  case CDIR_TIMESCALE:
   do_timescale();
   return;
  case CDIR_DFLNTYP:
   savlin_cnt = __lin_cnt;
   __toktyp = __get1_vtok(__in_s);
   if (savlin_cnt != __lin_cnt)
    {
     __pv_ferr(927,
      "`defaultnettype directive wire type must be on same line");
     __unget_vtok();
     return;
    }
   if ((wtyp = __fr_wtnam(__toktyp)) == -1)
    __pv_ferr(704,
     "`defaultnettype compiler directive not followed by wire type - %s read",
     __prt_vtok());
   else if (wtyp >= NONWIRE_ST || wtyp == N_SUPPLY0 || wtyp == N_SUPPLY1)
    {
     __pv_ferr(705, "`defaultnettype compiler directive wire type %s illegal",
      __to_wtnam2(s1, (word32) wtyp)); 
    }
   else __dflt_ntyp = wtyp;
   break;
  case CDIR_AEXPVECNETS:
  case CDIR_XPNDVNETS:
   /* this is default */
   __no_expand = FALSE;
   break;
  case CDIR_NOXPNDVNETS:
   __no_expand = TRUE;
   break;
  case CDIR_CELLDEF:
   __in_cell_region = TRUE;
   break;
  case CDIR_ECELLDEF:
   __in_cell_region = FALSE;
   break;
  /* this takes pull0 or pull1 and connects pull up to unc. input port ? */
  case CDIR_UNCONNDRIVE:
   savlin_cnt = __lin_cnt;
   __toktyp = __get1_vtok(__in_s);
   if (savlin_cnt != __lin_cnt)
    {
     __pv_ferr(1037,
      "`unconnected_drive directive strength must be on same line");
     __unget_vtok();
     return;
    }
   if (__toktyp != PULL0 && __toktyp != PULL1)
    {
     __pv_ferr(1041,
      "`unconnected_drive directive requires pull0 or pull1 argument - %s read",
      __prt_vtok());
     __unget_vtok();
     return;
    }
   __unconn_drive = __toktyp;
   break;
  case CDIR_NOUNCONNDRIVE:
   __unconn_drive = TOK_NONE;
   break;
  case CDIR_RESETALL:
   /* this does not effect `ifdef, `define, i.e. symbol tables left as is */
   set_tfmt_dflts();
   __dflt_ntyp = N_WIRE;
   __in_cell_region = FALSE;
   __unconn_drive = TOK_NONE;
   __no_expand = FALSE;
   __cur_units = 9;
   __cur_prec = 0;
   break;
  case CDIR_LANG:
   __do_foreign_lang();
   /* must return since already skipped to end of line */
   return;

  /* these need to be supported */
  case CDIR_ENDPROTECT:
  case CDIR_ENDPROTECTED:
  case CDIR_PROTECT:
  case CDIR_PROTECTED:
   __pv_fwarn(619, "directive %s unimplemented", __prt_vtok());
   break;

  /* these do not do anything */
  case CDIR_ACCEL:
  case CDIR_NOACCEL:
  case CDIR_REMGATESNAMES:
  case CDIR_REMNETNAMES:
  case CDIR_NOREMGATENAMES:
  case CDIR_NOREMNETNAMES:
  case CDIR_DFLTDECAYTIME:
  case CDIR_DFLTTRIREGSTREN:
  case CDIR_DELMODEDIST:
  case CDIR_DELMODEPATH:
  case CDIR_DELMODEUNIT:
  case CDIR_DELMODEZERO:

   /* these are all one name and ignored for now */
   __finform(430, "directive %s has no effect", __prt_vtok());
   break;
  default: __case_terr(__FILE__, __LINE__);
 }
 /* this skip over anything else (such as comments) on line */
 __skipover_line();
}

/*
 * process the time scale directive
 * must be on line by itself and cannot tokenize
 * anything on line after `timescale not read - / * cannot start there
 * fomrmat is `timescale <time_unit>/<time_prec>
 * this sets globals cur_units and cur_prec 
 *
 * storage is time exponent - 1s is 1, 100 ms = 3, 1 ns = 9, 10 ns = 10, etc
 */
static void do_timescale(void)
{
 register char *cp, *cp2;
 word32 tuexp, tpexp, tunit, tprec;
 char *s1;

 __collect_line();
 s1 = (char *) __my_malloc(__macwrklen);
 /* copy line removing all white space */
 for (cp2 = __macwrkstr, cp = s1; *cp2 != '\0'; cp2++)
  { if (!vis_nonnl_white_(*cp2)) *cp++ =  *cp2; }
 *cp = '\0';

 /* first expect 1, 10, or 100 */
 cp = s1;
 tunit = 0;
 tuexp = 0;
 if (*cp++ != '1') goto tscale_bad;
 if (*cp++ == '0') tuexp = 1; else { cp--; goto get_tunit; }
 if (*cp++ == '0') tuexp = 2; else cp--;

get_tunit:
 if ((cp = __get_tmult(cp, &tunit)) == NULL) goto tscale_bad;
 if (*cp != '/') goto tscale_bad;
 /* if second must be 1 */
 if (tunit == 0 && tuexp > 0) goto tscale_bad;
 cp++;
 tunit -= tuexp; 

 tpexp = 0;
 if (*cp++ != '1') goto tscale_bad;
 if (*cp++ == '0') tpexp = 1; else { cp--; goto get_tprec; }
 if (*cp++ == '0') tpexp = 2; else  cp--; 
get_tprec:
 if ((cp = __get_tmult(cp, &tprec)) == NULL) goto tscale_bad;
 /* if 10s and 100s illegal */
 if (tprec == 0 && tpexp > 0) goto tscale_bad;
 tprec -= tpexp;

 /* precision must be smaller or = tick or higher or = exponent */
 if (tprec < tunit)
  {
   __pv_ferr(936,
    "time unit %s cannot be smaller than precision %s - `timescale ignored",
     __to_timunitnam(__xs, tunit),  __to_timunitnam(__xs2, tprec));
   goto done;
  }
 /* cur units stored as inverse of exponenent so 1 ns 9 not -9 as returned */ 
 __cur_units = tunit;
 /* cur precision is amount to add to cur units */
 __cur_prec = tprec - __cur_units;
 /* warning if extra stuff on end of line - should not be there */
 if (!__bqline_emptytail(cp))
  __pv_fwarn(567, "`timescale non white space at end of line ignored");
 __des_has_timescales = TRUE;
 goto done;

tscale_bad:
 __pv_ferr(934, "`timescale directive format incorrect - time scale unchanged");

done:
 __my_free(s1, __macwrklen);
}

/*
 * get a time unit - returns NULL on error else ending cp
 */
extern char *__get_tmult(char *cp, word32 *num_zeros)
{
 switch (*cp) {
  case 'f': *num_zeros = 15; break;
  case 'p': *num_zeros = 12; break;
  case 'n': *num_zeros = 9; break;
  case 'u': *num_zeros = 6; break;
  case 'm': *num_zeros = 3; break;
  case 's': *num_zeros = 0; return(++cp);
  default: return(NULL);
 }
 if (*(++cp) != 's') return(NULL);
 return(++cp);
}






/*
 * SUMMARY AND DESIGN CONTENTS ROUTINES
 */

/*
 * routine to print the summary for entire run
 */
static int32 prt_summary(void)
{
 if (__pv_err_cnt != 0 || __pv_warn_cnt != 0 || __inform_cnt != 0)
  __cv_msg("  There were %d error(s), %d warning(s), and %d inform(s).\n",
   __pv_err_cnt, __pv_warn_cnt, __inform_cnt);

 if (__pv_err_cnt != 0 || __undef_mods > 0) return(1);
 if (__verbose)
  {
   if (__pv_warn_cnt == 0 && __inform_cnt == 0)
    __cv_msg("  No errors and no warnings.\n");
  }
 return(0);
}

/*
 * print the design wide stats
 */
static void prt_deswide_stats(void)
{
 register struct udp_t *udpp;
 register struct mod_t *mdp;
 int32 numudps, nummods, numsplitmods, num_tran_nets;

 for (numudps = 0, udpp = __udphead; udpp != NULL; udpp = udpp->udpnxt)
  numudps++;
 for (nummods = numsplitmods = 0, mdp = __modhdr; mdp != NULL;
  mdp = mdp->mnxt)
  {
   numsplitmods++;
   if (!mdp->msplit && !mdp->mpndsplit) nummods++;
  }

 if (__verbose) 
  {
   __cv_msg("  Verbose mode statistics:\n");
   __cv_msg("  %d source lines read (includes -v/-y library files).\n",
    __total_rd_lines);
   if (__total_lang_dirs != 0)
    __cv_msg("  %d non Verilog source inclusion `language directive(s) read.\n",
     __total_lang_dirs);
   if (numsplitmods == nummods)
    __cv_msg("  Design contains %d module types.\n", nummods);
   else
    __cv_msg(
     "  Design contains %d module types (%d after parameter substitution).\n",
      nummods, numsplitmods);

   /* notice memory here goes to next higher 160k from end - i.e. 900k is 2m */
   if (numudps != 0)
    __cv_msg(
     "  %d instantiated udp tables of total size less than %d million bytes.\n",
     numudps, (__mem_udpuse + 1160000)/1000000);
   if (__num_glbs != 0 || __num_inmodglbs != 0)
    __cv_msg(
     "  There are %d cross module and %d intra module hierarchical references.\n",
     __num_glbs - __num_inmodglbs, __num_inmodglbs);
   if ((num_tran_nets = count_tran_nets()) != 0) 
    {
     __cv_msg(
      "  %d nets in inout or tran gate connecting transistor channels.\n",
      num_tran_nets);
    }
   if (__gates_removable != 0 || __contas_removable != 0)
    {
     __cv_msg(
      "  %d gates (%d flat) and %d assigns (%d flat) disconnected by gate eater.\n",
      __gates_removable, __flgates_removable, __contas_removable,
      __flcontas_removable);
    }
   if (__nets_removable != 0)
    {
     __cv_msg("  %d nets (%d flat) disconnected by gate eater.\n",
      __nets_removable, __flnets_removable);
    }
   __cv_msg("\n");
  }
}

/*
 * count design total nets in transistor or inout channels
 */
static int32 count_tran_nets(void)
{
 register int32 ni;
 register struct net_t *np;
 register struct mod_t *mdp;
 int32 ntrnets;

 for (ntrnets = 0, mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   if (mdp->mnnum == 0 || (!mdp->mod_hasbidtran && !mdp->mod_hastran))
    continue;
   for (ni = 0, np = &(mdp->mnets[0]); ni < mdp->mnnum; ni++, np++)
    { if (np->ntraux != NULL) ntrnets++; }
  }
 return(ntrnets);
}

/*
 * print a message giving memory use
 */
static void mem_use_msg(int32 also_mems)
{ 
 double d1;

 if (__verbose)
  {
   __cv_msg("  Approximately %ld bytes storage allocated (excluding udps).\n",
    __mem_use);
   d1 = 100.0*((double) __arrvmem_use/(double) (__memstr_use + __mem_use)); 
   if (also_mems && __arrvmem_use != 0)
    {
     __cv_msg(
      "  Verilog arrays (memories) require %ld bytes (%.2lf%% of total).\n",
      __arrvmem_use, d1);
    }
   /* RELEASE remove --
   __prt_memstats();
   -- */
  }
}

/*
 * print all the design 1 line per module type tables
 */
static void prt_alldesmod_tabs(void)
{
 __cv_msg("+++ Printing Design Statistics +++\n");
 /* even if verbose print design wide statistics here */
 prt_deswide_stats();
 /* first general module. declarative counts - 1 line per mod */
 prt2_desmod_tab();
 /* then 1 line per mod of wire stats */
 prt2_permod_wiretab();
 /* 1 line per mod of strength wires stats if design has strength wires */
 st_prt2_permod_wiretab();
 /* print task both wire and numbers stats - 1 line per mod with tasks */
 prt2_permod_tasktabs();

 /* print the per module type usage tables */
 __prt2_mod_typetab(__prt_allstats);
 __cv_msg("+++ End of Design Statistics +++\n");
}

/*
 * print table of summary modules statistics for every module
 */
static void prt2_desmod_tab(void)
{
 register struct mod_t *mdp;
 int32 num_mods, num_tops, num_cells, num_insts, num_gates, num_contas;
 int32 num_nets, tot_num_cells, tot_num_insts, tot_num_gates;
 int32 tot_num_contas, tot_num_nets;
 int32 fltot_num_cells, fltot_num_insts, fltot_num_gates, fltot_num_contas;
 int32 fltot_num_nets, num1bcas, fltot_insts_in;
 char s1[RECLEN];
 
 tot_num_cells = tot_num_insts = tot_num_gates = 0;
 tot_num_contas = tot_num_nets = 0;
 fltot_num_cells = fltot_num_insts = fltot_num_gates = fltot_num_contas = 0;
 fltot_num_nets = fltot_insts_in = 0;

 count_mods(&num_mods, &num_tops);
 __cv_msg("  Design Module Table: %d modules (%d top level):\n", num_mods,
  num_tops);
 __cv_msg(
  "Module            Level Cells-in Insts-in Primitives  Assigns    Nets");
 __cv_msg("  Insts-of\n");
 for (mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   num_cells = count_cells(mdp);
   tot_num_cells += num_cells;
   fltot_num_cells += num_cells*(int32) mdp->flatinum;
   num_insts = (int32) mdp->minum - num_cells;
   tot_num_insts += num_insts;
   fltot_num_insts += num_insts*(int32) mdp->flatinum;
   num_gates = count_gates(mdp, &num1bcas);
   tot_num_gates += num_gates;
   fltot_num_gates += num_gates*(int32) mdp->flatinum;
   num_contas = num1bcas;
   num_contas += mdp->mcanum;
   tot_num_contas += num_contas;
   fltot_num_contas += num_contas*(int32) mdp->flatinum;
   num_nets = mdp->mnnum;
   tot_num_nets += num_nets;
   fltot_num_nets += num_nets*(int32) mdp->flatinum;
   fltot_insts_in += mdp->flatinum; 
   bld_modnam(s1, mdp, 20);
   __cv_msg("%-20s%3d   %6d   %6d     %6d   %6d  %6d    %6d\n", s1,
    mdp->mlpcnt, num_cells, num_insts, num_gates, num_contas,
    num_nets, mdp->flatinum);
  }
 __cv_msg(
  "                          ------   ------     ------   ------  ------");
 __cv_msg("    ------\n");
 __cv_msg("Static Total:            %7d  %7d    %7d  %7d %7d\n",
  tot_num_cells, tot_num_insts, tot_num_gates, tot_num_contas, tot_num_nets);
 __cv_msg("Flat Total:              %7d  %7d    %7d  %7d %7d   %7d\n",
  fltot_num_cells, fltot_num_insts, fltot_num_gates, fltot_num_contas,
  fltot_num_nets, fltot_insts_in);
}

/*
 * build mod name with trunc. and add (C) for cells
 * s must be big enough
 */
static void bld_modnam(char *s, struct mod_t *mdp, int32 fldsiz)
{
 int32 mlen;
  
 if (mdp->m_iscell)
  {
   mlen = strlen(mdp->msym->synam);
   if (mlen + 3 > fldsiz)
    {
     strncpy(s, mdp->msym->synam, fldsiz - 4);
     s[fldsiz - 4] = '-';
     s[fldsiz - 3] = '\0';
     strcat(s, "(C)");
    }
   else { strcpy(s, mdp->msym->synam); strcat(s, "(C)"); }
   return;
  }
 if ((mlen = strlen(mdp->msym->synam)) > fldsiz)
  {
   strncpy(s, mdp->msym->synam, fldsiz - 1);
   s[fldsiz - 1] = '-';
   s[fldsiz] = '\0';
  }
 else strcpy(s, mdp->msym->synam);
}

/*
 * count number of modules and top modules in circuit
 */
static void count_mods(int32 *nummods, int32 *numtops)
{
 register struct mod_t *mdp;

 *nummods = 0;
 *numtops = 0;
 for (mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   (*nummods)++;
   if (mdp->minstnum == 0) (*numtops)++;
  }
}

/*
 * count number of instances in module that are cells
 */
static int32 count_cells(struct mod_t *mdp)
{
 register int32 ii;
 int32 cnum;
 struct inst_t *ip;
 struct mod_t *imdp;

 for (cnum = 0, ii = 0; ii < mdp->minum; ii++)
  {
   ip = &(mdp->minsts[ii]);
   imdp = ip->imsym->el.emdp;
   if (imdp->m_iscell) cnum++;
  }   
 return(cnum);
}

/*
 * count the number of gates in module (includes udps)
 * 
 * cannot just use number because 1 bit contas in gate array
 */
static int32 count_gates(struct mod_t *mdp, int32 *num1bitcas)
{
 register int32 gi;
 register struct gate_t *gp;
 int32 gcnt, n1bcas;

 for (gcnt = 0, n1bcas = 0, gi = 0; gi < mdp->mgnum; gi++)
  {
   gp = &(mdp->mgates[gi]);
   if (gp->gmsym->el.eprimp->gateid == G_ASSIGN) n1bcas++; 
   else gcnt++;
  }
 *num1bitcas = n1bcas;
 return(gcnt);
}

/*
 * print the per module wiring table
 */
static void prt2_permod_wiretab(void)
{
 register struct mod_t *mdp;
 int32 prts, prtbits, wires, wirebits, regs, regbits, arrs, arrcells, arrbits;
 int32 tot_prts, tot_prtbits, tot_wires, tot_wirebits, tot_regs;
 int32 tot_regbits, tot_arrs, tot_arrcells, tot_arrbits;
 char s1[RECLEN], s2[RECLEN], s3[RECLEN], s4[RECLEN], s5[RECLEN];

 tot_prts = tot_prtbits = 0;
 tot_wires = tot_wirebits = tot_regs = tot_regbits = tot_arrs = 0;
 tot_arrcells = tot_arrbits = 0;
 __cv_msg("\n  Per Module Wiring Table (Task Variables Excluded):\n");
 __cv_msg("Module           Ports(Bits)   Wires(Bits) Registers(Bits)");
 __cv_msg(" Memory(Cells, Bits)\n");
 for (mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   prts = (int32) mdp->mpnum;
   prtbits = cnt_modprt_bits(mdp);
   cnt_modwires(mdp, &wires, &wirebits, &regs, &regbits, &arrs, &arrcells,
    &arrbits);
   
   tot_prts += prts*(int32) mdp->flatinum;
   tot_prtbits += prtbits*(int32) mdp->flatinum;    
   tot_wires += wires*(int32) mdp->flatinum;
   tot_wirebits += wirebits*(int32) mdp->flatinum;
   tot_regs += regs*(int32) mdp->flatinum;
   tot_regbits += regbits*(int32) mdp->flatinum;
   tot_arrs += arrs*(int32) mdp->flatinum;
   tot_arrcells += arrcells*(int32) mdp->flatinum;
   tot_arrbits += arrbits*(int32) mdp->flatinum;
   if (prts == 0) strcpy(s1, ""); else sprintf(s1, "%d(%d)", prts, prtbits);
   if (wires == 0) strcpy(s2, "");
   else sprintf(s2, "%d(%d)", wires, wirebits);
   if (regs == 0) strcpy(s3, ""); else sprintf(s3, "%d(%d)", regs, regbits);
   if (arrs == 0) strcpy(s4, ""); 
   else sprintf(s4, "%d(%d, %d)", arrs, arrcells, arrbits);
   bld_modnam(s5, mdp, 18);
   __cv_msg("%-18s%10s%14s%16s%20s\n", s5, s1, s2, s3, s4);   
  }
 __cv_msg("                ------------ ------------- ---------------");
 __cv_msg(" -------------------\n");
 if (tot_prts == 0) strcpy(s1, "");
 else sprintf(s1, "%d(%d)", tot_prts, tot_prtbits);
 if (tot_wires == 0) strcpy(s2, "");
 else sprintf(s2, "%d(%d)", tot_wires, tot_wirebits);
 if (tot_regs == 0) strcpy(s3, "");
 else sprintf(s3, "%d(%d)", tot_regs, tot_regbits);
 if (tot_arrs == 0) strcpy(s4, ""); 
 else sprintf(s4, "%d(%d, %d)", tot_arrs, tot_arrcells, tot_arrbits);
 __cv_msg("Flat total:    %13s%14s%16s%20s\n", s1, s2, s3, s4);
}

/*
 * count the number of module port bits
 */
static int32 cnt_modprt_bits(struct mod_t *mdp)
{ 
 register int32 pi;
 int32 modpbits;
 struct mod_pin_t *mpp;

 for (modpbits = 0, pi = 0; pi < mdp->mpnum; pi++)  
  {
   mpp = &(mdp->mpins[pi]);
   modpbits += (int32) mpp->mpwide;
  }
 return(modpbits);
}

/*
 * count the number of top level (non in task/func) wires and bits
 */
static void cnt_modwires(struct mod_t *mdp, int32 *wires, int32 *wirebits,
 int32 *regs, int32 *regbits, int32 *arrs, int32 *arrcells, int32 *arrbits)
{
 register int32 ni;
 register struct net_t *np;
 int32 acells;

 *wires = 0;
 *wirebits = 0;
 *regs = 0;
 *regbits = 0;
 *arrs = 0;
 *arrcells = 0;
 *arrbits = 0;

 /* mnets of 0 will not exist unless has at least one net */ 
 if (mdp->mnnum == 0) return;
 for (ni = 0, np = &(mdp->mnets[0]); ni < mdp->mnnum; ni++, np++)
  {
   /* module ports not counted here */
   if (np->iotyp != NON_IO) continue;
   if (np->ntyp < NONWIRE_ST)
    {
     (*wires)++;
     *wirebits += np->nwid;
     continue;
    }
   if (np->n_isarr)
    {
     (*arrs)++;
     acells = (int32) __get_arrwide(np);
     *arrcells += acells;
     *arrbits += acells*np->nwid;
     continue;
    }
   (*regs)++;
   *regbits += np->nwid;
  } 
} 

/*
 * print the per module strength wiring table
 */
static void st_prt2_permod_wiretab(void)
{
 register struct mod_t *mdp;
 int32 first_time;
 int32 prts, prtbits, wires, wirebits;
 int32 st_prts, st_prtbits, st_wires, st_wirebits;
 int32 tot_prts, tot_prtbits, tot_wires, tot_wirebits;
 int32 st_tot_prts, st_tot_prtbits, st_tot_wires, st_tot_wirebits;
 char s1[RECLEN], s2[RECLEN], s3[RECLEN], s4[RECLEN], s5[RECLEN];

 if (__design_no_strens) return;

 tot_prts = tot_prtbits = st_tot_prts = st_tot_prtbits = 0;
 tot_wires = tot_wirebits = st_tot_wires = st_tot_wirebits = 0;
 first_time = TRUE;
 for (mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   /* always need to count wires and ports even if no strengths */
   prts = (int32) mdp->mpnum;
   st_cnt_modprt_bits(mdp, &prtbits, &st_prts, &st_prtbits);
   st_cnt_modwires(mdp, &wires, &wirebits, &st_wires, &st_wirebits);
   tot_prts += prts*(int32) mdp->flatinum;
   tot_prtbits += prtbits*(int32) mdp->flatinum;    
   tot_wires += wires*(int32) mdp->flatinum;
   tot_wirebits += wirebits*(int32) mdp->flatinum;

   /* even if module no strengths, goes in total wires */
   if (!mdp->mhassts) continue;
   if (first_time)
    {
     __cv_msg("\n  Per Module Strength Wiring Table:\n");
     __cv_msg(
      "Module                Ports(Bits)       Percent      Wires(Bits)");
     __cv_msg("       Percent\n");
     first_time = FALSE;
    }
   st_tot_prts += st_prts*(int32) mdp->flatinum;
   st_tot_prtbits += st_prtbits*(int32) mdp->flatinum;    
   st_tot_wires += st_wires*(int32) mdp->flatinum;
   st_tot_wirebits += st_wirebits*(int32) mdp->flatinum;

   if (st_prts == 0) { strcpy(s1, ""); strcpy(s2, ""); }
   else
    {
     sprintf(s1, "%d(%d)", st_prts, st_prtbits);
     sprintf(s2, "%.1f(%.1f)", 100.0*((double) st_prts/prts),
      100.0*((double) st_prtbits/prtbits));
    }
   if (st_wires == 0) { strcpy(s3, ""); strcpy(s4, ""); }
   else
    {
     sprintf(s3, "%d(%d)", st_wires, st_wirebits);
     sprintf(s4, "%.1f(%.1f)", 100.0*((double) st_wires/wires),
      100.0*((double) st_wirebits/wirebits));
    }
   bld_modnam(s5, mdp, 20);
   __cv_msg("%-20s%13s  %12s  %15s  %12s\n", s5, s1, s2, s3, s4);   
  }
 __cv_msg(
  "                      -----------    ----------      -----------  ");
 __cv_msg("------------\n");
 if (st_tot_prts == 0) { strcpy(s1, ""); strcpy(s2, ""); }
 else
  {
   sprintf(s1, "%d(%d)", st_tot_prts, st_tot_prtbits);
   sprintf(s2, "%.1f(%.1f)", 100.0*((double) st_tot_prts/tot_prts),
    100.0*((double) st_tot_prtbits/tot_prtbits));
  }
 if (tot_wires == 0) { strcpy(s3, ""); strcpy(s4, ""); }
 else
  {
   sprintf(s3, "%d(%d)", st_tot_wires, st_tot_wirebits);
   sprintf(s4, "%.1f(%.1f)", 100.0*((double) st_tot_wires/tot_wires),
    100.0*((double) st_tot_wirebits/tot_wirebits));
  }
 __cv_msg("Strength total:   %15s   %11s%17s  %12s\n", s1, s2, s3, s4);
}

/*
 * count the number of strength module ports and bits
 */
static void st_cnt_modprt_bits(struct mod_t *mdp, int32 *prtbits, int32 *st_prts,
 int32 *st_prtbits)
{ 
 register int32 pi;
 register struct expr_t *catxp; 
 int32 st_modpbits, modpbits, st_modprts;
 struct mod_pin_t *mpp;
 struct expr_t *mxp;

 st_modprts = 0;
 for (modpbits = st_modpbits = 0, pi = 0; pi < mdp->mpnum; pi++)  
  {
   mpp = &(mdp->mpins[pi]);
   modpbits += (int32) mpp->mpwide;
   mxp = mpp->mpref;
   if (!mxp->x_stren) continue;
   st_modprts++;
   if (mxp->optyp != LCB) { st_modpbits += (int32) mpp->mpwide; continue; }

   /* notice for concats some ports may be strength others not ? */
   for (catxp = mxp->ru.x; catxp != NULL; catxp = catxp->ru.x) 
    { if (catxp->lu.x->x_stren) st_modpbits += (int32) catxp->lu.x->szu.xclen; }
  }
 *prtbits = modpbits;
 *st_prts = st_modprts;
 *st_prtbits = st_modpbits;
}

/*
 * count the number of top level (non in task/func) wires and bits
 */
static void st_cnt_modwires(struct mod_t *mdp, int32 *wires, int32 *wirebits,
 int32 *st_wires, int32 *st_wirebits)
{
 register int32 ni;
 register struct net_t *np;
 int32 mwires, mwirebits, st_mwires, st_mwirebits;

 mwires = 0;
 mwirebits = 0;
 st_mwires = 0;
 st_mwirebits = 0;
 if (mdp->mnnum != 0)
  {
   for (ni = 0, np = &(mdp->mnets[0]); ni < mdp->mnnum; ni++, np++) 
    {
     /* module ports not counted here */
     if (np->iotyp != NON_IO) continue;
     if (np->ntyp >= NONWIRE_ST) continue;

     mwires++;
     mwirebits += np->nwid;
     if (!np->n_stren) continue;
     st_mwires++;
     st_mwirebits += np->nwid;
    } 
  }
 *wires = mwires;
 *wirebits = mwirebits;
 *st_wires = st_mwires;
 *st_wirebits = st_mwirebits;
} 

/*
 * print the per module task numbers
 * notice number of instances of module does not multiply here 
 */
static void prt2_permod_tasktabs(void)
{
 register struct mod_t *mdp;
 int32 inits, always, tasks, funcs, begblks, frks;
 int32 tot_inits, tot_always, tot_tasks, tot_funcs, tot_begblks, tot_frks;
 int32 first_time;
 char s1[RECLEN];

 tot_inits = tot_always = tot_tasks = tot_funcs = tot_begblks = tot_frks = 0;
 for (first_time = TRUE, mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   if (mdp->mtasks == NULL) continue;
   if (first_time)
    {
     __cv_msg("\n  Per Module Task Definition Table:\n");
     __cv_msg(
     "Module            Initial  Always    Task  Function   Lab. Begin");
     __cv_msg("  Lab. Fork\n");
     first_time = FALSE;
    }

   cnt_modtasks(mdp, &inits, &always, &tasks, &funcs, &begblks, &frks);
   tot_inits += inits;
   tot_always += always;
   tot_tasks += frks;
   tot_funcs += funcs;
   tot_begblks += begblks;
   tot_frks += frks;
   bld_modnam(s1, mdp, 20);
   __cv_msg("%-20s%5d   %5d   %5d     %5d        %5d      %5d\n", s1, inits,
    always, tasks, funcs, begblks, frks);
  }
 if (!first_time)
  {
   __cv_msg("                    -----   -----   -----     -----        ");
   __cv_msg("-----      -----\n");
   __cv_msg("Static Total       %6d  %6d  %6d    %6d       %6d     %6d\n",
    tot_inits, tot_always, tot_tasks, tot_funcs, tot_begblks, tot_frks);
  }
}

/*
 * count the number of tasks, named blocks and funcs
 */
static void cnt_modtasks(struct mod_t *mdp, int32 *inits, int32 *always,
 int32 *tsks, int32 *funcs, int32 *begblks, int32 *frks)
{
 register struct ialst_t *ialp;
 register struct task_t *tskp;
 int32 iat;

 *inits = *always = *tsks = *funcs = *begblks = *frks = 0;
 for (ialp = mdp->ialst; ialp != NULL; ialp = ialp->ialnxt)
  {
   iat = ialp->iatyp;
   if (iat == INITial) (*inits)++;
   else if (iat == ALWAYS) (*always)++;
   else __case_terr(__FILE__, __LINE__);
  }
 for (tskp = mdp->mtasks; tskp != NULL; tskp = tskp->tsknxt)
  {
   if (tskp->tsktyp == FUNCTION) (*funcs)++;
   else if (tskp->tsktyp == TASK) (*tsks)++;
   else if (tskp->tsktyp == Begin) (*begblks)++;
   else if (tskp->tsktyp == FORK) (*frks)++;
   else __case_terr(__FILE__, __LINE__);
  }
}

/*
 * dump every module's table of instantiated types and gate statistics
 */
extern void __prt2_mod_typetab(int32 prt_all)
{
 register struct mod_t *mdp;
 register struct udp_t *udpp;
 register int32 i;
 int32 gid;
 int32 *gftab, *gstab, *cgftab, *mftab, *mstab, *uftab, *ustab, *cuftab;
 int32 num_mods, num_udps, mhasudps, first_time;
 int32 num_contas, tot_insts, tot_gates, tot_udps, tot_fcontas, tot_scontas;
 int32 tot_cells, tot_cellgates, tot_celludps, tot_cellassigns;
 struct mod_t *imdp;
 struct primtab_t *primp;
 struct sy_t *syp;
 char s1[RECLEN], s2[RECLEN], filref[RECLEN];

 /* allocate the needed tables */ 
 gftab = (int32 *) __my_malloc((LAST_GSYM + 1)*sizeof(int32));
 gstab = (int32 *) __my_malloc((LAST_GSYM + 1)*sizeof(int32));
 cgftab = (int32 *) __my_malloc((LAST_GSYM + 1)*sizeof(int32));

 for (num_mods = 0, mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   /* need to assign sequence no. to each module */
   /* NOTICE - lastinum used for mod splitting but no more needed by here */ 
   mdp->lastinum = num_mods;
   num_mods++;
  }
 /* know there will always be at least one inst or not get here */
 mftab = (int32 *) __my_malloc(num_mods*sizeof(int32));
 mstab = (int32 *) __my_malloc(num_mods*sizeof(int32));

 num_udps = 0;
 uftab = ustab = cuftab = NULL;
 if (__udphead != NULL)
  {
   for (udpp = __udphead; udpp != NULL; udpp = udpp->udpnxt)
    {
     /* need to assign sequence no. to each udp type */
     udpp->uidnum = num_udps;
     num_udps++;
    }
   uftab = (int32 *) __my_malloc(num_udps*sizeof(int32));
   ustab = (int32 *) __my_malloc(num_udps*sizeof(int32));
   cuftab = (int32 *) __my_malloc(num_udps*sizeof(int32));
  }
 reset_cntabs(gftab, gstab, cgftab, mftab, mstab, num_mods, uftab, ustab,
  cuftab, num_udps);

 for (mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   /* to get design totals do not zero fields each time through */
   accum_usecnts(mdp, gftab, gstab, cgftab, mftab, mstab, uftab, ustab,
    cuftab, &mhasudps);
  }
 /* print design wide totals */
 __cv_msg("\n  Design Usage Table:\n");
 __cv_msg("Type                      Class  Static   Flat   Location\n"); 
 __cv_msg("                                 Number  Number\n"); 
 /* first 1 line per mod inst - need sorted so must go through mods */
 tot_insts = tot_gates = tot_udps = tot_fcontas = tot_scontas = 0;
 tot_cells = tot_cellgates = tot_cellassigns = tot_celludps = 0;
 for (imdp = __modhdr; imdp != NULL; imdp = imdp->mnxt)
  {
   syp = imdp->msym;
   if (strlen(syp->synam) > 24)
    { strncpy(s1, syp->synam, 23); s1[23] = '-'; s1[24] = '\0'; }
   else strcpy(s1, syp->synam);

   if (imdp->minstnum == 0) strcpy(s2, "top");
   else if (imdp->m_iscell) strcpy(s2, "cell");
   else strcpy(s2, "module");
   __cv_msg("%-24s  %-6s%7d %7d  %s:%d\n", s1, s2, mstab[imdp->lastinum],
    mftab[imdp->lastinum], __schop(filref, __in_fils[syp->syfnam_ind]),
    syp->sylin_cnt); 
   tot_insts += (int32) mftab[imdp->lastinum];
   num_contas = imdp->mcanum;
   if (imdp->m_iscell)
    { 
     tot_cellassigns += (int32) imdp->flatinum*num_contas;
     tot_cells += (int32) mftab[imdp->lastinum];
    }
   tot_fcontas += (int32) imdp->flatinum*num_contas;
   tot_scontas += num_contas;
  }
 for (udpp = __udphead; udpp != NULL; udpp = udpp->udpnxt)
  {
   /* if udp defined list even if not used */
   syp = udpp->usym;
   if (strlen(syp->synam) > 24)
    { strncpy(s1, syp->synam, 23); s1[23] = '-'; s1[24] = '\0'; }
    else strcpy(s1, syp->synam);
   __cv_msg("%-24s  %-6s%7d %7d  %s:%d\n", s1, "udp", ustab[udpp->uidnum],
    uftab[udpp->uidnum], __schop(filref, __in_fils[syp->syfnam_ind]),
    syp->sylin_cnt); 

   tot_udps += (int32) uftab[udpp->uidnum];
   tot_celludps += (int32) cuftab[udpp->uidnum];
  }
 for (i = 0, primp = prims; i < NPRIMS; i++, primp++)
  {
   gid = primp->gateid;
   if (gstab[gid] == 0) continue;
   __cv_msg("%-24s  %-6s%7d %7d\n", primp->gatnam, "gate", gstab[gid],
    gftab[gid]);
   tot_gates += gftab[gid]; 
   tot_cellgates += cgftab[gid];
  }
 if (tot_fcontas != 0 || tot_scontas != 0)
  __cv_msg("%-24s  %-6s%7d %7d\n", "wide-assign", "assign", tot_scontas,
   tot_fcontas);

 if (tot_cells == 0)
  {
   __cv_msg(
    "\n  Flattened Design: %d instances, %d udps, %d gates and %d assigns.\n",
    tot_insts, tot_udps, tot_gates - gftab[G_ASSIGN],
    tot_fcontas + gftab[G_ASSIGN]);
  }
 else
  { 
   __cv_msg(
   "\n  Flattened Design: %d instances (%d of cells), %d udps (%d in cells),\n",
    tot_insts, tot_cells, tot_udps, tot_celludps);
   __cv_msg("   %d gates (%d in cells) and %d assigns (%d in cells).\n",
    tot_gates - gftab[G_ASSIGN], tot_cellgates - cgftab[G_ASSIGN],
    tot_fcontas + gftab[G_ASSIGN], tot_cellassigns + cgftab[G_ASSIGN]);
  }

 if (!prt_all) goto free_tabs;
 __cv_msg(
  "\n  Individual Modules Content Tables (Procedural Only Excluded)");
 first_time = TRUE;
 for (mdp = __modhdr; mdp != NULL; mdp = mdp->mnxt)
  {
   first_time = TRUE;
   reset_cntabs(gftab, gstab, cgftab, mftab, mstab, num_mods, uftab, ustab,
    cuftab, num_udps);
   accum_usecnts(mdp, gftab, gstab, cgftab, mftab, mstab, uftab, ustab,
    cuftab, &mhasudps);

   /* first 1 line per mod inst - need sorted so must go through mods */
   for (imdp = __modhdr; imdp != NULL; imdp = imdp->mnxt)
    {
     if (mstab[imdp->lastinum] == 0) continue;
     if (first_time) { prt_modhdr(mdp); first_time = FALSE; }
     if (strlen(imdp->msym->synam) > 24)
      { strncpy(s1, imdp->msym->synam, 23); s1[23] = '-'; s1[24] = '\0'; }
     else strcpy(s1, imdp->msym->synam);
     if (imdp->m_iscell) strcpy(s2, "cell"); else strcpy(s2, "module");
     __cv_msg("%-24s  %-6s        %10d      %10d\n", s1, s2,
      mstab[imdp->lastinum], mftab[imdp->lastinum]);
    }
   if (mhasudps)
    {
     for (udpp = __udphead; udpp != NULL; udpp = udpp->udpnxt)
      {
       if (ustab[udpp->uidnum] == 0) continue;

       if (first_time) { prt_modhdr(mdp); first_time = FALSE; }
       if (strlen(udpp->usym->synam) > 24)
        { strncpy(s1, udpp->usym->synam, 23); s1[23] = '-'; s1[24] = '\0'; }
       else strcpy(s1, udpp->usym->synam);
       __cv_msg("%-24s  %-6s        %10d      %10d\n", s1, "udp",
        ustab[udpp->uidnum], uftab[udpp->uidnum]);
      }
    }
   if (mdp->mgates != NULL)
    {
     for (i = 0, primp = prims; i < NPRIMS; i++, primp++)
      {
       gid = primp->gateid;
       if (gstab[gid] == 0) continue;
       if (first_time) { prt_modhdr(mdp); first_time = FALSE; }
       __cv_msg("%-24s  gate          %10d      %10d\n", primp->gatnam,
        gstab[gid], gftab[gid]);
      }
    }
   num_contas = mdp->mcanum;
   if (num_contas != 0)
    {
     if (first_time) { prt_modhdr(mdp); first_time = FALSE; }
     __cv_msg("%-24s  %-12s  %10d      %10d\n", "wide-assign",
      "assign", num_contas, num_contas*(int32)mdp->flatinum);
    }
  }
 /* may somehow have no modules? */
 if (first_time) __cv_msg("\n");
free_tabs:;
 /* if no alloca would need frees here */

 __my_free((char *) gftab, (LAST_GSYM + 1)*sizeof(int32));
 __my_free((char *) gstab, (LAST_GSYM + 1)*sizeof(int32));
 __my_free((char *) cgftab, (LAST_GSYM + 1)*sizeof(int32));
 __my_free((char *) mftab, num_mods*sizeof(int32));
 __my_free((char *) mstab, num_mods*sizeof(int32));
 if (uftab != NULL) __my_free((char *) uftab, num_udps*sizeof(int32)); 
 if (ustab != NULL) __my_free((char *) ustab, num_udps*sizeof(int32)); 
 if (cuftab != NULL) __my_free((char *) cuftab, num_udps*sizeof(int32)); 
}

/*
 * print the module table header - if contains declared elements    
 */
static void prt_modhdr(struct mod_t *mdp)
{
 char s1[RECLEN], s2[RECLEN];

 if (!mdp->m_iscell) strcpy(s1, "Module"); else strcpy(s1, "Cell");
 if (mdp->minstnum == 0) strcpy(s2, "(top)");
 else sprintf(s2, "(Instantiated %d Times)", mdp->flatinum);
 __cv_msg("\n  %s %s %s Type Usage Table:\n", s1, mdp->msym->synam, s2);
 __cv_msg(
  "Type                      Class      Static Number     Flat Number\n");
} 

/*
 * reset all count tables
 */
static void reset_cntabs(int32 *gftab, int32 *gstab, int32 *cgftab, int32 *mftab,
 int32 *mstab, int32 nmods, int32 *uftab, int32 *ustab, int32 *cuftab, int32 nudps)
{
 if (gftab != NULL) memset(gftab, 0, (LAST_GSYM + 1)*sizeof(int32));
 if (gstab != NULL) memset(gstab, 0, (LAST_GSYM + 1)*sizeof(int32));
 if (cgftab != NULL) memset(cgftab, 0, (LAST_GSYM + 1)*sizeof(int32));

 if (mftab != NULL) memset(mftab, 0, nmods*sizeof(int32));
 if (mstab != NULL) memset(mstab, 0, nmods*sizeof(int32));
 if (uftab != NULL) memset(uftab, 0, nudps*sizeof(int32));
 if (ustab != NULL) memset(ustab, 0, nudps*sizeof(int32));
 if (cuftab != NULL) memset(cuftab, 0, nudps*sizeof(int32));
}

/*
 * accumulate usage statistics gates in one module 
 * must be reset to 0 before here - values accumulated 
 * if this module has udps sets has udp flag
 */
static void accum_usecnts(struct mod_t *mdp, int32 *gftab, int32 *gstab,
 int32 *cgftab, int32 *mftab, int32 *mstab, int32 *uftab, int32 *ustab, int32 *cuftab,
 int32 *mhasudps)
{
 register int32 ii, gi;
 int32 gid;
 struct inst_t *ip;
 struct mod_t *imdp;
 struct gate_t *gp;
 struct udp_t *udpp;

 /* notice previous call always reset each mod use count */
 /* first time starts at 0 */
 /* update both in this module count and design wide use count */
 for (ii = 0; ii < mdp->minum; ii++)
  {
   ip = &(mdp->minsts[ii]);
   imdp = ip->imsym->el.emdp;
   /* notice lastinum is just sequence no. assigned here - fld reused here */
   mstab[imdp->lastinum] += 1; 
   mftab[imdp->lastinum] += (int32) mdp->flatinum;
  }   
 /* finally do the counting */
 *mhasudps = FALSE;
 for (gi = 0; gi < mdp->mgnum; gi++)
  {
   gp = &(mdp->mgates[gi]);
   if (gp->g_class == GC_UDP)
    {
     *mhasudps = TRUE;
     udpp = gp->gmsym->el.eudpp;
     /* DBG remove --- */
     if (ustab == NULL) __misc_terr(__FILE__, __LINE__);
     if (uftab == NULL) __misc_terr(__FILE__, __LINE__);
     /* --- */
     ustab[udpp->uidnum] += 1;
     uftab[udpp->uidnum] += (int32) mdp->flatinum;
     continue;
    }
   gid = gp->gmsym->el.eprimp->gateid;
   gstab[gid] += 1;
   gftab[gid] += (int32) mdp->flatinum;
  }
 if (!mdp->m_iscell) return;
 
 for (gi = 0; gi < mdp->mgnum; gi++)
  {
   gp = &(mdp->mgates[gi]);
   if (gp->g_class == GC_UDP)
    {
     udpp = gp->gmsym->el.eudpp;
     /* DBG remove --- */
     if (cuftab == NULL) __misc_terr(__FILE__, __LINE__);
     /* --- */
     cuftab[udpp->uidnum] += (int32) mdp->flatinum;
     continue;
    }
   gid = gp->gmsym->el.eprimp->gateid;
   cgftab[gid] += (int32) mdp->flatinum;
  }
}