Check-in [1fe01e0ab5]

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Overview
Comment:Added second sonar driving the blue LED. The GRN sonar is active low during PCM sample processing. The BLU sonar is active low in the main loop.
Timelines: family | ancestors | descendants | both | trunk
Files: files | file ages | folders
SHA1: 1fe01e0ab5397062fb83ac1305999bcbf219ecbe
User & Date: rberteig 2015-03-27 01:04:28
Context
2015-04-04
01:30
Pick PWM clipping bug fix from SPLear development. check-in: 9fa53ba49a user: rberteig tags: trunk
2015-04-03
01:13
Snapshot of work in progress during bringup of the SPLear prototype boards. Branched to avoid immediate conflicts with ongoing blog posts based on the eval board. check-in: e1d214cbeb user: rberteig tags: SPLearProto
2015-03-27
01:04
Added second sonar driving the blue LED. The GRN sonar is active low during PCM sample processing. The BLU sonar is active low in the main loop. check-in: 1fe01e0ab5 user: rberteig tags: trunk
2015-03-17
00:48
Added a mu-Law codec to the record over UART feature to provide for 14-bit effective dynamic range in the captured recordings, which matches the dynamic range actually produced by the PDM to PCM conversion as implemented. check-in: 1d38441bbc user: rberteig tags: trunk
Changes
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Changes to LPCWorkspace/PDMSPL/src/main.c.

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	uint32_t n = 0;
	uint32_t sabs = 0;
	//float ssq = 0.;
	int32_t sum = 0;
	int avg = 0;
	int peak = 0;
	int last = 0;
	volatile int monitor = PRINT_MONITOR_SPL;
	static uint8_t sbuf[64];

#if defined (__USE_LPCOPEN)
#if !defined(NO_BOARD_LIB)
    // Read clock settings and update SystemCoreClock variable
    SystemCoreClockUpdate();
    // Set up and initialize all required blocks and







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	uint32_t n = 0;
	uint32_t sabs = 0;
	//float ssq = 0.;
	int32_t sum = 0;
	int avg = 0;
	int peak = 0;
	int last = 0;
	volatile int monitor = PRINT_SCARED; //PRINT_MONITOR_SPL;
	static uint8_t sbuf[64];

#if defined (__USE_LPCOPEN)
#if !defined(NO_BOARD_LIB)
    // Read clock settings and update SystemCoreClock variable
    SystemCoreClockUpdate();
    // Set up and initialize all required blocks and
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	pdmspi_init();

    while(1) {
    	static int16_t pcm;
    	static int pcm0, pcm1;


    	// block for a PCM sample
    	pdmspi_wait_sample(&pcm);


    	// High pass filter to remove DC, roll-off at alpha=63/64 and 7812.5 Hz
    	// implies RC=16.256 ms, or Fc=9.79 Hz

    	// alpha at 7812.5 Hz        Fcut
    	//   255/256    32.64 ms      4.876 Hz
    	//   127/128    16.256 ms     9.79 Hz
    	//    63/64      8.064 ms    19.74 Hz







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	pdmspi_init();

    while(1) {
    	static int16_t pcm;
    	static int pcm0, pcm1;

    	SONARCLR2;
    	// block for a PCM sample
    	pdmspi_wait_sample(&pcm);

    	SONARSET2;
    	// High pass filter to remove DC, roll-off at alpha=63/64 and 7812.5 Hz
    	// implies RC=16.256 ms, or Fc=9.79 Hz

    	// alpha at 7812.5 Hz        Fcut
    	//   255/256    32.64 ms      4.876 Hz
    	//   127/128    16.256 ms     9.79 Hz
    	//    63/64      8.064 ms    19.74 Hz

Changes to LPCWorkspace/PDMSPL/src/splear.h.

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#undef HW_PWM
#define HW_PWM 		HW_P15
#undef HW_MSEL
#define HW_MSEL     HW_P14
#endif


#define SONARPIN HW_P17_GRN


#ifdef SONARPIN
#define SONARSET do{LPC_GPIO_PORT->CLR[0] = 1 << SONARPIN;}while(0)
#define SONARCLR do{LPC_GPIO_PORT->SET[0] = 1 << SONARPIN;}while(0)
#else
#define SONARSET do{}while(0)
#define SONARCLR do{}while(0)
#endif










#endif /*SPLEAR_H_*/







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#undef HW_PWM
#define HW_PWM 		HW_P15
#undef HW_MSEL
#define HW_MSEL     HW_P14
#endif


#define SONARPIN  HW_P17_GRN
#define SONARPIN2 HW_P16_BLU

#ifdef SONARPIN
#define SONARSET do{LPC_GPIO_PORT->CLR[0] = 1 << SONARPIN;}while(0)
#define SONARCLR do{LPC_GPIO_PORT->SET[0] = 1 << SONARPIN;}while(0)
#else
#define SONARSET do{}while(0)
#define SONARCLR do{}while(0)
#endif

#ifdef SONARPIN2
#define SONARSET2 do{LPC_GPIO_PORT->CLR[0] = 1 << SONARPIN2;}while(0)
#define SONARCLR2 do{LPC_GPIO_PORT->SET[0] = 1 << SONARPIN2;}while(0)
#else
#define SONARSET2 do{}while(0)
#define SONARCLR2 do{}while(0)
#endif


#endif /*SPLEAR_H_*/