D 2017-09-19T17:21:19.245 L GPIA N text/x-markdown P 5c1ae992462748ee68e9a8df49475933a0e2a446 U kc5tja W 2364 # General Purpose Interface Adapter (GPIA) ## Register Map |Byte Offset|Name|R/W|Purpose| |:---------:|:--:|:-:|:------| |0|GPIP|R|16-bit input port| |2|GPOP|RW|16-bit output port| **NOTE.** You **must** write to GPOP using 16-bit writes. If you use 8-bit writes, the intended byte will be set correctly; however the other half of the halfword will be changed to an unpredictable value. It should be safe to read from the GPIA using byte reads, however. ## Input Port Map |Bit|Name|Purpose| |:-:|:--:|:------| |`15`|`VSYNC`|Current state of the vertical sync pulse to the monitor. Active low.| |`14`|`HSYNC`|Current state of the horizontal sync pulse to the monitor. Active low.| |`13-3`||*unassigned*| |`2`|`SPI_MISO`|SPI receive data. Active high.| |`1`|`SD_WP`|SD Card Write Protected. Active low. (I think.)| |`0`|`SD_CD`|SD Card Detected. Active low.| ## Output Port Map |Bit|Name|Purpose| |:-:|:--:|:------| |`15-14`|`MGIAPG`|Selects one of three 16KB pages from IPL RAM from which the MGIA fetches video data.| |`13`| |*unassigned*| |`12-9`|`LEDANO`|LED anode selects. Bit 12 is the left-most LED; bit 9 is the right-most. Active high.| |`8-1`|`LEDCTH`|LED cathodes. Bit 8 is the **A** segment, bit 1 is the **DP** segment. Active high.| |`0`| |*unassigned*| The following bits serve double-duty: |Bit|Name|Purpose| |:-:|:--:|:------| |`12`|`SPI_LED_3`|LED enable for SPI unit 3. Active high.| |`11`|`SPI_LED_2`|LED enable for SPI unit 2. Active high.| |`10`|`SPI_LED_1`|LED enable for SPI unit 1. Active high.| |`9`|`SPI_LED_0`|LED enable for SPI unit 0. Active high.| |`3`|`SPI_CLK`|Clock to the SPI slave. Active high.| |`2`|`SPI_MOSI`|Data output to SPI slave. Active high.| |`1`|`SPI_SS`|SPI slave select output, unit 0. Active low.| Note that up to 4 attach SPI devices can be addressed by this GPIA core. Bootstrap software identifies them as units 0 through 3. Currently, only unit 0 is supported. Units 1..3 will illuminate different activity LEDs, but the SPI traffic will continue to route to unit 0. This will change eventually, so don't depend on this behavior. ### MGIAPG |Value|Video Memory Range| |:---:|:----------------:| |`00`|`$10000-$13FFF`| |`01`|`$14000-$17FFF`| |`10`|`$18000-$1BFFF`| |`11`|`$1C000-$1FFFF` (not implemented in Nexys-2 design)| Z 328787592c25a09d69815bebc9b77ad9