D 2018-03-03T00:55:02.871
L Motivation
N text/x-markdown
U kc5tja
W 3081
# Motivation for Creating the Kestrel 2DX
Once upon a time, I had built a computer called the Kestrel 2.
This computer had 48KB of RAM,
which was divided into two major sections:
16 KiB for video frame buffer, and 32 KiB for programs.
This computer had no ROM at the time;
rather, initial orders were provided by the FPGA programming bit-stream.
The processor was built around a simple, stack architecture with a 16-bit data path.
As a result, it could not address anything beyond 64 KiB of memory.
As I gained more experience with this computer,
I quickly realized I was running out of memory making even the simplest of programs.
The CPU instruction set density wasn't all that great,
comparing to a processor with 48-bit instructions.
No wonder I was running out of memory so quickly!
I felt it was time to move on:
to widen the data path and
to incorporate more memory.
The Digilent Nexys-2 allowed me up to 16MB of pseudo-SDRAM,
so that seemed a reasonable next step.
So,
I figured replacing the 16-bit stack CPU
with a 32-bit stack
(later, 64-bit RISC)
processor was the way forward.
Thus, the Kestrel 3 concept was born.
However, as I worked on this platform, I ran into a non-stop parade of issues.
The one that pushed my hand, however, was access to external memory.
Most FPGA development systems have some kind of external RAM
which a synthesized CPU can use to store data or execute software from.
However, each FPGA board has a different amount of RAM,
a different *kind* of RAM (e.g., static, SDRAM, pseudo-SDRAM, et. al.),
and sometimes a different *port width* to that RAM.
Each FPGA board is different, and requires its own memory controller to use this resource.
Bringing up the 16MB of pseudo-SDRAM on a Digilent Nexys-2
proved impossible for me,
causing me to start a multi-year cycle of down-specs
ultimately culminating in a design
focusing on using Lattice iCE40HX8K FPGAs with CPU and static RAM **only**.
(More on that in the
[Kestrel 3 repository](http://chiselapp.com/user/kc5tja/repository/kestrel-3/index)
though.)
With a configuration like this,
the computer shares its architecture more with IBM System/360 computers
than with the Amiga or Atari ST computers I originally wanted to build.
I wasn't pleased.
So, I hit the Reset button.
After taking a year off,
I decided to revisit the Kestrel 2,
and retrofit the Kestrel 3 processor into it.
In addition, to help reclaim some of the built-in RAM resources for loaded programs,
I introduced a ROM into the design
which included the most frequently used code from the original Kestrel 2 software.
The Kestrel 2DX computer originally started life as my very first attempt at a Kestrel 3.
It ended up as the ultimate Kestrel 2 architecture.
Strongly influenced by the Jupiter ACE since the original Kestrel 2 design,
the 2DX has evolved into a fully usable home computer all to itself.
The rest of this site is dedicated to documenting the Kestrel 2DX as it currently is.
I hope you enjoy working with this computer as much as I do.
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