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Overview
| Artifact ID: | c11c13b53ece44da6613c91148a10cee6b4a3f9d2fd8e62d1cf5f9f6baa2ceb8 |
|---|---|
| Page Name: | Notes to self |
| Date: | 2017-10-20 18:32:17 |
| Original User: | kc5tja |
| Mimetype: | text/x-markdown |
Content
PASSES:
- LIR generation
- If any instruction is a CALL, annotate that we must save the RA register.
- Recognize all literals -2048 <= x <= 2047.
- Migrate constants: -2B <= x <= 2B but not -2048 <= x <= 2047 --> LUI/ADDI pairs
- Migrate big constants into constant pool for this procedure.
- If constant pool is non-empty, annotate that we must save/reset/restore GP.
- Insert SYNCs at basic block boundaries. [1]
- Decompose higher-level primitives until (more or less) one primitive maps to one CPU instruction.
- Assemble the remaining primitives into a symbolic assembly listing.
- Peephole optimize. Replace common phrases/idioms with shorter equivalents.
- Expand prolog, epilog.
- Generate final binary image from remaining (symbolic) assembly listing.
Notes 1. We may elide this step if we're careful to introduce them when first generating LIR code.