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<title>IN: Input from Port (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>IN: Input from Port (x86 Instruction Set Reference)</title>
<h1>IN</h1>
<h2>Input from Port</h2>
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<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
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<td class="grid"><code>E4 ib</code></td>
<td class="grid"><code>IN AL,imm8</code></td>
<td class="grid">Input byte from imm8 I/O port address into AL.</td>
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<td class="grid"><code>E5 ib</code></td>
<td class="grid"><code>IN AX,imm8</code></td>
<td class="grid">Input byte from imm8 I/O port address into AX.</td>
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<td class="grid"><code>E5 ib</code></td>
<td class="grid"><code>IN EAX,imm8</code></td>
<td class="grid">Input byte from imm8 I/O port address into EAX.</td>
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<td class="grid"><code>EC</code></td>
<td class="grid"><code>IN AL,DX</code></td>
<td class="grid">Input byte from I/O port in DX into AL.</td>
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<td class="grid"><code>ED</code></td>
<td class="grid"><code>IN AX,DX</code></td>
<td class="grid">Input word from I/O port in DX into AX.</td>
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<td class="grid"><code>ED</code></td>
<td class="grid"><code>IN EAX,DX</code></td>
<td class="grid">Input doubleword from I/O port in DX into EAX.</td>
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<th>Description</th>
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<p>Copies the value from the I/O port specified with the second operand (source operand) to the destination operand (first operand). The source operand can be a byte-immediate or the DX register; the destination operand can be register AL, AX, or EAX, depending on the size of the port being accessed (8, 16, or 32 bits, respectively). Using the DX register as a source operand allows I/O port addresses from 0 to 65,535 to be accessed; using a byte immediate allows I/O port addresses 0 to 255 to be accessed.</p>
<p>When accessing an 8-bit I/O port, the opcode determines the port size; when accessing a 16- and 32-bit I/O port, the operand-size attribute determines the port size.</p>
<p>At the machine code level, I/O instructions are shorter when accessing 8-bit I/O ports. Here, the upper eight bits of the port address will be 0.</p>
<p>This instruction is only useful for accessing I/O ports located in the processor's I/O address space. See Chapter 13, Input/Output, in the IA-32 Intel Architecture Software Developer's Manual, Volume 1, for more information on accessing I/O ports in the I/O address space.</p>
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<th>Operation</th>
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<pre><span class="keyword">if</span><span class="operator">(</span>PE <span class="operator">==</span> <span class="number">1</span> <span class="operator">&amp;&amp;</span> CPL <span class="operator">&gt;</span> IOPL <span class="operator">||</span> VM <span class="operator">==</span> <span class="number">1</span><span class="operator">)</span> { <span class="comment">//Protected mode with CPL > IOPL or virtual-8086 mode</span>
	<span class="keyword">if</span><span class="operator">(</span>AnyPermissionBitSet<span class="operator">(</span>CurrentIOPort<span class="operator">(</span><span class="operator">)</span><span class="operator">)</span><span class="operator">)</span> Exception<span class="operator">(</span>GP<span class="operator">(</span><span class="number">0</span><span class="operator">)</span><span class="operator">)</span><span class="operator">;</span> <span class="comment">//If any I/O Permission Bit for I/O port being accessed == 1 the I/O operation is not allowed</span>
	<span class="keyword">else</span> Destination <span class="operator">=</span> Source<span class="operator">;</span> <span class="comment">//I/O operation is allowed; Reads from selected I/O port</span>
}
<span class="keyword">else</span> Destination <span class="operator">=</span> Source<span class="operator">;</span> <span class="comment">//Real Mode or Protected Mode with CPL <= IOPL; Reads from selected I/O port</span>
</pre>
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<th>Protected Mode Exceptions</th>
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<td class="instruction_set_reference_box">
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<tr><td><code>#GP(0)</code></td><td>If the CPL is greater than (has less privilege) the I/O privilege level (IOPL) and any of the corresponding I/O permission bits in TSS for the I/O port being accessed is 1.</td></tr>
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<th>Real-Address Mode Exceptions</th>
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<td class="instruction_set_reference_box">
None.
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<th>Virtual-8086 Mode Exceptions</th>
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<td class="instruction_set_reference_box">
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<tr><td><code>#GP(0)</code></td><td>If any of the I/O permission bits in the TSS for the I/O port being accessed is 1.</td></tr>
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<th>Instruction</th>
<th>Latency</th>
<th>Throughput</th>
<th>Execution Unit</th>
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<tr><td class="grid"><code>CPUID</code></td><td class="grid">0F3n/0F2n/069n</td><td class="grid">0F3n/0F2n/069n</td><td class="grid">0F2n</td></tr>
<tr><td class="grid"><code>IN</code></td><td class="grid">&lt;225</td><td class="grid">40</td><td class="grid">-</td></tr>
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