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<title>MOVSD: Move Scalar Double-Precision Floating-Point Value (x86 Instruction Set Reference)</title>
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<div class="main_container"><h1>x86 Instruction Set Reference</h1>
<title>MOVSD: Move Scalar Double-Precision Floating-Point Value (x86 Instruction Set Reference)</title>
<h1>MOVSD</h1>
<h2>Move Scalar Double-Precision Floating-Point Value</h2>
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<th>Opcode</th>
<th>Mnemonic</th>
<th>Description</th>
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<td class="grid"><code>F2 0F 10 /r</code></td>
<td class="grid"><code>MOVSD xmm1, xmm2/m64</code></td>
<td class="grid">Move scalar double-precision floating-point value from xmm2/m64 to xmm1 register.</td>
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<td class="grid"><code>F2 0F 11 /r</code></td>
<td class="grid"><code>MOVSD xmm2/m64, xmm</code></td>
<td class="grid">Move scalar double-precision floating-point value from xmm1 register to xmm2/m64.</td>
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<th>Description</th>
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<td class="instruction_set_reference_box">
<p>Moves a scalar double-precision floating-point value from the source operand (second operand) to the destination operand (first operand). The source and destination operands can be XMM registers or 64-bit memory locations. This instruction can be used to move a double-precision floating-point value to and from the low quadword of an XMM register and a 64-bit memory location, or to move a double-precision floating-point value between the low quadwords of two XMM registers. The instruction cannot be used to transfer data between memory locations.</p>
<p>When the source and destination operands are XMM registers, the high quadword of the destination operand remains unchanged. When the source operand is a memory location and destination operand is an XMM registers, the high quadword of the destination operand is cleared to all 0s.</p>
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<pre><span class="comment">//MOVSD instruction when source and destination operands are XMM registers:</span>
<span class="keyword">if</span><span class="operator">(</span>IsXMM<span class="operator">(</span>Source<span class="operator">)</span> <span class="operator">&amp;&amp;</span> IsXMM<span class="operator">(</span>Destination<span class="operator">)</span><span class="operator">)</span> Destination<span class="operator">[</span><span class="number">0..63</span><span class="operator">]</span> <span class="operator">=</span> Source<span class="operator">[</span><span class="number">0..63</span><span class="operator">]</span><span class="operator">;</span>
<span class="comment">//Destination[64..127] remains unchanged</span>
<span class="comment">//MOVSD instruction when source operand is XMM register and destination operand is memory location:</span>
<span class="keyword">else</span> <span class="keyword">if</span><span class="operator">(</span>IsXMM<span class="operator">(</span>Source<span class="operator">)</span> <span class="operator">&amp;&amp;</span> IsMemory<span class="operator">(</span>Destination<span class="operator">)</span><span class="operator">)</span> Destination <span class="operator">=</span> Source<span class="operator">[</span><span class="number">0..63</span><span class="operator">]</span><span class="operator">;</span>
<span class="comment">//MOVSD instruction when source operand is memory location and destination operand is XMM register:</span>
<span class="keyword">else</span> {
	Destination<span class="operator">[</span><span class="number">0..63</span><span class="operator">]</span> <span class="operator">=</span> Source<span class="operator">;</span>
	Destination<span class="operator">[</span><span class="number">64..127</span><span class="operator">]</span> <span class="operator">=</span> <span class="number">0</span><span class="operator">;</span>
}
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<th>SIMD Floating-Point Exceptions</th>
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<td class="instruction_set_reference_box">
None.
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<th>Protected Mode Exceptions</th>
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<tr><td><code>#GP(0)</code></td><td>For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.</td></tr>
<tr><td><code>#GP(0)</code></td><td>For an illegal memory operand effective address in the CS, DS, ES, FS or GS segments.</td></tr>
<tr><td><code>#SS(0)</code></td><td>For an illegal address in the SS segment.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>For a page fault.</td></tr>
<tr><td><code>#NM</code></td><td>If TS in CR0 is set.</td></tr>
<tr><td><code>#UD</code></td><td>If EM in CR0 is set. If OSFXSR in CR4 is 0. If CPUID feature flag SSE2 is 0.</td></tr>
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<th>Real-Address Mode Exceptions</th>
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<td class="instruction_set_reference_box">
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<tr><td><code>#GP(0)</code></td><td>If any part of the operand lies outside the effective address space from 0 to FFFFH.</td></tr>
<tr><td><code>#GP(0)</code></td><td>If any part of the operand lies outside the effective address space from 0 to FFFFH.</td></tr>
<tr><td><code>#NM</code></td><td>If TS in CR0 is set.</td></tr>
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<th>Virtual-8086 Mode Exceptions</th>
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<td class="instruction_set_reference_box">
Same exceptions as in Real Address Mode
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<tr><td><code>#PF(fault-code)</code></td><td>For a page fault.</td></tr>
<tr><td><code>#PF(fault-code)</code></td><td>For a page fault.</td></tr>
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<th>Instruction</th>
<th>Latency</th>
<th>Throughput</th>
<th>Execution Unit</th>
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<tr><td class="grid"><code>CPUID</code></td><td class="grid">0F3n/0F2n</td><td class="grid">0F3n/0F2n</td><td class="grid">0F2n</td></tr>
<tr><td class="grid"><code>MOVSD xmm, xmm</code></td><td class="grid">6/6</td><td class="grid">2/2</td><td class="grid">MMX_SHFT</td></tr>
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