MegaProcessor

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Overview
Comment:This version assembles about half of the instructions, good moment to commit :-)
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SHA1:b07bb1c70e3bd1c59626498c9ab886209f469b75
User & Date: jos 2015-07-30 14:39:40
Context
2015-07-30
16:10
A picture says more than 0x3e8 words :-) Added a drawing to illustrate the relations between the MegaProcessor's registers. check-in: cb73d9315a user: jos tags: trunk
14:39
This version assembles about half of the instructions, good moment to commit :-) check-in: b07bb1c70e user: jos tags: trunk
2015-07-29
16:01
More and more opcodes are now evaluated correctly. check-in: 2dacb66e8e user: jos tags: trunk
Changes
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Changes to asm.lua.

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        local b1, b2, b3 = asm_instr[2](f2,f3,f4);
        if( b1 ) then b1 = string.format("%02x",b1); end
        b1 = b1 or " ";
        if( b2 ) then b2 = string.format("%02x",b2); end
        b2 = b2 or "  ";
        if( b3 ) then b3 = string.format("%03x",b1); end
        b3 = b3 or "  ";

        io.write( string.format( "%s %s %s", b1, b2, b3 ) );


    end

    io.write( string.format("%d=%s - %s - %s - %s\n",n,f1,f2,f3,f4) );

end









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        local b1, b2, b3 = asm_instr[2](f2,f3,f4);
        if( b1 ) then b1 = string.format("%02x",b1); end
        b1 = b1 or " ";
        if( b2 ) then b2 = string.format("%02x",b2); end
        b2 = b2 or "  ";
        if( b3 ) then b3 = string.format("%03x",b1); end
        b3 = b3 or "  ";

        io.write( string.format( "%s %s %s", b1, b2, b3 ) );
    else
        io.write( (" "):rep(9) );
    end

    io.write( string.format("%d=%s - %s - %s - %s\n",n,f1,f2,f3,f4) );

end


Added eval_op.lua.









































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--
-- require('thisfile');
--

-- Match operand to be r0..r3 (or R0..R3), and return the number;
function isReg(op)
    local nr = op:match( '%s*[rR]([0-3])' );
    if( nr >= '0' and nr <= '3' ) then
        return tonumber(nr) ;
    else
        error("Operand must be R0..R3", 0 )
    end
end

-- Match 2 operands to be r0..r3 (or R0..R3), and return
-- a value between 0x00 and 0x0f corresponding with { R0,R0 } .. {R3,R3}
function isReg2(op1, op2)
    local n1, n2 = isReg(op1), isReg(op2);
    return( n2*4 + n1 );
end

Changes to opcodes.lua.

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function do_AND(f1, f2, f3)
    return( 0x10 + isReg2(f2,f3) );
end

function do_ASL(f1, f2, f3)
    local b1,b2 = 0xdc, 0x40;
    -- process f2 to select 0x40..0x4f, 0x50..0x5f, 0x60..0x63
  print( f1, f2, f3 );
    return b1, b2 ;
end

function do_ASL_WT(f1, f2, f3)
    local b1,b2 = 0x68, 0x00;
  print( f1, f2, f3 );
    return b1, b2 ;
end

function do_ASR(f1, f2, f3)
  print( f1, f2, f3 );
    local b1,b2 = 0x40, 0x00;
    return b1, b2 ;
end

function do_ASR_WT(f1, f2, f3)
  print( f1, f2, f3 );
    local b1,b2 = 0x40, 0x00;
    return b1, b2 ;
end

function do_BCC(f1, f2, f3)
    return 0xe4, 0x00 ;
end
................................................................................
end

function do_ST_W(f1, f2, f3)
  print( f1, f2, f3 );
end

function do_SUB(f1, f2, f3)
  print( f1, f2, f3 );
end

function do_SUBX(f1, f2, f3)
  print( f1, f2, f3 );
end

function do_SXT(f1, f2, f3)







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function do_AND(f1, f2, f3)
    return( 0x10 + isReg2(f2,f3) );
end

function do_ASL(f1, f2, f3)
    local b1,b2 = 0xdc, 0x40;
    -- process f2 to select 0x40..0x4f, 0x50..0x5f, 0x60..0x63

    return b1, b2 ;
end

function do_ASL_WT(f1, f2, f3)
    local b1,b2 = 0x68, 0x00;

    return b1, b2 ;
end

function do_ASR(f1, f2, f3)

    local b1,b2 = 0x40, 0x00;
    return b1, b2 ;
end

function do_ASR_WT(f1, f2, f3)

    local b1,b2 = 0x40, 0x00;
    return b1, b2 ;
end

function do_BCC(f1, f2, f3)
    return 0xe4, 0x00 ;
end
................................................................................
end

function do_ST_W(f1, f2, f3)
  print( f1, f2, f3 );
end

function do_SUB(f1, f2, f3)
    return( 0x60 + isReg2(f2,f3) );
end

function do_SUBX(f1, f2, f3)
  print( f1, f2, f3 );
end

function do_SXT(f1, f2, f3)