DELETED .fossil-settings/binary-glob Index: .fossil-settings/binary-glob ================================================================== --- .fossil-settings/binary-glob +++ /dev/null @@ -1,1 +0,0 @@ -fs/* DELETED .fossil-settings/crnl-glob Index: .fossil-settings/crnl-glob ================================================================== --- .fossil-settings/crnl-glob +++ /dev/null @@ -1,2 +0,0 @@ -firmware/board/sk-mlpc1788/src/fat_io_lib/* -firmware/board/sk-mlpc1788/src/image/tjpgd/* DELETED .fossil-settings/ignore-glob Index: .fossil-settings/ignore-glob ================================================================== --- .fossil-settings/ignore-glob +++ /dev/null @@ -1,37 +0,0 @@ -*.vim -*geda/*.cmd -*geda/*.pcb- -*geda/*.sch~ -*geda/*/packages -*geda/*/#* -*geda/toprint/* -*.bak* -*tags -*.o -*.hex -*.bin -*.map -*.lst -*.out -*.aux -*.dvi -*.pdf -*.log -*.toc -*.so -*.a -*path.mk -*depfile.mk -util/dport/dport -util/dport/src/darm/utils/elfdarm -util/dport/src/darm/tests/expand -util/dport/src/darm/tests/tests -util/dport/src/darm/*.pyc -util/dport/src/darm/armv7-tbl.c -util/dport/src/darm/armv7-tbl.h -util/dport/src/darm/darm-tbl.c -util/dport/src/darm/darm-tbl.h -util/dport/src/darm/thumb-tbl.c -util/dport/src/darm/thumb-tbl.h -util/dport/src/darm/thumb2-tbl.c -util/dport/src/darm/thumb2-tbl.h DELETED firmware/AUTHORS Index: firmware/AUTHORS ================================================================== --- firmware/AUTHORS +++ /dev/null @@ -1,19 +0,0 @@ -K14 Authors -=========== - -Developers ----------- - - General code: - Dmitry Kobylin (dkoby) - -Contributors ------------- - - Alphabetically: - - -Contact -------- - - DELETED firmware/Makefile Index: firmware/Makefile ================================================================== --- firmware/Makefile +++ /dev/null @@ -1,52 +0,0 @@ -######################## -# -# Root Makefile -# -######################## - --include path.mk - -include config.mk - -######################## -# -# Get board's configuration file. Configuration can -# contain custom build targets. -# -######################## - -.PHONY: all -all: default - -export BOARD_DIR = board/$(BOARD) -BOARD_MK = $(BOARD_DIR)/$(BOARD).mk -include $(BOARD_MK) - -######################## -# -# Utilities config -# -######################## - -export UTIL_PATH = ../util -ROOT_DIR = . - -include tcl.mk - -######################## -# -# Generic targets -# -######################## - -.PHONY: default clean depend - -default: $(BOARD_MK) - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(if $(findstring 1, $(BUILD_DOC)), doc) $(SUBDIRS) all - -clean: $(BOARD_MK) - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(SUBDIRS) $(if $(findstring 1, $(BUILD_DOC)), doc) clean - -depend: $(BOARD_MK) - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(SUBDIRS) depend - DELETED firmware/README Index: firmware/README ================================================================== --- firmware/README +++ /dev/null @@ -1,48 +0,0 @@ -About -===== - - K14 is LCD controller. - General features: - -System tree -=========== - - ./config.mk Basic build configuration - ./Makefile Root make-file. - ./board Projects directory. - ./board/boardN Directory of "boardN" project. - ./board/boardN/boardN.mk Build configuration of "boardN" project. - ./board/boardN/Makefile Makefile for project "boardN". - ./lib Directory with portable libraries that can be - used by all or some of projects. - ./util Directory with miscellaneous scripts/utilities - used by build process. - ./doc Miscellaneous documentation. - -WARNING - In order for most of code to work BSS section should be initialized with zeros at startup. - -Build -===== - In order to build software of this project you need: - * unix-like operating system - * tcl interpterter - * gcc toolchain - - Build under windows not tested well. - - Modify config.mk to meet your needs. Then run commands: - - make depend - make image - - -External libraries -================== - -Licence -======= - Unless otherwise noted, all programs, libraries and designs in this project is under GPL version 3. - For licences of external libraries look for it's web site or/and source code. - - DELETED firmware/board/lpc17xx/Makefile Index: firmware/board/lpc17xx/Makefile ================================================================== --- firmware/board/lpc17xx/Makefile +++ /dev/null @@ -1,142 +0,0 @@ -################################################################################ -# -# -# -################################################################################ -ROOT_DIR = ../.. - -TARGET = main -################################# -# -# Tools config -# -################################# -PROJECT_DIR = board/lpc17xx -BLOADER_DIR = $(ROOT_DIR)/board/lpc17xx_boot - -SCRIPTS_PATH = $(ROOT_DIR)/$(UTIL_PATH) -OPENOCD_DIR = $(ROOT_DIR)/$(UTIL_PATH)/openocd -DPORT_UTIL_DIR = $(ROOT_DIR)/$(UTIL_PATH)/dport -MLPC17XX_LIB_PATH = $(ROOT_DIR)/lib/mlpc17xx -OS_LIB_PATH = $(ROOT_DIR)/lib/os -MISC_LIB_PATH = $(ROOT_DIR)/lib/misc - -USE_OPENOCD_PROG ?= 0 -DPORT_TTY ?= /dev/ttyUSB0 - -include $(ROOT_DIR)/tcl.mk - -################################# -# -# Compiller flags -# -################################# -BLOADER_CONFIG = $(BLOADER_DIR)/bloader.mk -include $(BLOADER_CONFIG) - -CFLAGS += -O2 -CFLAGS += -I$(ROOT_DIR)/lib/lpc17xx -CFLAGS += -I$(MLPC17XX_LIB_PATH)/src -CFLAGS += -I$(OS_LIB_PATH)/src -CFLAGS += -I$(MISC_LIB_PATH)/src - -LDFLAGS += -L$(MLPC17XX_LIB_PATH) -LDFLAGS += -L$(OS_LIB_PATH) -LDFLAGS += -L$(MISC_LIB_PATH) -LDFLAGS += -Wl,--defsym=LOAD_OFFSET=$(MAIN_LOAD_OFFSET) -LDFLAGS += -Wl,-Map=$(TARGET).map - -################################# -# -# Objects to build -# -################################# - -TARGET_BIN = $(TARGET).bin -TARGET_OUT = $(TARGET).out -TARGET_HEX = $(TARGET).hex - -DEPFILE = depfile.mk -IMAGE_BIN = image.bin -IMAGE_HEX = image.hex - -SRC_DIR = src - -C_FILES = $(SRC_DIR)/main.c -C_FILES += $(SRC_DIR)/it.c -C_FILES += $(SRC_DIR)/startup.c -C_FILES += $(SRC_DIR)/irqp.c -C_FILES += $(SRC_DIR)/gs/gs.c -C_FILES += $(SRC_DIR)/gs/gs_hw.c -C_FILES += $(SRC_DIR)/gs/gs_image.c -C_FILES += $(SRC_DIR)/gs/gs_text.c -C_FILES += $(SRC_DIR)/gs/gs_data.c -C_FILES += $(SRC_DIR)/command.c -C_FILES += $(SRC_DIR)/extspi.c -C_FILES += $(SRC_DIR)/sdcard.c - -C_OBJS = $(foreach obj,$(C_FILES),$(patsubst %c,%o, $(obj))) -AS_OBJS = $(foreach obj,$(AS_FILES),$(patsubst %s,%o, $(obj))) -OBJS += $(AS_OBJS) -OBJS += $(C_OBJS) - -LDSCRIPT = src/lpc17xx.ld - -#LIBS += -lc -LIBS += -lmlpc17xx -LIBS += -lmisc - -VPATH += $(MLPC17XX_LIB_PATH) -VPATH += $(OS_LIB_PATH) -VPATH += $(MISC_LIB_PATH) - -################################# -# -# Build rules -# -################################# -.PHONY: all list image - -all: $(TARGET_BIN) - -$(TARGET_BIN) $(TARGET_HEX): $(TARGET_OUT) - $(CP) -Obinary $(TARGET_OUT) $(TARGET_BIN) - $(CP) -Oihex $(TARGET_OUT) $(TARGET_HEX) - -$(TARGET_OUT): $(OBJS) $(LDSCRIPT) $(LIBS) $(BLOADER_CONFIG) - $(LD) $(LDFLAGS) -T$(LDSCRIPT) -o $(TARGET_OUT) $(OBJS) $(LIBS) - $(SZ) -A $(TARGET_OUT) - -image: $(IMAGE_BIN) $(IMAGE_HEX) - --include $(DEPFILE) - -depend: $(C_FILES) - $(CC) $(CFLAGS) -MM $(C_FILES) > $(DEPFILE) - $(TCL_SHELL) $(SCRIPTS_PATH)/depdir.tcl $(DEPFILE) $(C_OBJS) - -$(IMAGE_BIN): $(TARGET_BIN) $(BLOADER_DIR)/bloader.bin mkimg.tcl - $(TCL_SHELL) mkimg.tcl \ - $(BLOADER_DIR)/bloader.bin $(BLOADER_MAXIMAGE_SIZE) $(TARGET_BIN) $(IMAGE_BIN) \ - $(MAIN_SIZE_OFFSET) $(MAIN_CRC_OFFSET) $(MAIN_IMAGE_OFFSET) - -$(IMAGE_HEX): $(IMAGE_BIN) - $(CP) -Oihex -Ibinary $^ $@ - -list: $(TARGET_OUT) - $(OD) -S $(TARGET_OUT) > $(TARGET).lst - -.PHONY: clean prog debug - -clean: - $(RM) $(OBJS) $(TARGET_BIN) $(TARGET_HEX) $(TARGET_OUT) $(TARGET).lst $(TARGET).map $(IMAGE_BIN) - -prog: image - -cd $(OPENOCD_DIR) && openocd -f openocd.cfg -c "upload_image ../../firmware/$(PROJECT_DIR)/$(IMAGE_BIN) 0x0;shutdown" - -dport: - cd $(DPORT_UTIL_DIR) && ./dport --dev=$(DPORT_TTY) - -debug: $(TARGET_OUT) - -cd $(OPENOCD_DIR) && openocd - DELETED firmware/board/lpc17xx/lpc17xx.mk Index: firmware/board/lpc17xx/lpc17xx.mk ================================================================== --- firmware/board/lpc17xx/lpc17xx.mk +++ /dev/null @@ -1,103 +0,0 @@ -############################################################################### -# -# This file is included from root Makefile. -# Build rules for SK-MLPC1788 dev. board (http://starterkit.ru). -# -############################################################################### -# -# Compiller GCC -# MCU LPC1788 -# -# GCC from CodeSourcery was used (http://www.codesourcery.com/sgpp/lite/arm). -# CodeSourcery is now Mentor Graphics Sourcery Tools -# (http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/lite-edition). -# -############################################################################### - -######################### -# -# Environment variables used by project itself and libraries. -# -######################### -export PORT = ARMV7M -export MCU = LPC1788 - -######################### -# -# Toolchain config -# -######################### -TOOLCHAIN = arm-none-eabi - -ifeq ($(findstring Win,$(OS)), Win) -else - export USE_CCACHE = ccache -endif - -export CCACHE_DIR = /dev/shm/ccache -export CC = $(USE_CCACHE) $(TOOLCHAIN)-gcc -export LD = $(TOOLCHAIN)-gcc -export AR = $(TOOLCHAIN)-ar -export AS = $(TOOLCHAIN)-as -export CP = $(TOOLCHAIN)-objcopy -export OD = $(TOOLCHAIN)-objdump -export SZ = $(TOOLCHAIN)-size -export RM = rm -f - -CFLAGS += -fno-common -CFLAGS += -mthumb -CFLAGS += -mcpu=cortex-m3 -CFLAGS += -g -CFLAGS += -Wall -CFLAGS += -DPORT_$(PORT) -CFLAGS += -DMCU_$(MCU) -CFLAGS += -DDPORT_SKIP -CFLAGS += -DUSE_DEBUG - -LDFLAGS += -nostartfiles -LDFLAGS += -mcpu=cortex-m3 -LDFLAGS += -mthumb - -export CFLAGS -export LDFLAGS - -######################### -# -# Directories required to build project. SUBDIRS relative to root directory. -# NOTE sub-directory with BOARD_DIR should be last (for proper dependencies -# build). -# -######################### - -# directories used by bootloader and main program -SUBDIRS += lib/misc -SUBDIRS += lib/mlpc17xx -# directories used by bootloader -SUBDIRS += board/lpc17xx_boot -# directories used by main program -SUBDIRS += $(BOARD_DIR) - -######################### -# -# Custom build targets -# -######################### - -.PHONY: prog list image debug -prog: all - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(BOARD_DIR) prog - -list: all - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(BOARD_DIR) $(BOARD_DIR)/../lpc17xx_boot list - -image: all - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(BOARD_DIR) image - -debug: all - $(TCL_SHELL) $(UTIL_PATH)/mforeach.tcl $(BOARD_DIR) debug - -.PHONY: dport -dport: - cd $(BOARD_DIR) && make dport - - DELETED firmware/board/lpc17xx/mkimg.tcl Index: firmware/board/lpc17xx/mkimg.tcl ================================================================== --- firmware/board/lpc17xx/mkimg.tcl +++ /dev/null @@ -1,201 +0,0 @@ -#!/bin/sh -#\ -exec tclsh "$0" "$@" - -namespace eval util { - # - # convert binary string to list of hex numbers - # - proc bin2list {bin} { - set ret [list] - - foreach ch [split $bin {}] { - if {[binary scan $ch H2 byte]} { - lappend ret 0x$byte - } else { - tk_messageBox -message "can't convert byte" -type ok -icon error - exit 1 - } - } - - return $ret - } - - # - # convert list to binary string - # - proc list2bin {data} { - foreach b $data { - append ret [binary format c $b] - } - - return $ret - } - - # - # convert list of hexnumbers (LSB first) to one big number - # - proc list2num {data} { - set ret 0 - set idx 0 - - if {[llength $data] == 0} { - tk_messageBox -message "[dict get [info frame 0] proc]: empty list specified" -type ok -icon error - } - - foreach byte $data { - set ret [expr {$ret | ($byte << (8 * $idx))}] - incr idx - } - - return 0x[format %02X $ret] - } - - # - # conver one big number to list (LSB - first element of list) - # - proc num2list {num size} { - set ret [list] - for {set i 0} {$i < $size} {incr i} { - lappend ret 0x[format %02x [expr {($num >> (8*$i)) & 0xff}]] - } - return $ret - } -} - -# -# CRC-CCITT: x^16 + x^15 + x^2 + x^1 ? -# -namespace eval crc16 { - variable table { - 0x0000 0x1021 0x2042 0x3063 0x4084 0x50a5 0x60c6 0x70e7 - 0x8108 0x9129 0xa14a 0xb16b 0xc18c 0xd1ad 0xe1ce 0xf1ef - 0x1231 0x0210 0x3273 0x2252 0x52b5 0x4294 0x72f7 0x62d6 - 0x9339 0x8318 0xb37b 0xa35a 0xd3bd 0xc39c 0xf3ff 0xe3de - 0x2462 0x3443 0x0420 0x1401 0x64e6 0x74c7 0x44a4 0x5485 - 0xa56a 0xb54b 0x8528 0x9509 0xe5ee 0xf5cf 0xc5ac 0xd58d - 0x3653 0x2672 0x1611 0x0630 0x76d7 0x66f6 0x5695 0x46b4 - 0xb75b 0xa77a 0x9719 0x8738 0xf7df 0xe7fe 0xd79d 0xc7bc - 0x48c4 0x58e5 0x6886 0x78a7 0x0840 0x1861 0x2802 0x3823 - 0xc9cc 0xd9ed 0xe98e 0xf9af 0x8948 0x9969 0xa90a 0xb92b - 0x5af5 0x4ad4 0x7ab7 0x6a96 0x1a71 0x0a50 0x3a33 0x2a12 - 0xdbfd 0xcbdc 0xfbbf 0xeb9e 0x9b79 0x8b58 0xbb3b 0xab1a - 0x6ca6 0x7c87 0x4ce4 0x5cc5 0x2c22 0x3c03 0x0c60 0x1c41 - 0xedae 0xfd8f 0xcdec 0xddcd 0xad2a 0xbd0b 0x8d68 0x9d49 - 0x7e97 0x6eb6 0x5ed5 0x4ef4 0x3e13 0x2e32 0x1e51 0x0e70 - 0xff9f 0xefbe 0xdfdd 0xcffc 0xbf1b 0xaf3a 0x9f59 0x8f78 - 0x9188 0x81a9 0xb1ca 0xa1eb 0xd10c 0xc12d 0xf14e 0xe16f - 0x1080 0x00a1 0x30c2 0x20e3 0x5004 0x4025 0x7046 0x6067 - 0x83b9 0x9398 0xa3fb 0xb3da 0xc33d 0xd31c 0xe37f 0xf35e - 0x02b1 0x1290 0x22f3 0x32d2 0x4235 0x5214 0x6277 0x7256 - 0xb5ea 0xa5cb 0x95a8 0x8589 0xf56e 0xe54f 0xd52c 0xc50d - 0x34e2 0x24c3 0x14a0 0x0481 0x7466 0x6447 0x5424 0x4405 - 0xa7db 0xb7fa 0x8799 0x97b8 0xe75f 0xf77e 0xc71d 0xd73c - 0x26d3 0x36f2 0x0691 0x16b0 0x6657 0x7676 0x4615 0x5634 - 0xd94c 0xc96d 0xf90e 0xe92f 0x99c8 0x89e9 0xb98a 0xa9ab - 0x5844 0x4865 0x7806 0x6827 0x18c0 0x08e1 0x3882 0x28a3 - 0xcb7d 0xdb5c 0xeb3f 0xfb1e 0x8bf9 0x9bd8 0xabbb 0xbb9a - 0x4a75 0x5a54 0x6a37 0x7a16 0x0af1 0x1ad0 0x2ab3 0x3a92 - 0xfd2e 0xed0f 0xdd6c 0xcd4d 0xbdaa 0xad8b 0x9de8 0x8dc9 - 0x7c26 0x6c07 0x5c64 0x4c45 0x3ca2 0x2c83 0x1ce0 0x0cc1 - 0xef1f 0xff3e 0xcf5d 0xdf7c 0xaf9b 0xbfba 0x8fd9 0x9ff8 - 0x6e17 0x7e36 0x4e55 0x5e74 0x2e93 0x3eb2 0x0ed1 0x1ef0 - } - - # - # - # - proc calc1 {crc buf} { - foreach byte $buf { - set crc [expr { - (($crc << 8) & 0xffff) ^ [lindex $crc16::table [expr {(($crc >> 8) ^ $byte) & 0xff}]] - }] - } - - return $crc - } - - # - # - # - proc calc2 {crc buf} { - foreach byte $buf { - set crc [expr {($crc >> 8) | ($crc << 8)}] - set crc [expr {($crc & 0xffff) ^ $byte}] - set crc [expr {($crc & 0xffff) ^ (($crc & 0xff) >> 4)}] - set crc [expr {($crc & 0xffff) ^ ($crc << 12)}] - set crc [expr {($crc & 0xffff) ^ (($crc & 0xff) << 5)}] - } - - return [expr {$crc & 0xffff}] - } -} - -#set data {0x02 0x00 0x6A} -# -#puts [format %04X [crc16::calc1 0xffff $data]] -#puts [format %04X [crc16::calc1 0x0000 $data]] -#puts [format %04X [crc16::calc2 0xffff $data]] -#puts [format %04X [crc16::calc2 0x0000 $data]] - - -# -# -# -proc write_image {fname offset ofd {calccrc false}} { - seek $ofd $offset - - # open and read file - set fd [open $fname r] - fconfigure $fd -translation binary -encoding binary - # write data - set data [read $fd] - puts -nonewline $ofd $data - close $fd - - if {$calccrc} { - return [crc16::calc1 0xffff [::util::bin2list $data]] - } -} - -if {$argc < 7} { - puts stderr [join [list [file tail [info script]] {: Not enough arguments}] {}] - exit 1 -} - -set BOOTLOADER_FILE [lindex $argv 0] -set BOOTLOADER_MAXSIZE [lindex $argv 1] -set MAIN_FILE [lindex $argv 2] -set OUTPUT_FILE [lindex $argv 3] -set MAIN_SIZE_OFFSET [lindex $argv 4] -set MAIN_CRC_OFFSET [lindex $argv 5] -set MAIN_IMAGE_OFFSET [lindex $argv 6] - -if {[file size $BOOTLOADER_FILE] > $BOOTLOADER_MAXSIZE} { - puts stderr [join [list [file tail [info script]] {: bootloader image too large}] {}] - exit 1 -} - -# open output file -set ofd [open $OUTPUT_FILE w] -fconfigure $ofd -translation binary -encoding binary - -write_image $BOOTLOADER_FILE 0x00000000 $ofd -set crc [write_image $MAIN_FILE $MAIN_IMAGE_OFFSET $ofd true] - -# get length of MAIN image -set length [file size $MAIN_FILE] -puts "LENGTH = 0x[format %08X $length]" -set length [util::list2bin [util::num2list $length 4]] -# crc of MAIN image -puts "CRC = 0x[format %04X $crc]" -set crc [util::list2bin [util::num2list $crc 2]] - -# write CRC and LENGTH -seek $ofd $MAIN_SIZE_OFFSET -puts -nonewline $ofd $length -seek $ofd $MAIN_CRC_OFFSET -puts -nonewline $ofd $crc - -close $ofd - DELETED firmware/board/lpc17xx/src/command.c Index: firmware/board/lpc17xx/src/command.c ================================================================== --- firmware/board/lpc17xx/src/command.c +++ /dev/null @@ -1,365 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include -#include -#include "command.h" -#include "extspi.h" -#include "gs/gs.h" - -//#define DEBUG_COMMAND - -#ifdef DEBUG_COMMAND - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - -/* P0.15 */ -#define BUSY(value) do { if (value) LPC_GPIO0->SET = (1 << 15); \ - else LPC_GPIO0->CLR = (1 << 15); } while (0) -#define BUSY_DIR_OUTPUT() do { LPC_GPIO0->DIR |= (1 << 15);} while (0) - -/* P2.26 */ -#define MISO_BUSY(value) do { if (value) LPC_GPIO2->SET = (1 << 26); \ - else LPC_GPIO2->CLR = (1 << 26); } while (0) -#define MISO_BUSY_DIR_OUTPUT() do { LPC_GPIO2->DIR |= (1 << 26);} while (0) - - -#define CMD_FLIP 0x11 -#define CMD_DRAW_LINE 0x54 -#define CMD_DRAW_RECT 0x55 -#define CMD_FILLED_RECT 0x56 -#define CMD_ELLIPSE 0x58 -#define CMD_FILL_ELLIPSE 0x59 - -#pragma pack(push, 1) -/* - * CMD 0x11 - flip display (swap front/back buffer) - * - * byte | value - * ---------------------- - * 0 | 0x11 - * - * - * CMD 0x55 - draw rectangular - * - * byte | value - * ---------------------- - * 0 | 0x55 - * 1 | LAYER - * 2 | X0 (LSB) - * 3 | X0 (MSB) - * 4 | Y0 (LSB) - * 5 | Y0 (MSB) - * 6 | X1 (LSB) - * 7 | X1 (MSB) - * 8 | Y1 (LSB) - * 9 | Y1 (MSB) - * 10 | LINE WIDTH - * 11 | COLOR (LSB) - * 12 | COLOR (MSB) - * - * LAYER - * Layer to draw to: - * 0 - front buffer - * 1 - back buffer - * 2 - first layer (not implemented) - * 3 - second layer (not implemented) - */ -struct command_data_t { - uint8 cmd; - union { - struct cmd_draw_line { - uint8 layer; - uint16 x0; - uint16 y0; - uint16 x1; - uint16 y1; - GS_COLOR color; - } draw_line; - struct cmd_draw_rect { - uint8 layer; - uint16 x0; - uint16 y0; - uint16 x1; - uint16 y1; - uint8 lwidth; - GS_COLOR color; - } draw_rect; - struct cmd_filled_rect{ - uint8 layer; - uint16 x0; - uint16 y0; - uint16 x1; - uint16 y1; - uint8 dir; - GS_COLOR color; - GS_COLOR color1; - } filled_rect; - struct cmd_ellipse{ - uint8 layer; - uint16 xc; - uint16 yc; - uint16 rh; - uint16 rv; - uint8 ewidth; - GS_COLOR color; - } ellipse; - struct cmd_fill_ellipse{ - uint8 layer; - uint16 xc; - uint16 yc; - uint16 rh; - uint16 rv; - GS_COLOR color; - } fill_ellipse; - }; -}; -#pragma pack(pop) - - -struct command_t { - uint32 rxc; /* number of received bytes */ - enum command_interface_t iface; - enum { - COMMAND_BYTE_ORDER_LITTLE_ENDIAN, - COMMAND_BYTE_ORDER_BIG_ENDIAN, - } byteorder; -}; - -static struct command_t command; -static struct command_data_t cmddata; - -static void _swap_data(); - -/****************** Command Init *****************/ -void command_init() -{ -// MISO_BUSY_DIR_OUTPUT(); -// MISO_BUSY(1); - - command.byteorder = COMMAND_BYTE_ORDER_BIG_ENDIAN; - extspi_init(); -} - -/****************** Command Process *************/ -void command_process() -{ - extspi_process(); -} - -/***************** Reset command interface *********/ -void command_reset() -{ - command.rxc = 0; -// MISO_BUSY(1); -} - -/****************** Receive byte cb ***************/ -void command_receive_cb(uint8 byte) -{ - uint32 rxc; - uint8 *buf; - - DPRINT("1x_4dn", byte, command.rxc); - - if (command.rxc < sizeof(struct command_data_t)) - LPC_IOCON_FUNC_SET(P2_26, LPC_IOCON_FUNC_GPIO); - MISO_BUSY_DIR_OUTPUT(); - MISO_BUSY(0); // MISO low - { - buf = (uint8*)&cmddata; - buf[command.rxc++] = byte; - rxc = command.rxc; - if (rxc >= 1) - { - - switch (cmddata.cmd) - { - /*************************************** FLIP Command 0x11 ***********************************/ - case CMD_FLIP: - gs_cmd_flip(); - command_reset(); /* we are ready to receive next command */ - break; - -/**************************************** LINE Command 0x54 ***********************************/ - case CMD_DRAW_LINE: - if (rxc >= 1 + (sizeof(struct cmd_draw_line))) - { - if (command.byteorder == COMMAND_BYTE_ORDER_BIG_ENDIAN) - _swap_data(); - gs_cmd_line(gs_get_layer(cmddata.draw_line.layer), - cmddata.draw_line.x0, - cmddata.draw_line.y0, - cmddata.draw_line.x1, - cmddata.draw_line.y1, - cmddata.draw_line.color); - - command_reset(); /* we are ready to receive next command */ - } - break; - -/************************************* RECTANGLE Command 0x55 ********************************/ - case CMD_DRAW_RECT: - if (rxc >= 1 + (sizeof(struct cmd_draw_rect))) - { - if (command.byteorder == COMMAND_BYTE_ORDER_BIG_ENDIAN) - _swap_data(); - - gs_cmd_rect(gs_get_layer(cmddata.draw_rect.layer), - cmddata.draw_rect.x0, - cmddata.draw_rect.y0, - cmddata.draw_rect.x1, - cmddata.draw_rect.y1, - cmddata.draw_rect.lwidth, - cmddata.draw_rect.color); - - command_reset(); /* we are ready to receive next command */ - } - break; - -/************************************ FILLED RECTANGLE Command 0x56 ****************************/ - case CMD_FILLED_RECT: - if (rxc >= 1 + (sizeof(struct cmd_filled_rect))) - { - if (command.byteorder == COMMAND_BYTE_ORDER_BIG_ENDIAN) - _swap_data(); - - gs_cmd_filled_rect(gs_get_layer(cmddata.filled_rect.layer), - cmddata.filled_rect.x0, - cmddata.filled_rect.y0, - cmddata.filled_rect.x1, - cmddata.filled_rect.y1, - cmddata.filled_rect.dir, - cmddata.filled_rect.color, - cmddata.filled_rect.color1); - command_reset(); /* we are ready to receive next command */ - } - break; - -/************************************ ELLIPSE Command 0x58 ****************************/ - case CMD_ELLIPSE: - if (rxc >= 1 + (sizeof(struct cmd_ellipse))) - { - if (command.byteorder == COMMAND_BYTE_ORDER_BIG_ENDIAN) - _swap_data(); - - gs_cmd_ellipse(gs_get_layer(cmddata.ellipse.layer), - cmddata.ellipse.xc, - cmddata.ellipse.yc, - cmddata.ellipse.rh, - cmddata.ellipse.rv, - cmddata.ellipse.ewidth, - cmddata.ellipse.color); - - command_reset(); /* we are ready to receive next command */ - } - break; - -/************************************ FILLED ELLIPSE Command 0x59 ****************************/ - case CMD_FILL_ELLIPSE: - if (rxc >= 1 + (sizeof(struct cmd_fill_ellipse))) - { - if (command.byteorder == COMMAND_BYTE_ORDER_BIG_ENDIAN) - _swap_data(); - - gs_cmd_fill_ellipse(gs_get_layer(cmddata.fill_ellipse.layer), - cmddata.fill_ellipse.xc, - cmddata.fill_ellipse.yc, - cmddata.fill_ellipse.rh, - cmddata.fill_ellipse.rv, - cmddata.fill_ellipse.color); - - command_reset(); /* we are ready to receive next command */ - } - break; - - - default: - DPRINT("1xn", cmddata.cmd); - - } - - } - } - - //MISO_BUSY(1); // MISO ligh - LPC_IOCON_FUNC_SET(P2_26, LPC_IOCON_P2_26_SSP0_MISO); -} - -/******************** Command Interface ****************/ -void command_set_iface(enum command_interface_t iface) -{ - command.iface = COMMAND_INTERFACE_SPI; -} - -/***********/ -int command_send_data(uint8 *byte) -{ - return 0; -} - -//******************* Swap Bytes MSB-LSB ***************** -#define SWAP16(val) val = ((val) >> 8) | ((val) << 8) -static void _swap_data() -{ - switch (cmddata.cmd) - { - case CMD_DRAW_LINE: - SWAP16(cmddata.draw_line.x0); - SWAP16(cmddata.draw_line.y0); - SWAP16(cmddata.draw_line.x1); - SWAP16(cmddata.draw_line.y1); - SWAP16(cmddata.draw_line.color); - break; - case CMD_DRAW_RECT: - SWAP16(cmddata.draw_rect.x0); - SWAP16(cmddata.draw_rect.y0); - SWAP16(cmddata.draw_rect.x1); - SWAP16(cmddata.draw_rect.y1); - SWAP16(cmddata.draw_rect.color); - break; - case CMD_FILLED_RECT: - SWAP16(cmddata.filled_rect.x0); - SWAP16(cmddata.filled_rect.y0); - SWAP16(cmddata.filled_rect.x1); - SWAP16(cmddata.filled_rect.y1); - SWAP16(cmddata.filled_rect.color); - SWAP16(cmddata.filled_rect.color1); - break; - case CMD_ELLIPSE: - SWAP16(cmddata.ellipse.xc); - SWAP16(cmddata.ellipse.yc); - SWAP16(cmddata.ellipse.rh); - SWAP16(cmddata.ellipse.rv); - SWAP16(cmddata.ellipse.color); - break; - case CMD_FILL_ELLIPSE: - SWAP16(cmddata.fill_ellipse.xc); - SWAP16(cmddata.fill_ellipse.yc); - SWAP16(cmddata.fill_ellipse.rh); - SWAP16(cmddata.fill_ellipse.rv); - SWAP16(cmddata.fill_ellipse.color); - break; - } -} - DELETED firmware/board/lpc17xx/src/command.h Index: firmware/board/lpc17xx/src/command.h ================================================================== --- firmware/board/lpc17xx/src/command.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ -#ifndef _COMMAND_H_ -#define _COMMAND_H_ - -#include - -enum command_interface_t { - COMMAND_INTERFACE_SPI, -}; - -void command_init(); -void command_process(); -void command_reset(); -void command_receive_cb(uint8 byte); -void command_set_iface(enum command_interface_t iface); -int command_send_data(uint8 *byte); - -#endif /* !_COMMAND_H_ */ - DELETED firmware/board/lpc17xx/src/extspi.c Index: firmware/board/lpc17xx/src/extspi.c ================================================================== --- firmware/board/lpc17xx/src/extspi.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ -#include -#include -#include -#include -#include "extspi.h" -#include "command.h" - -#define DEBUG_EXTSPI - -#ifdef DEBUG_EXTSPI - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - - -enum extspi_state_t { - EXTSPI_STATE_IDLE, - EXTSPI_STATE_WAIT_DATA, -}; - -static enum extspi_state_t state; - -static int _rx_data(); - - -/* - * - */ -void extspi_init() -{ - /* Setup IO for SPI mode - * EXT_SS P2.23/SSEL0 - * EXT_SCK P2.22/SCK0 - * EXT_MOSI P2.26/MISO0 - * EXT_MISO P2.27/MOSI0 - */ - { -#define CS_VAL() (LPC_GPIO2->PIN & (1 << 23)) - LPC_IOCON_FUNC_SET(P2_23, LPC_IOCON_P2_23_SSP0_SSEL); - LPC_IOCON_FUNC_SET(P2_22, LPC_IOCON_P2_22_SSP0_SCK); - LPC_IOCON_FUNC_SET(P2_26, LPC_IOCON_P2_26_SSP0_MISO); - LPC_IOCON_FUNC_SET(P2_27, LPC_IOCON_P2_27_SSP0_MOSI); - } -#define EXTSPI_SSP LPC_SSP0 -#define PCONP_BIT PCONP_PCSSP0 - -#define GET_DATA() (EXTSPI_SSP->DR) -#define SEND_DATA(byte) (EXTSPI_SSP->DR = byte) - - /* Setup SSP controller */ - { - /* - * NOTE - * - * Clock rate not relevant in slave mode, but setup it anyway. - * - * In Slave mode, the SSP clock rate provided by the master must - * not exceed 1/12 of the peripheral clock selected in - * Section 3.3.21. The content of the SSPnCPSR register is not - * relevant. - * - * - * Freq = PCLK / (CPSDVSR * (SCR + 1)) - * - * speed bits: - * 0..7 CPSDVSR (even values between 2 and 254) - * 8..15 SCR - */ -#if CLK_PCLK == (24 * 1000 * 1000) - #define SSP_SPEED_12MHZ_24MHZ (2 | (0 << 8)) - - #define SSP_SPEED SSP_SPEED_12MHZ_24MHZ -#else - #error Unknown PCLK frequency -#endif - - LPC_SC->PCONP |= PCONP_BIT; - - /* - * NOTE - * CPOL 0 - * CPHA 1 - */ - EXTSPI_SSP->CR1 = 0; - EXTSPI_SSP->CR0 = SSP_CR0_CPHA | SSP_CR0_DSS_8BIT | SSP_CR0_FRF_SPI | SSP_CR0_SCR(SSP_SPEED >> 8); - EXTSPI_SSP->CPSR = SSP_CPSR_CPSDVSR(SSP_SPEED & 0xff); - EXTSPI_SSP->CR1 = SSP_CR1_SSE | SSP_CR1_MS_SLAVE; - - GET_DATA(); - } -} - -/* - * - */ -void extspi_process() -{ - uint8 send; - - /* if CS high - return to IDLE state */ - if (CS_VAL() != 0) - { - state = EXTSPI_STATE_IDLE; - return; - } - - if (state == EXTSPI_STATE_IDLE) - { - state = EXTSPI_STATE_WAIT_DATA; - - /* - * Reset command state and select SPI as command interface - */ - command_reset(); - command_set_iface(COMMAND_INTERFACE_SPI); - } - - /* wait for incoming byte */ - if (!_rx_data()) - return; - - command_receive_cb(GET_DATA()); - - if (command_send_data(&send)) - { - SEND_DATA(send); - } -} - -/* - * - */ -static int _rx_data() -{ - if (EXTSPI_SSP->SR & SSP_SR_RNE) - return 1; - return 0; -} - DELETED firmware/board/lpc17xx/src/extspi.h Index: firmware/board/lpc17xx/src/extspi.h ================================================================== --- firmware/board/lpc17xx/src/extspi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ -#ifndef _EXTSPI_H -#define _EXTSPI_H - -#include - -void extspi_init(); -void extspi_process(); - -#endif - DELETED firmware/board/lpc17xx/src/gs/gs.c Index: firmware/board/lpc17xx/src/gs/gs.c ================================================================== --- firmware/board/lpc17xx/src/gs/gs.c +++ /dev/null @@ -1,610 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include "gs.h" -#include "gs_hw.h" -#include "gs_data.h" - -#define GS_LAYER_COUNT 2 -static struct gs_layer_t gslayer[GS_LAYER_COUNT]; - -union gs_pixel_t gs_mem[GS_MEM_BUFNUM][GS_BUF_SIZE] __attribute((section("gsmem"))); -struct gs_t gs; - -/************************* Init Display ***************************/ -void gs_init() -{ - gs_hw_init(); - - gs.abuf = 0; - gs.bgcolor.value = GS_DEFAULT_COLOR; - - gslayer[GS_LAYER_FRONT_BUFFER].x = 0; - gslayer[GS_LAYER_FRONT_BUFFER].y = 0; - gslayer[GS_LAYER_FRONT_BUFFER].width = GS_RES_HORIZONTAL; - gslayer[GS_LAYER_FRONT_BUFFER].height = GS_RES_VERTICAL; - - gslayer[GS_LAYER_BACK_BUFFER].x = 0; - gslayer[GS_LAYER_BACK_BUFFER].y = 0; - gslayer[GS_LAYER_BACK_BUFFER].width = GS_RES_HORIZONTAL; - gslayer[GS_LAYER_BACK_BUFFER].height = GS_RES_VERTICAL; - - gs_cmd_clear(); - gs_cmd_flip(); - gs_cmd_syncbuf(); -} - -/* - * get pointer to layer from enumeration - * - * RETURN - * pointer to layer structure or NULL on error - */ -struct gs_layer_t * gs_get_layer(int lnum) -{ - switch (lnum) - { - case GS_LAYER_FRONT_BUFFER: - { - gslayer[GS_LAYER_FRONT_BUFFER].mem = gs_active_buf; - return &gslayer[GS_LAYER_FRONT_BUFFER]; - } -#if GS_DOUBLE_BUF - case GS_LAYER_BACK_BUFFER: - { - gslayer[GS_LAYER_BACK_BUFFER].mem = gs_inactive_buf; - return &gslayer[GS_LAYER_BACK_BUFFER]; - } -#endif - default: - debug_emsgf("unknown layer", "1xn", lnum); - } - - return NULL; -} - - -/*********************************************** - * LCD command interface - **********************************************/ - -/************* fill display with background ***************/ -void gs_cmd_clear() -{ - union gs_pixel_t *mem; - int h, w; - - mem = gs_inactive_buf; - h = GS_RES_VERTICAL; - - while (h--) - { - w = GS_RES_HORIZONTAL; - while (w--) - { - (mem++)->value = gs.bgcolor.value; - } - } -} - -#if GS_DOUBLE_BUF -/**************** switch back buffer and active buffer ******************/ -void gs_cmd_flip() -{ - gs_hw_wait_vsync(); - gs.abuf ^= 0x01; - gs_hw_set_active_buffer(gs_active_buf); -} - -/*************** copy active buffer to back buffer ********************/ -void gs_cmd_syncbuf() -{ - union gs_pixel_t *src; - union gs_pixel_t *dst; - int n; - - src = gs_active_buf; - dst = gs_inactive_buf; - n = GS_PIXELNUM; - - while (n--) - (dst++)->value = (src++)->value; -} -#endif /* GS_DOUBLE_BUF */ - -/************************ draw line *************************/ -/* ARGS - * layer layer to draw to - * x0 x coordinate of start - * y0 y coordinate of start - * x1 x coordinate of end - * y1 y coordinate of end - * color color of line - */ - -void gs_cmd_line(struct gs_layer_t *layer, int x0, int y0, int x1, int y1, GS_COLOR color) -{ - - int lengthX, lengthY, length, dx, dy; - union gs_pixel_t *mem; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - if (x0 < 0 || y0 < 0 || x1 < 0 || y1 < 0 || - x1 >= layer->width || y1 >= layer->height || - x0 >= layer->width || y0 >= layer->height) /* sanity check */ - return; - if (x0 > x1 && y0 > y1) /* XY reorder */ - { - int temp = x0; - x0 = x1; - x1 = temp; - temp = y0; - y0 = y1; - y1 = temp; - } - dx = (x1 - x0 >= 0 ? 1 : -1); - dy = (y1 - y0 >= 0 ? 1 : -1); - lengthX = (x1 > x0) ? (x1 - x0) : (x0 - x1); - lengthY = (y1 > y0) ? (y1 - y0) : (y0 - y1); - length = (lengthX > lengthY) ? lengthX : lengthY; - if (length == 0) - { - mem = &layer->mem[layer->width * y0 + x0]; - mem->value = color; - } - if (lengthY <= lengthX) - { - int x = x0; - int y = y0; - int d = -lengthX; - length++; - while(length--) - { - mem = &layer->mem[layer->width * y + x]; - mem->value = color; - x += dx; - d += 2 * lengthY; - if (d > 0) { - d -= 2 * lengthX; - y += dy; - } - } - } - else - { - int x = x0; - int y = y0; - int d = - lengthY; - length++; - while(length--) - { - mem = &layer->mem[layer->width * y + x]; - mem->value = color; - y += dy; - d += 2 * lengthX; - if (d > 0) { - d -= 2 * lengthY; - x += dx; - } - } - } -} - -/********************* draw rectangle **********************/ -/* ARGS - * layer layer to draw to - * x0 x coordinate of top left corner - * y0 y coordinate of top left corner - * x1 x coordinate of bottom right corner - * y1 y coordinate of bottom right corner - * lwidth width of line - * color color of line - */ -void gs_cmd_rect(struct gs_layer_t *layer, int x0, int y0, int x1, int y1, int lwidth, GS_COLOR color) -{ - int cnt; - union gs_pixel_t *mem; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - if (lwidth == 0 || x0 < 0 || y0 < 0 || x1 < 0 || y1 < 0) /* sanity check */ - return; - - if (x0 > x1) /* X reorder */ - { - cnt = x0; - x0 = x1; - x1 = cnt; - } - - if (y0 > y1) /* Y reorder */ - { - cnt = y0; - y0 = y1; - y1 = cnt; - } - - if (x1 >= layer->width || y1 >= layer->height) - return; - - mem = &layer->mem[layer->width * y0 + x0]; /* upper and bottom lines */ - cnt = x1 - x0 + 1; - while (cnt--) - { - mem->value = color; - mem++; - } - mem = &layer->mem[layer->width * y1 + x0]; - cnt = x1 - x0 + 1; - while (cnt--) - { - mem->value = color; - mem++; - } - - mem = &layer->mem[layer->width * y0 + x0]; /* left and right lines */ - cnt = y1 - y0 + 1; - while (cnt--) - { - mem->value = color; - mem += layer->width; - } - mem = &layer->mem[layer->width * y0 + x1]; - cnt = y1 - y0 + 1; - while (cnt--) - { - mem->value = color; - mem += layer->width; - } - - /* XXX be care, recurse */ - if (lwidth > 1) - { - x0++; y0++; - x1--; y1--; - gs_cmd_rect(layer, x0, y0, x1, y1, lwidth - 1, color); - } -} - - -/********************* draw filled rectangle **********************/ -/* ARGS - * layer layer to draw to - * x0 x coordinate of top left corner - * y0 y coordinate of top left corner - * x1 x coordinate of bottom right corner - * y1 y coordinate of bottom right corner - * dir gradient direction - 0=horizontal, 1=horiz_>|<, 2=vertical, 3=vert_>\< - * color first color of line - * color1 second color of line - */ -void gs_cmd_filled_rect(struct gs_layer_t *layer, int x0, int y0, int x1, int y1, int dir, GS_COLOR color, GS_COLOR color1) -{ - int cnt; - union gs_pixel_t *mem; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - if (x0 < 0 || y0 < 0 || x1 < 0 || y1 < 0) /* sanity check */ - return; - if (x0 > x1) /* X reorder */ - { - cnt = x0; - x0 = x1; - x1 = cnt; - } - if (y0 > y1) /* Y reorder */ - { - cnt = y0; - y0 = y1; - y1 = cnt; - } - if (x1 >= layer->width || y1 >= layer->height) /* sanity postcheck */ - return; - - if (color == color1) /* monocolor */ - { - for (; y0 <= y1; y0++) - { - mem = &layer->mem[layer->width * y0 + x0]; - cnt = x1 - x0 + 1; - while (cnt--) - (mem++)->value = color; - } - } - else - { - union gs_pixel_t pix; - union gs_pixel_t pix1; - pix.value = color; - pix1.value = color1; - int rwidth, rheight; - rwidth = x1 - x0; - rheight = y1 - y0; - float dred, dgreen, dblue,tred, tgreen, tblue; - dred = pix1.red - pix.red; - dgreen = pix1.green - pix.green; - dblue = pix1.blue - pix.blue; - - if (dir == 0) /* horizontal gradient*/ - { - dred /= rwidth; - dgreen /= rwidth; - dblue /= rwidth; - pix.value = color; - tred = pix.red; - tgreen = pix.green; - tblue = pix.blue; - for (; x0 <= x1; x0++) - { - mem = &layer->mem[layer->width * y0 + x0]; - cnt = rheight + 1; - while (cnt--) - { - mem->value = pix.value; - mem += layer->width; - } - tred +=dred; - tgreen += dgreen; - tblue += dblue; - pix.red = tred; - pix.green = tgreen; - pix.blue = tblue; - } - } - - if (dir == 1) /* horizontal >|< gradient*/ - { - dred /= rwidth; - dgreen /= rwidth; - dblue /= rwidth; - dred += dred; - dgreen += dgreen; - dblue += dblue; - pix.value = color; - tred = pix.red; - tgreen = pix.green; - tblue = pix.blue; - - for (; x0 <= (x1/2); x0++) - { - mem = &layer->mem[layer->width * y0 + x0]; - cnt = rheight + 1; - while (cnt--) - { - mem->value = pix.value; - mem += layer->width; - } - tred +=dred; - tgreen += dgreen; - tblue += dblue; - pix.red = tred + 0.5; - pix.green = tgreen + 0.5; - pix.blue = tblue + 0.5; - } - x0 = x1/2 + 1; - for (; x0 <= x1; x0++) - { - mem = &layer->mem[layer->width * y0 + x0]; - cnt = rheight + 1; - while (cnt--) - { - mem->value = pix.value; - mem += layer->width; - } - tred -=dred; - tgreen -= dgreen; - tblue -= dblue; - pix.red = tred; - pix.green = tgreen; - pix.blue = tblue; - } - } - - if (dir == 2) /* vertical gradient*/ - { - dred /= rheight; - dgreen /= rheight; - dblue /= rheight; - pix.value = color; - tred = pix.red; - tgreen = pix.green; - tblue = pix.blue; - for (; y0 <= y1; y0++) - { - mem = &layer->mem[layer->width * y0 + x0]; - cnt = rwidth + 1; - while (cnt--) - { - mem->value = pix.value; - mem ++; - } - tred +=dred; - tgreen += dgreen; - tblue += dblue; - pix.red = tred; - pix.green = tgreen; - pix.blue = tblue; - } - } - } -} - - -/************************* draw ellipse ***********************/ -/* ARGS - * layer layer to draw to - * xc x coordinate of center - * yc y coordinate of center - * rh horizontal radius - * rv vertical radius - * ewidth width of ellipse - * color color of line - */ -void gs_cmd_ellipse(struct gs_layer_t *layer, int xc, int yc, int rh, int rv, int ewidth, GS_COLOR color) -{ - int x, y; - int a, b; - int a2, ta2; - int b2, tb2; - int d, dx, dy; - union gs_pixel_t *mem; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - if (ewidth == 0 || xc < 0 || yc < 0 || rh < 0 || rv < 0) - return; - if (xc <= rh || yc <= rv || ewidth >= rh || ewidth >= rv || - xc + rh >= layer->width || yc + rv >= layer->height) /* sanity check */ - return; - - x = 0; - y = rh; - a = rv; - b = rh; - a2 = a * a; - ta2 = 2 * a2; - b2 = b * b; - tb2 = 2 * b2; - d = b2 - a2 * b + a2 / 4; - dx = 0; - dy = ta2 * b; - - while (dx < dy) - { - mem = &layer->mem[layer->width * (yc + y) + xc + x]; - mem->value = color; - mem = mem - x - x; - mem->value = color; - mem = &layer->mem[layer->width * (yc - y) + xc + x]; - mem->value = color; - mem = mem - x - x; - mem->value = color; - if (d > 0) - { - y--; - dy -= ta2; - d -= dy; - } - x++; - dx += tb2; - d += b2 + dx; - } - d += (3 * (a2 - b2) / 2 - (dx + dy)) / 2; - while (y >= 0) - { - mem = &layer->mem[layer->width * (yc + y) + xc + x]; - mem->value = color; - mem = mem - x - x; - mem->value = color; - mem = &layer->mem[layer->width * (yc - y) + xc + x]; - mem->value = color; - mem = mem - x - x; - mem->value = color; - if (d < 0) - { - x++; - dx += tb2; - d += dx; - } - y--; - dy -= ta2; - d += a2 - dy; - } - - if (ewidth > 1) /* XXX be care, recurse */ - { - rh--; rv--; - gs_cmd_ellipse(layer, xc, yc, rh, rv, ewidth - 1, color); - } -} - -/************************* draw filled ellipse ***********************/ -/* ARGS - * layer layer to draw to - * xc x coordinate of center - * yc y coordinate of center - * rh horizontal radius - * rv vertical radius - * color color of ellipse - */ -void gs_cmd_fill_ellipse(struct gs_layer_t *layer, int xc, int yc, int rh, int rv, GS_COLOR color) -{ - int y, x, x0, x1, dx; - int hh, ww, hhww; - union gs_pixel_t *mem; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - if (xc <= rh || yc <= rv || xc + rh >= layer->width || yc + rv >= layer->height) /* sanity check */ - return; - - hh = rv * rv; - ww = rh * rh; - hhww = hh * ww; - x0 = rh; - dx = 0; - for (x = -rh; x <= rh; x++) // do the horizontal diameter - { - mem = &layer->mem[layer->width * yc + xc + x]; - mem->value = color; - } - for (y = 1; y <= rv; y++) // now do both halves at the same time, away from the diameter - { - x1 = x0 - (dx - 1); // try slopes of dx - 1 or more - for ( ; x1 > 0; x1--) - { - if (x1*x1*hh + y*y*ww <= hhww) - break; - dx = x0 - x1; // current approximation of the slope - x0 = x1; - } - for (x = -x0; x <= x0; x++) - { - mem = &layer->mem[layer->width * (yc - y) + xc + x]; - mem->value = color; - mem = &layer->mem[layer->width * (yc + y) + xc + x]; - mem->value = color; - } - } -} - DELETED firmware/board/lpc17xx/src/gs/gs.h Index: firmware/board/lpc17xx/src/gs/gs.h ================================================================== --- firmware/board/lpc17xx/src/gs/gs.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef _GS_H_ -#define _GS_H_ - -#include - -/**************************************************/ -#define GS_RES_HORIZONTAL 800 -#define GS_RES_VERTICAL 600 -#define GS_PIXEL_DEPTH 2 /* 24 bpp */ -#define GS_DOUBLE_BUF 1 -/**************************************************/ - -#if (GS_PIXEL_DEPTH == 4) - typedef uint32 GS_COLOR; - - #define GS_RGB2COLOR(r, g, b) ((0xff << 24) | ((b) << 16) | ((g) << 8) | (r)) -#elif (GS_PIXEL_DEPTH == 2) - typedef uint16 GS_COLOR; - #define GS_RGB2COLOR(r, g, b) (((b) << 11) | ((g) << 5) | (r)) - - #define GS_COLOR_WHITE GS_RGB2COLOR(31, 63, 31) - #define GS_COLOR_YELLOW GS_RGB2COLOR(31, 63, 0) - #define GS_COLOR_RED GS_RGB2COLOR(31, 0, 0) - #define GS_COLOR_GREEN GS_RGB2COLOR( 0, 63, 0) - #define GS_COLOR_BLUE GS_RGB2COLOR( 0, 0, 31) -#else - #error Unknown pixel size -#endif - -#define GS_DEFAULT_COLOR GS_RGB2COLOR(4, 8, 4) - -#if GS_DOUBLE_BUF - #define GS_MEM_BUFNUM 2 /* 2 for double buffered memory, 1 for single buffer */ -#else - #define GS_MEM_BUFNUM 1 /* 2 for double buffered memory, 1 for single buffer */ -#endif - -#define GS_PIXELNUM (GS_RES_HORIZONTAL * GS_RES_VERTICAL) -#define GS_MEM_SIZE (GS_PIXELNUM * GS_PIXEL_DEPTH) -/* - * NOTE - * Base address should be doubleword aligned. First buffer is aligned by linker script. - * Check that second buffer also alligned. If not then add additional pixels. - */ -#define GS_BUF_SIZE (GS_PIXELNUM + (8 - (GS_PIXELNUM % 8))) - -#pragma pack(push, 1) -union gs_pixel_t { - GS_COLOR value; -#if (GS_PIXEL_DEPTH == 4) - struct { - uint8 red; - uint8 green; - uint8 blue; - uint8 a; /* NOTE unused */ - }; -#elif (GS_PIXEL_DEPTH == 2) - struct { - uint8 red : 5; - uint8 green : 6; - uint8 blue : 5; - }; -#endif -}; -#pragma pack(pop) - -struct gs_t { -#if GS_DOUBLE_BUF - int abuf; /* current active buffer (displayed on LCD) */ -#endif - union gs_pixel_t bgcolor; /* background color */ -}; - -#if GS_DOUBLE_BUF - #define gs_active_buf (gs_mem[(gs.abuf & 0x01)]) - #define gs_inactive_buf (gs_mem[(gs.abuf & 0x01) ^ 0x01]) -#else - #define gs_active_buf (gs_mem[0]) - #define gs_inactive_buf gs_active_buf -#endif - -struct gs_layer_t { - int x; - int y; - int width; - int height; - - union gs_pixel_t *mem; -}; - -#define GS_LAYER_FRONT_BUFFER 0 -#if GS_DOUBLE_BUF -#define GS_LAYER_BACK_BUFFER 1 -#endif - -extern struct gs_t gs; -extern union gs_pixel_t gs_mem[GS_MEM_BUFNUM][GS_BUF_SIZE]; - -void gs_init(); -struct gs_layer_t *gs_get_layer(int lnum); - -/*********************************************** - * LCD command interface - **********************************************/ -void gs_cmd_clear(); -#if GS_DOUBLE_BUF - void gs_cmd_flip(); - void gs_cmd_syncbuf(); -#else - #define gs_cmd_flip() - #define gs_cmd_syncbuf() -#endif -void gs_cmd_line(struct gs_layer_t *layer, int x0, int y0, int x1, int y1, GS_COLOR color); -void gs_cmd_rect(struct gs_layer_t *layer, int x0, int y0, int x1, int y1, int lwidth, GS_COLOR color); -void gs_cmd_filled_rect(struct gs_layer_t *layer, int x0, int y0, int x1, int y1, int dir, GS_COLOR color, GS_COLOR color1); -void gs_cmd_ellipse(struct gs_layer_t *layer, int xc, int yc, int rh, int rv, int ewidth, GS_COLOR color); -void gs_cmd_fill_ellipse(struct gs_layer_t *layer, int xc, int yc, int rh, int rv, GS_COLOR color); -/*********************************************** - * - **********************************************/ - -#include "gs_text.h" -#include "gs_data.h" -#include "gs_image.h" - -#endif /* !_GS_H_ */ - DELETED firmware/board/lpc17xx/src/gs/gs_data.c Index: firmware/board/lpc17xx/src/gs/gs_data.c ================================================================== --- firmware/board/lpc17xx/src/gs/gs_data.c +++ /dev/null @@ -1,4164 +0,0 @@ -/* - * built-in fonts, images - */ -#include "gs.h" - -/* - * http://terminus-font.sourceforge.net/ - * - * ./bdf2raw.tcl ter-u32b.bdf uni32b.bin 0x00 0x04 - * ./bin2c.lua /dev/shm/uni32b.bin - | xclip - * - * For format of binary font data look at "gs_text.h" - */ -const char gs_data_font_ter32b[] = { - 0xBE, 0xEF, 0x01, 0x20, 0x01, 0x02, 0x02, 0x20, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8E, 0x03, 0x1C, 0x07, 0x38, 0x0E, 0x70, 0x1C, - 0x00, 0x00, 0x00, 0x00, 0x1C, 0x70, 0x1C, 0x70, - 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, - 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, - 0x1C, 0x70, 0x1C, 0x78, 0xFC, 0x3F, 0xFC, 0x1F, - 0x1C, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0xF8, 0x3F, - 0xF0, 0x3F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x70, - 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x00, - 0x00, 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, - 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, - 0x70, 0x1C, 0x70, 0x1C, 0x78, 0xFC, 0x3F, 0xFC, - 0x1F, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, - 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x1C, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x70, 0x1C, 0x70, 0x1C, 0x70, - 0x1C, 0x70, 0x1C, 0x00, 0x00, 0x0E, 0x70, 0x0E, - 0x70, 0x0E, 0x70, 0x0E, 0x70, 0x0E, 0x70, 0x0E, - 0x70, 0x0E, 0x7F, 0x8E, 0x7F, 0xCE, 0x73, 0xCE, - 0x71, 0xCE, 0x71, 0xCE, 0x71, 0xCE, 0x71, 0xCE, - 0x71, 0xCE, 0x71, 0xCE, 0x71, 0xCE, 0x71, 0xCE, - 0x73, 0x8E, 0x7F, 0x0E, 0x7F, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x1C, - 0x70, 0x1C, 0x70, 0x1C, 0x70, 0x1C, 0x00, 0x00, - 0x00, 0x00, 0x0E, 0x70, 0x0E, 0x70, 0x0E, 0x70, - 0x0E, 0x70, 0x0E, 0x7F, 0x8E, 0x7F, 0xCE, 0x73, - 0xCE, 0x71, 0xCE, 0x71, 0xCE, 0x71, 0xCE, 0x71, - 0xCE, 0x73, 0x8E, 0x7F, 0x0E, 0x7F, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, -}; - DELETED firmware/board/lpc17xx/src/gs/gs_data.h Index: firmware/board/lpc17xx/src/gs/gs_data.h ================================================================== --- firmware/board/lpc17xx/src/gs/gs_data.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _GS_DATA_H -#define _GS_DATA_H - -#include "gs.h" - -extern const char gs_data_font_ter32b[]; - -#endif /* !_GS_DATA_H */ - DELETED firmware/board/lpc17xx/src/gs/gs_hw.c Index: firmware/board/lpc17xx/src/gs/gs_hw.c ================================================================== --- firmware/board/lpc17xx/src/gs/gs_hw.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include "gs.h" -#include "gs_hw.h" -#include "../irqp.h" - -#define DEBUG_GS_HW - -#ifdef DEBUG_GS_HW - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - - -#define LCD_CLKRATE (48 * 1000 * 1000) /* Hz */ - -#define LCD_CLKDIV (CLK_CCLK / LCD_CLKRATE) -#if (LCD_CLKDIV > 31) - #error LCD clock divider too high -#endif -#define LCD_HSW 30 /* clocks, horizontal synchonization pulse width */ -#define LCD_HFP 30 /* clocks, horizontal front porch */ -#define LCD_HBP 60 /* clocks, horizontal back porch */ -#define LCD_VSW 25 /* lines, vertical synchronization pulse width */ -#define LCD_VFP 2 /* lines, vertical front porch */ -#define LCD_VBP 8 /* lines, vertical back porch */ - - -static const struct gpio_t lcd_reset = {LPC_GPIO0, (1 << 15)}; -#define GSP_HW_RESET_SET() {gpio_drive(&lcd_reset, 0);} -#define GSP_HW_RESET_RELEASE() {gpio_drive(&lcd_reset, 1);} - -/* - * - */ -void gs_hw_init() -{ - /* - * configure pins - * - * P2[0] LCD_PWR (FUNC 7) -> NC ? - * P2[1] LCD_LE (FUNC 7) -> NC XXX backlight control? - * P2[2] LCD_DCLK (FUNC 7) -> PCLK - * P2[3] LCD_FP (FUNC 7) -> VS - * P2[4] LCD_ENAB_M (FUNC 7) -> DE - * P2[5] LCD_LP (FUNC 7) -> HS - * - * P0[4] LCD_VD0 (FUNC 7) -> R0 - * P0[5] LCD_VD1 (FUNC 7) -> R1 - * P4[28] LCD_VD2 (FUNC 7) -> R2 - * P4[29] LCD_VD3 (FUNC 7) -> R3 - * P2[6] LCD_VD4 (FUNC 7) -> R4 - * P2[7] LCD_VD5 (FUNC 7) -> R5 - * P2[8] LCD_VD6 (FUNC 7) -> R6 - * P2[9] LCD_VD7 (FUNC 7) -> R7 - * - * P0[6] LCD_VD8 (FUNC 7) -> G0 - * P0[7] LCD_VD9 (FUNC 7) -> G1 - * P1[20] LCD_VD10 (FUNC 7) -> G2 - * P1[21] LCD_VD11 (FUNC 7) -> G3 - * P1[22] LCD_VD12 (FUNC 7) -> G4 - * P1[23] LCD_VD13 (FUNC 7) -> G5 - * P1[24] LCD_VD14 (FUNC 7) -> G6 - * P1[25] LCD_VD15 (FUNC 7) -> G7 - * - * P0[8] LCD_VD16 (FUNC 7) -> B0 - * P0[9] LCD_VD17 (FUNC 7) -> B1 - * P2[12] LCD_VD18 (FUNC 7) -> B2 - * P2[13] LCD_VD19 (FUNC 7) -> B3 - * P1[26] LCD_VD20 (FUNC 7) -> B4 - * P1[27] LCD_VD21 (FUNC 7) -> B5 - * P1[28] LCD_VD22 (FUNC 7) -> B6 - * P1[29] LCD_VD23 (FUNC 7) -> B7 - * - * P0[15] -> Reset - */ - gpio_setdir(&lcd_reset, GPIO_DIR_OUTPUT); - GSP_HW_RESET_SET(); - - LPC_IOCON_FUNC_SET(P2_2, 7); /* LCD_DCLK -> PCLK */ - LPC_IOCON_FUNC_SET(P2_3, 7); /* LCD_FP -> VS */ - LPC_IOCON_FUNC_SET(P2_4, 7); /* LCD_ENAB_M -> DE */ - LPC_IOCON_FUNC_SET(P2_5, 7); /* LCD_LP -> HS */ - - LPC_IOCON_FUNC_SET(P0_4, 7); /* LCD_VD0 -> R0 */ - LPC_IOCON_FUNC_SET(P0_5, 7); /* LCD_VD1 -> R1 */ - LPC_IOCON_FUNC_SET(P4_28, 7); /* LCD_VD2 -> R2 */ - LPC_IOCON_FUNC_SET(P4_29, 7); /* LCD_VD3 -> R3 */ - LPC_IOCON_FUNC_SET(P2_6, 7); /* LCD_VD4 -> R4 */ - LPC_IOCON_FUNC_SET(P2_7, 7); /* LCD_VD5 -> R5 */ - LPC_IOCON_FUNC_SET(P2_8, 7); /* LCD_VD6 -> R6 */ - LPC_IOCON_FUNC_SET(P2_9, 7); /* LCD_VD7 -> R7 */ - - LPC_IOCON_FUNC_SET(P0_6, 7); /* LCD_VD8 -> G0 */ - LPC_IOCON_FUNC_SET(P0_7, 7); /* LCD_VD9 -> G1 */ - LPC_IOCON_FUNC_SET(P1_20, 7); /* LCD_VD10 -> G2 */ - LPC_IOCON_FUNC_SET(P1_21, 7); /* LCD_VD11 -> G3 */ - LPC_IOCON_FUNC_SET(P1_22, 7); /* LCD_VD12 -> G4 */ - LPC_IOCON_FUNC_SET(P1_23, 7); /* LCD_VD13 -> G5 */ - LPC_IOCON_FUNC_SET(P1_24, 7); /* LCD_VD14 -> G6 */ - LPC_IOCON_FUNC_SET(P1_25, 7); /* LCD_VD15 -> G7 */ - - LPC_IOCON_FUNC_SET(P0_8, 7); /* LCD_VD16 -> B0 */ - LPC_IOCON_FUNC_SET(P0_9, 7); /* LCD_VD17 -> B1 */ - LPC_IOCON_FUNC_SET(P2_12, 7); /* LCD_VD18 -> B2 */ - LPC_IOCON_FUNC_SET(P2_13, 7); /* LCD_VD19 -> B3 */ - LPC_IOCON_FUNC_SET(P1_26, 7); /* LCD_VD20 -> B4 */ - LPC_IOCON_FUNC_SET(P1_27, 7); /* LCD_VD21 -> B5 */ - LPC_IOCON_FUNC_SET(P1_28, 7); /* LCD_VD22 -> B6 */ - LPC_IOCON_FUNC_SET(P1_29, 7); /* LCD_VD23 -> B7 */ - - LPC_SC->PCONP |= PCONP_PCLCD; - LPC_LCD->CTRL = 0; /* disable LCD controller */ - - LPC_SC->LCD_CFG = (LCD_CLKDIV - 1); - -#define LCD_POL_CLKSEL_CCLK (0 << 5) /* clock source is CCLK */ -#define LCD_POL_CLKSEL_CLKIN (1 << 5) /* clock source is LCD_CLKIN */ -#define LCD_POL_IVS_FP_ACTIVE_HIGH (0 << 11) /* frame pulse (vsync) active HIGH */ -#define LCD_POL_IVS_FP_ACTIVE_LOW (1 << 11) /* frame pulse (vsync) active LOW */ -#define LCD_POL_IHS_LP_ACTIVE_HIGH (0 << 12) /* line pulse (hsync) active HIGH */ -#define LCD_POL_IHS_LP_ACTIVE_LOW (1 << 12) /* line pulse (hsync) active LOW */ -#define LCD_POL_IPC_CHANGE_RISING (0 << 13) /* data is driven on the LCD lines on the RISING edge */ -#define LCD_POL_IPC_CHANGE_FALLING (1 << 13) /* data is driven on the LCD lines on the FALLING edge */ -#define LCD_POL_IOE_ACTIVE_HIGH (0 << 14) /* LCD_ENAB_M pin is active HIGH */ -#define LCD_POL_IOE_ACTIVE_LOW (1 << 14) /* LCD_ENAB_M pin is active HIGH */ -#define LCD_POL_BCD (1 << 26) /* bypass pixel clock divider */ - LPC_LCD->POL = - LCD_POL_CLKSEL_CCLK | - LCD_POL_IVS_FP_ACTIVE_LOW | - LCD_POL_IHS_LP_ACTIVE_LOW | - LCD_POL_BCD | -// LCD_POL_IPC_CHANGE_FALLING | - ((GS_RES_HORIZONTAL - 1) << 16); /* CPL, clock per line. */ - - LPC_LCD->TIMH = - ((GS_RES_HORIZONTAL / 16 - 1) << 2) | /* PPL, pixel per line */ - ((LCD_HSW - 1) << 8) | /* HSW, horizontal synchonization pulse width */ - ((LCD_HFP - 1) << 16) | /* HFP, horizontal front porch */ - ((LCD_HBP - 1) << 24); /* HBP, horizontal back porch */ - - LPC_LCD->TIMV = - (GS_RES_VERTICAL - 1) | /* Lines per panel. This is the number of active lines per screen */ - ((LCD_VSW - 1) << 10) | /* VSW, vertical synchronization pulse width */ - ((LCD_VFP - 1) << 16) | /* VFP, vertical front porch */ - ((LCD_VBP - 1) << 24); /* VBP, vertical back porch */ - - gs_hw_set_active_buffer(gs_active_buf); /* NOTE gsp.mem should be initialized */ -#define LCD_CTRL_LCDEN (1 << 0) /* LCD enable control bit */ -#define LCD_CTRL_BPP_1BPP (0 << 1) /* LCD bits per pixel, 1 bpp */ -#define LCD_CTRL_BPP_2BPP (1 << 1) /* 2 bpp */ -#define LCD_CTRL_BPP_4BPP (2 << 1) /* 4 bpp */ -#define LCD_CTRL_BPP_8BPP (3 << 1) /* 8 bpp */ -#define LCD_CTRL_BPP_16BPP (4 << 1) /* 16 bpp */ -#define LCD_CTRL_BPP_24BPP (5 << 1) /* 24 bpp (TFT panel only) */ -#define LCD_CTRL_BPP_16BPP_565 (6 << 1) /* 16 bpp, 5:6:5 mode */ -#define LCD_CTRL_BPP_12BPP_444 (7 << 1) /* 12 bpp, 4:4:4 mode */ -#define LCD_CTRL_LCDBW_COLOR (0 << 4) /* STN LCD is color */ -#define LCD_CTRL_LCDBW_MONOCH (1 << 4) /* STN LCD is monochrome */ -#define LCD_CTRL_LCDTFT_STN (0 << 5) /* LCD is STN. Use grayscaller */ -#define LCD_CTRL_LCDTFT_TFT (1 << 5) /* LCD is TFT. Do not use grayscaller */ -#define LCD_CTRL_LCDMONO8_4BIT (0 << 6) /* monochrome LCD uses a 4-bit interface */ -#define LCD_CTRL_LCDMONO8_8BIT (1 << 6) /* monochrome LCD uses a 8-bit interface */ -#define LCD_CTRL_LCDDUAL_SINGLE (0 << 7) /* STN LCD interface is single-panel */ -#define LCD_CTRL_LCDDUAL_DUAL (1 << 7) /* STN LCD interface is dual-panel */ -#define LCD_CTRL_BGR_RGB (0 << 8) /* RGB: normal output */ -#define LCD_CTRL_BGR_BGR (1 << 8) /* BGR: red and blue swapped */ -#define LCD_CTRL_BEPO_BYTE_LE (0 << 9) /* little endian byte order in memory */ -#define LCD_CTRL_BEPO_BYTE_BE (1 << 9) /* big endian byte order in memory */ -#define LCD_CTRL_BEPO_PIXEL_LE (0 << 10) /* little endian ordering within byte */ -#define LCD_CTRL_BEPO_PIXEL_BE (1 << 10) /* big endian ordering within byte */ -#define LCD_CTRL_LCDPWR (1 << 11) /* LCD power enable */ -#define LCD_CTRL_LCDVCOMP_VS (0 << 12) /* LCD Vertical Compare interrupt. Start of vertical sync. */ -#define LCD_CTRL_LCDVCOMP_BP (1 << 12) /* start of back porch */ -#define LCD_CTRL_LCDVCOMP_AV (2 << 12) /* start of active video */ -#define LCD_CTRL_LCDVCOMP_FP (3 << 12) /* start of front porch */ -#define LCD_CTRL_WATERMARK_4 (0 << 16) /* LCD DMA request is generated when either of the DMA FIFOs have four or more empty locations. */ -#define LCD_CTRL_WATERMARK_8 (1 << 16) /* LCD DMA request is generated when either of the DMA FIFOs have eight or more empty locations. */ - LPC_LCD->CTRL = - LCD_CTRL_BPP_16BPP_565 | - LCD_CTRL_LCDTFT_TFT; - LPC_LCD->CTRL |= LCD_CTRL_BGR_BGR; - LPC_LCD->CTRL |= LCD_CTRL_LCDEN; /* enable LCD controller */ - stimer_wait(10); - GSP_HW_RESET_RELEASE(); - LPC_LCD->CTRL |= LCD_CTRL_LCDPWR; /* set LCD_POWER, LCD_VD[23:0] go to active state */ - stimer_wait(20); - -#define LCD_INTMSK_LNBUI (1 << 2) /* next base address update interrupt */ - LPC_LCD->INTMSK = LCD_INTMSK_LNBUI; -// NVIC_SetPriorityRaw(LCD_IRQn, LCD_IRQP); -} - -/* - * - */ -void gs_hw_set_active_buffer(union gs_pixel_t *mem) -{ - LPC_LCD->UPBASE = ((uint32)mem) & (~0x0000007); - LPC_LCD->LPBASE = ((uint32)mem) & (~0x0000007); -} - -/* - * - */ -void LCD_Handler(void) -{ -// if (LPC_LCD->INTSTAT & LCD_INTMSK_LNBUI) -// { -// LPC_LCD->INTCLR = LCD_INTMSK_LNBUI; -// NVIC_DisableIRQ(LCD_IRQn); -// } -} - -/* - * - */ -void gs_hw_wait_vsync() -{ - LPC_LCD->INTCLR = LCD_INTMSK_LNBUI; -// NVIC_EnableIRQ(LCD_IRQn); - - /* - * XXX polled - */ - while (!(LPC_LCD->INTSTAT & LCD_INTMSK_LNBUI)) - ; -} - DELETED firmware/board/lpc17xx/src/gs/gs_hw.h Index: firmware/board/lpc17xx/src/gs/gs_hw.h ================================================================== --- firmware/board/lpc17xx/src/gs/gs_hw.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef _GS_HW_H_ -#define _GS_HW_H_ - -#include - -void gs_hw_init(); -void gs_hw_set_active_buffer(union gs_pixel_t *mem); - -void gs_hw_wait_vsync(); - -#endif /* !_GS_HW_H_ */ - DELETED firmware/board/lpc17xx/src/gs/gs_image.c Index: firmware/board/lpc17xx/src/gs/gs_image.c ================================================================== --- firmware/board/lpc17xx/src/gs/gs_image.c +++ /dev/null @@ -1,181 +0,0 @@ -#include -#include -#include "gs.h" -#include "gs_image.h" - -#define DEBUG_GS_IMAGE - -#ifdef DEBUG_GS_IMAGE - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - -static inline uint8* gs_image_get_built_in_data_cb(int *n, void *context); - -/* - * Put raw image to screen. - * - * ARGS - * x horizontal position of image - * y vertical position of image - * width width of image - * height height of image - * tcolor if not NULL substitute appropriate pixel in image with background color - * cb callback function for data retrieve - * context context passed to callback - */ -void gs_image_put(struct gs_layer_t *layer, int x, int y, int width, int height, - union gs_pixel_t *tcolor, union gs_pixel_t *bgcolor, - gs_image_getdata_cb cb, void *context) -{ - void *buf; -// union gs_pixel_t *pixel; - union gs_pixel_t *dst; - union gs_pixel_t *src; - int n, r, nx; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - if (x + width > layer->width) - { - debug_emsg("image does not fit to layer by width"); - return; - } - if (y + height > layer->height) - { - debug_emsg("image does not fit to layer by width"); - return; - } - - n = width * height * GS_PIXEL_DEPTH; - - - dst = &layer->mem[y * layer->width + x]; - nx = width; - - /* XXX was splited to two parts (NULL/!NULL) for speed up? */ - if (tcolor == NULL || bgcolor == NULL) - { - while (n) - { - r = n; - - buf = (*cb)(&r, context); - if (!buf || r == 0) - { - DEBUG_WMSG("callback return NULL"); - break; - } - - if (r > n) - r = n; - n -= r; - - /* NOTE r should be multiple of GS_PIXEL_DEPTH */ - r /= GS_PIXEL_DEPTH; - src = (union gs_pixel_t*)buf; - while (r--) - { - (dst++)->value = (src++)->value; - nx--; - if (nx == 0) - { - nx = width; - dst += layer->width - width; - } - } - } - } else { - while (n) - { - r = n; - - buf = (*cb)(&r, context); - if (!buf || r == 0) - { - DEBUG_WMSG("callback return NULL"); - break; - } - - if (r > n) - r = n; - n -= r; - - /* NOTE r should be multiple of GS_PIXEL_DEPTH */ - r /= GS_PIXEL_DEPTH; - src = (union gs_pixel_t*)buf; - while (r--) - { - if (src->value == tcolor->value) - dst->value = bgcolor->value; - else - dst->value = src->value; - src++; - dst++; - nx--; - if (nx == 0) - { - nx = width; - dst += layer->width - width; - } - } - } - } -} - -/* - * Put built-in raw image to screen. - */ -void gs_image_put_built_in(struct gs_layer_t *layer, int x, int y, - union gs_pixel_t *tcolor, union gs_pixel_t *bgcolor, void *data) -{ - struct gs_raw_image_t *image; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - image = data; - if (image->magic != BUILT_IN_IMAGE_MAGIC) - { - debug_emsg("invalid image magic number"); - return; - } - if (image->version != BUILT_IN_IMAGE_VERSION) - { - debug_emsg("unsupported version of image"); - return; - } - if (x + image->width > layer->width) - { - debug_emsg("image does not fit to layer by width"); - return; - } - if (y + image->height > layer->height) - { - debug_emsg("image does not fit to layer by height"); - return; - } - - gs_image_put(layer, x, y, image->width, image->height, tcolor, bgcolor, - gs_image_get_built_in_data_cb, image->data); -} - -/* - * - */ -static inline uint8* gs_image_get_built_in_data_cb(int *n, void *context) -{ - if (!n || *n == 0 || !context) - return NULL; - - return context; -} - DELETED firmware/board/lpc17xx/src/gs/gs_image.h Index: firmware/board/lpc17xx/src/gs/gs_image.h ================================================================== --- firmware/board/lpc17xx/src/gs/gs_image.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _GS_IMAGE_H -#define _GS_IMAGE_H - -#include "gs.h" - -/* - * - */ -struct gs_raw_image_t { -#define BUILT_IN_IMAGE_MAGIC 0x4D49 -#define BUILT_IN_IMAGE_VERSION 1 - uint16 magic; - uint8 version; - uint8 reserved; - uint16 width; - uint16 height; - /* NOTE flexible array member */ - uint8 data[]; -}; - -typedef uint8* (*gs_image_getdata_cb)(int *n, void *); - -void gs_image_put(struct gs_layer_t *layer, int x, int y, int width, int height, - union gs_pixel_t *tcolor, union gs_pixel_t *bgcolor, - gs_image_getdata_cb cb, void *context); - -void gs_image_put_built_in(struct gs_layer_t *layer, int x, int y, - union gs_pixel_t *tcolor, union gs_pixel_t *bgcolor, void *data); - -#endif - DELETED firmware/board/lpc17xx/src/gs/gs_text.c Index: firmware/board/lpc17xx/src/gs/gs_text.c ================================================================== --- firmware/board/lpc17xx/src/gs/gs_text.c +++ /dev/null @@ -1,190 +0,0 @@ -#include -#include "gs.h" -#include "gs_text.h" - -#define DEBUG_GS_TEXT - -#ifdef DEBUG_GS_TEXT - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - -static int _utf8_to_ucs2(char *utf8, uint16 *ucs2); - -/* - * Draw text to screen - */ -void gs_text_put(struct gs_layer_t *layer, char *text,int x, int y, int maxwidth, - GS_COLOR fgcolor, GS_COLOR bgcolor, struct gs_font_t *font) -{ -#define UCS2_CHAR 0 -#define UCS2_PAGE 1 - uint8 ucs2[2]; - int clen; - int width; - uint8 *fdata; - int chsize, chwidth; - uint32 chdata; -#define PIXBUF_SIZE 32 - union gs_pixel_t *mem; - - if (!layer) - { - debug_emsg("NULL layer"); - return; - } - - /* TODO font sanity check; x, y sanity check */ - if (font->magic != GS_FONT_MAGIC) - { - debug_emsg("invalid font magic"); - return; - } - - chsize = font->maxwidth * font->height + 1 ; /* + 1 is for width */ - - if (y + font->height > layer->height) - { - DEBUG_WMSG("text does not fit to layer by height"); - return; - } - - if (maxwidth <= 0) - width = 0 - layer->width; - else - width = 0; - - while (*text) - { - clen = _utf8_to_ucs2(text, (uint16*)ucs2); - if (clen == 0) - break; - text += clen; - - fdata = &font->data[ - chsize * (256 * font->ipage[ucs2[UCS2_PAGE]] + ucs2[UCS2_CHAR]) - ]; - chwidth = *fdata++; - - if (chwidth > PIXBUF_SIZE) - { - DEBUG_WMSGF("character to wide", "4dn", chwidth); - return; - } - - width += chwidth; - if (width > maxwidth) - return; - - if (x + chwidth > layer->width) - { - DEBUG_WMSG("text does not fit to layer by width"); - return; - } - - /* put char */ - { - int n, line, mask; - - line = font->height; - mem = &layer->mem[y * layer->width + x]; - while (line--) - { - mask = 0x01 << (chwidth - 1); - - /* XXX width is limited to 32 pixels */ - chdata = *((uint32*)fdata); - n = chwidth; - while (n--) - { - if (chdata & mask) - mem->value = fgcolor; - else - mem->value = bgcolor; - mem++; - mask >>= 1; - } - fdata += font->maxwidth; - mem += layer->width - chwidth; - } - } - x += chwidth; - } -} - -/* - * - * - * A little guide to UTF-8 - * ======================= - * - * - * Bits of First Last Bytes in - * code point code point code point sequence Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 - * 7 U+0000 U+007F 1 0xxxxxxx - * 11 U+0080 U+07FF 2 110xxxxx 10xxxxxx - * 16 U+0800 U+FFFF 3 1110xxxx 10xxxxxx 10xxxxxx - * 21 U+10000 U+1FFFFF 4 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx - * 26 U+200000 U+3FFFFFF 5 111110xx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx - * 31 U+4000000 U+7FFFFFFF 6 1111110x 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx - * - * - * Russian "М" (M) - * - * Unicode code point 0x041C - * UTF8 representation 0x9CD0 - * - * 0xD0 11010000 - * ----- MSB - * - * 0x9C 10011100 - * ------ LSB - * - * - * 0b10.0001.1100 - * 4 1 C - * - */ - - -/* - * Convert utf8 character to ucs2 (BMP). - * - * ARGS - * utf8 pointer to utf8 character - * ucs2 pointer where code of converted character will be placed - * - * RETURN - * Size of utf8 character in bytes or zero if error was occured or end - * of line was reached. - */ -static int _utf8_to_ucs2(char *utf8, uint16 *ucs2) -{ - if (!(*utf8)) - return 0; - - *ucs2 = 0x0000; - - if (!(*utf8 & 0x80)) - { - *ucs2 |= *utf8; - return 1; - } - - if ((*utf8 & 0xE0) == 0xC0) - { - *ucs2 = (*(utf8 + 0) & 0x1F); - *ucs2 = (*ucs2 << 6) | (*(utf8 + 1) & 0x3F); - return 2; - } else if ((*utf8 & 0xF0) == 0xE0) { - *ucs2 = (*(utf8 + 0) & 0x0F); - *ucs2 = (*ucs2 << 6) | (*(utf8 + 1) & 0x3F); - *ucs2 = (*ucs2 << 6) | (*(utf8 + 2) & 0x3F); - return 3; - } else { - debug_emsg("decode error"); - return 0; - } -} - DELETED firmware/board/lpc17xx/src/gs/gs_text.h Index: firmware/board/lpc17xx/src/gs/gs_text.h ================================================================== --- firmware/board/lpc17xx/src/gs/gs_text.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef _GS_TEXT_H -#define _GS_TEXT_H - -#include "gs.h" - -/* - * - * Header format - * - * 0 - 1 0xBEEF - * 2 header version - * 3 - 4 header length - * 5 number of pages - * 6 maximum symbol width in pixels - * 7 symbol heigth in pixels - * 8 - 31 reserved - * 32 page0 index - * 33 page1 index - * ... - * xxx page255 index - * - * Symbol format - * 0 width of character - * 1 - N data - * - * 5x7 symbol: - * - * bit 01234567 - * - * xxxxxXXX - * xxxxxXXX - * xxxxxXXX - * xxxxxXXX - * xxxxxXXX - * xxxxxXXX - * xxxxxXXX - * - * 8x16 symbol - * bit 01234567 01234567 - * - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * byte 0 xxxxxxxx xxxxxxxx byte 1 - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * byte 2 xxxxxxxx xxxxxxxx byte 3 - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - * xxxxxxxx xxxxxxxx - */ -struct gs_font_t { -#define GS_FONT_MAGIC 0xEFBE - uint16 magic; - uint8 version; - uint16 hlen; - uint8 npage; - uint8 maxwidth; /* maximum width of pixel in bytes */ - uint8 height; - uint8 reserved[24]; -#define GS_FONT_PAGE_INDEX_COUNT 256 - uint8 ipage[GS_FONT_PAGE_INDEX_COUNT]; - /* NOTE flexible array member */ - uint8 data[]; -} __attribute__((packed)); - -void gs_text_put(struct gs_layer_t *layer, char *text,int x, int y, int maxwidth, - GS_COLOR fgcolor, GS_COLOR bgcolor, struct gs_font_t *font); - -#endif - DELETED firmware/board/lpc17xx/src/irqp.c Index: firmware/board/lpc17xx/src/irqp.c ================================================================== --- firmware/board/lpc17xx/src/irqp.c +++ /dev/null @@ -1,54 +0,0 @@ -#include -#include "irqp.h" - -/* - * - */ -void irqp_init() -{ - NVIC_SetPriorityRaw(WDT_IRQn , LOWEST_IRQP); /*!< Watchdog Timer Interrupt */ - NVIC_SetPriorityRaw(TIMER0_IRQn , LOWEST_IRQP); /*!< Timer0 Interrupt */ - NVIC_SetPriorityRaw(TIMER1_IRQn , LOWEST_IRQP); /*!< Timer1 Interrupt */ - NVIC_SetPriorityRaw(TIMER2_IRQn , LOWEST_IRQP); /*!< Timer2 Interrupt */ - NVIC_SetPriorityRaw(TIMER3_IRQn , LOWEST_IRQP); /*!< Timer3 Interrupt */ -#if 0 - /* NOTE DPort */ - NVIC_SetPriorityRaw(UART0_IRQn , LOWEST_IRQP); /*!< UART0 Interrupt */ -#endif - NVIC_SetPriorityRaw(UART1_IRQn , LOWEST_IRQP); /*!< UART1 Interrupt */ - NVIC_SetPriorityRaw(UART2_IRQn , LOWEST_IRQP); /*!< UART2 Interrupt */ - NVIC_SetPriorityRaw(UART3_IRQn , LOWEST_IRQP); /*!< UART3 Interrupt */ - NVIC_SetPriorityRaw(PWM1_IRQn , LOWEST_IRQP); /*!< PWM1 Interrupt */ - NVIC_SetPriorityRaw(I2C0_IRQn , LOWEST_IRQP); /*!< I2C0 Interrupt */ - NVIC_SetPriorityRaw(I2C1_IRQn , LOWEST_IRQP); /*!< I2C1 Interrupt */ - NVIC_SetPriorityRaw(I2C2_IRQn , LOWEST_IRQP); /*!< I2C2 Interrupt */ - NVIC_SetPriorityRaw(SSP0_IRQn , LOWEST_IRQP); /*!< SSP0 Interrupt */ - NVIC_SetPriorityRaw(SSP1_IRQn , LOWEST_IRQP); /*!< SSP1 Interrupt */ - NVIC_SetPriorityRaw(PLL0_IRQn , LOWEST_IRQP); /*!< PLL0 Lock (Main PLL) Interrupt */ - NVIC_SetPriorityRaw(RTC_IRQn , LOWEST_IRQP); /*!< Real Time Clock Interrupt */ - NVIC_SetPriorityRaw(EINT0_IRQn , LOWEST_IRQP); /*!< External Interrupt 0 Interrupt */ - NVIC_SetPriorityRaw(EINT1_IRQn , LOWEST_IRQP); /*!< External Interrupt 1 Interrupt */ - NVIC_SetPriorityRaw(EINT2_IRQn , LOWEST_IRQP); /*!< External Interrupt 2 Interrupt */ - NVIC_SetPriorityRaw(EINT3_IRQn , LOWEST_IRQP); /*!< External Interrupt 3 Interrupt */ - NVIC_SetPriorityRaw(ADC_IRQn , LOWEST_IRQP); /*!< A/D Converter Interrupt */ - NVIC_SetPriorityRaw(BOD_IRQn , LOWEST_IRQP); /*!< Brown-Out Detect Interrupt */ - NVIC_SetPriorityRaw(USB_IRQn , LOWEST_IRQP); /*!< USB Interrupt */ - NVIC_SetPriorityRaw(CAN_IRQn , LOWEST_IRQP); /*!< CAN Interrupt */ - NVIC_SetPriorityRaw(DMA_IRQn , LOWEST_IRQP); /*!< General Purpose DMA Interrupt */ - NVIC_SetPriorityRaw(I2S_IRQn , LOWEST_IRQP); /*!< I2S Interrupt */ - NVIC_SetPriorityRaw(ENET_IRQn , LOWEST_IRQP); /*!< Ethernet Interrupt */ - NVIC_SetPriorityRaw(MCI_IRQn , LOWEST_IRQP); /*!< SD/MMC card I/F Interrupt */ - NVIC_SetPriorityRaw(MCPWM_IRQn , LOWEST_IRQP); /*!< Motor Control PWM Interrupt */ - NVIC_SetPriorityRaw(QEI_IRQn , LOWEST_IRQP); /*!< Quadrature Encoder Interface Interrupt */ - NVIC_SetPriorityRaw(PLL1_IRQn , LOWEST_IRQP); /*!< PLL1 Lock (USB PLL) Interrupt */ - NVIC_SetPriorityRaw(USBActivity_IRQn , LOWEST_IRQP); /*!< USB Activity interrupt */ - NVIC_SetPriorityRaw(CANActivity_IRQn , LOWEST_IRQP); /*!< CAN Activity interrupt */ - NVIC_SetPriorityRaw(UART4_IRQn , LOWEST_IRQP); /*!< UART4 Interrupt */ - NVIC_SetPriorityRaw(SSP2_IRQn , LOWEST_IRQP); /*!< SSP2 Interrupt */ - NVIC_SetPriorityRaw(LCD_IRQn , LOWEST_IRQP); /*!< LCD Interrupt */ - NVIC_SetPriorityRaw(GPIO_IRQn , LOWEST_IRQP); /*!< GPIO Interrupt */ - NVIC_SetPriorityRaw(PWM0_IRQn , LOWEST_IRQP); /*!< PWM0 Interrupt */ - NVIC_SetPriorityRaw(EEPROM_IRQn , LOWEST_IRQP); /*!< EEPROM Interrupt */ -} - - DELETED firmware/board/lpc17xx/src/irqp.h Index: firmware/board/lpc17xx/src/irqp.h ================================================================== --- firmware/board/lpc17xx/src/irqp.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef IRQ_PRIORITY_T -#define IRQ_PRIORITY_T - -/* - * look at "lib/os/src/port/ARMv7-M/port.c" for split to group/sub priorities - * - * Systick has 1 as group priority. DPort has 0 as group priority. - * Don't use this groups. - * - */ -#define GROUP_PRIORITY(n) (n << 5) /* 8 values (3 bits) */ -#define SUB_PRIORITY(n) (n << 3) /* 4 values (2 bits) */ - -#define LOWEST_IRQP (GROUP_PRIORITY(7) | SUB_PRIORITY(3)) - -#define EINT0_IRQP (GROUP_PRIORITY(2) | SUB_PRIORITY(0)) -#define MCI_IRQP (GROUP_PRIORITY(2) | SUB_PRIORITY(0)) -#define DMA_IRQP (GROUP_PRIORITY(3) | SUB_PRIORITY(0)) -#define ENET_IRQP (GROUP_PRIORITY(4) | SUB_PRIORITY(0)) -#define USB_IRQP (GROUP_PRIORITY(7) | SUB_PRIORITY(2)) -#define SSP1_IRQP (GROUP_PRIORITY(7) | SUB_PRIORITY(3)) -#define LCD_IRQP (GROUP_PRIORITY(7) | SUB_PRIORITY(3)) -#define GPIO_IRQP (GROUP_PRIORITY(7) | SUB_PRIORITY(3)) - -void irqp_init(); - -#endif - DELETED firmware/board/lpc17xx/src/it.c Index: firmware/board/lpc17xx/src/it.c ================================================================== --- firmware/board/lpc17xx/src/it.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ -extern unsigned int *_estack; /* init value for the stack pointer. defined in linker script */ - -extern void Reset_Handler(void); - -void Default_Handler(void); - -void NMI_Handler(void); -void HF_Handler(void); -void MEM_Handler(void); -void BUS_Handler(void); -void UF_Handler(void); - -void DPort_Handler(void); -void LCD_Handler(void); - - -/* - * vector table - */ -unsigned int * myvectors[] __attribute__ ((section("vectors")))= { - (unsigned int *)&_estack, /* The initial stack pointer */ - /* Interrupt ID / Exception number, TODO Check interrupts sources comment, add missing interrupts */ - (unsigned int *)Reset_Handler, /* 1, Reset */ - (unsigned int *)NMI_Handler, /* 2, NMI */ - (unsigned int *)HF_Handler, /* 3, Hard Fault */ - (unsigned int *)MEM_Handler, /* 4, Memory Management */ - (unsigned int *)BUS_Handler, /* 5, Bus Fault */ - (unsigned int *)UF_Handler, /* 6, Usage Fault */ - (unsigned int *)Default_Handler, /* 7, Reserved */ - (unsigned int *)Default_Handler, /* 8, Reserved */ - (unsigned int *)Default_Handler, /* 9, Reserved */ - (unsigned int *)Default_Handler, /* 10, Reserved */ - (unsigned int *)Default_Handler, /* 11, SVCall */ - (unsigned int *)DPort_Handler, /* 12, Debug Monitor */ - (unsigned int *)Default_Handler, /* 13, Reserved */ - (unsigned int *)Default_Handler, /* 14, PendSV Handler */ - (unsigned int *)Default_Handler, /* 15, SysTick ISR Handler */ - (unsigned int *)Default_Handler, /* 0 / 16, WatchDog Timer */ - (unsigned int *)Default_Handler, /* 1 / 17, Timer0 */ - (unsigned int *)Default_Handler, /* 2 / 18, Timer1 */ - (unsigned int *)Default_Handler, /* 3 / 19, Timer2 */ - (unsigned int *)Default_Handler, /* 4 / 20, Timer3 */ - (unsigned int *)DPort_Handler, /* 5 / 21, UART0 */ - (unsigned int *)Default_Handler, /* 6 / 22, UART1 */ - (unsigned int *)Default_Handler, /* 7 / 23, UART2 */ - (unsigned int *)Default_Handler, /* 8 / 24, UART3 */ - (unsigned int *)Default_Handler, /* 9 / 25, PWM Interrupt */ - (unsigned int *)Default_Handler, /* 10 / 26, I2C0 */ - (unsigned int *)Default_Handler, /* 11 / 27, I2C1 */ - (unsigned int *)Default_Handler, /* 12 / 28, I2C2 */ - (unsigned int *)Default_Handler, /* 13 / 29, SPI0 */ - (unsigned int *)Default_Handler, /* 14 / 30, SSP0 */ - (unsigned int *)Default_Handler, /* 15 / 31, SSP1 */ - (unsigned int *)Default_Handler, /* 16 / 32, PLL lock */ - (unsigned int *)Default_Handler, /* 17 / 33, Real Time Clock Interrupt */ - (unsigned int *)Default_Handler, /* 18 / 34, External interrupt 0 */ - (unsigned int *)Default_Handler, /* 19 / 35, External interrupt 1 */ - (unsigned int *)Default_Handler, /* 20 / 36, External interrupt 2 */ - (unsigned int *)Default_Handler, /* 21 / 37, External interrupt 3 */ - (unsigned int *)Default_Handler, /* 22 / 38, A/D Converter 0 end of conversion */ - (unsigned int *)Default_Handler, /* 23 / 39, Brown out detect */ - (unsigned int *)Default_Handler, /* 24 / 40, USB */ - (unsigned int *)Default_Handler, /* 25 / 41, CAN Interrupt */ - (unsigned int *)Default_Handler, /* 26 / 42, IntStatus of all DMA channels 0/1 */ - (unsigned int *)Default_Handler, /* 27 / 43, SI (state change) */ - (unsigned int *)Default_Handler, /* 28 / 44, Ethernet Interrupt */ - (unsigned int *)Default_Handler, /* 29 / 45, SD Card interrupt */ - (unsigned int *)Default_Handler, /* 30 / 46, Motor Control PWM */ - (unsigned int *)Default_Handler, /* 31 / 47, Quadrature Encoder */ - (unsigned int *)Default_Handler, /* 32 / 48, PLL1 lock (PLOCK) */ - (unsigned int *)Default_Handler, /* 33 / 49, USB Activity */ - (unsigned int *)Default_Handler, /* 34 / 50, CAN Activity */ - (unsigned int *)Default_Handler, /* 35 / 51, UART4 */ - (unsigned int *)Default_Handler, /* 36 / 52, SSP2 */ - (unsigned int *)LCD_Handler, /* 37 / 53, LCD */ - (unsigned int *)Default_Handler, /* 38 / 54, GPIO interrupts */ -}; - -/* - * - */ -void Default_Handler(void) -{ - while (1); -} - -/* - * - */ -void NMI_Handler(void) -{ - while (1); -} - -/* - * - */ -void HF_Handler(void) -{ - while (1); -} - -/* - * - */ -void MEM_Handler(void) -{ - while (1); -} - -/* - * - */ -void BUS_Handler(void) -{ - while (1); -} - -/* - * - */ -void UF_Handler(void) -{ - while (1); -} - - -/* - * This handler gives control to actual handler, - * stored on bootloader vector table (Debug Monitor exception) - */ -void __attribute__((naked)) DPort_Handler() -{ - /* - * call real handler function - * - * XXX r4 to r11 should not be spoiled - */ - asm volatile( - "mov r1, %0 \n" - "ldr r0, [r1,#0]\n" - "bx r0 \n" - : : "r" (0x00000000 + (12 * 4)) : "r0", "r1" - ); -} - DELETED firmware/board/lpc17xx/src/lpc17xx.ld Index: firmware/board/lpc17xx/src/lpc17xx.ld ================================================================== --- firmware/board/lpc17xx/src/lpc17xx.ld +++ /dev/null @@ -1,105 +0,0 @@ -/* - * - */ -MEMORY -{ - /* first 8K of SRAM is used by DPort */ - DPORTRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 8K - RAM (rwx) : ORIGIN = 0x10002000, LENGTH = 56K - /* - * bootloader copy vector table to SRAM - reserve some space. - * 256 bytes should be enough (168 bytes actually, 40 vectors, - * 4 bytes for stack pointer, 4 bytes for reset vector). - */ - VECTRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256 - /* four user-defined vectors that can be called from DPort interface */ - UVECTRAM (rwx) : ORIGIN = 0x20000100, LENGTH = 16 - RAM0_0 (rwx) : ORIGIN = 0x20000104, LENGTH = 7936 - RAM0_1 (rwx) : ORIGIN = 0x20002000, LENGTH = 8K - RAM1 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K - SDRAM (rwx) : ORIGIN = 0xA0000000, LENGTH = 8M - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K -} - -_estack = ORIGIN(SDRAM)+LENGTH(SDRAM); - -_ethram = ORIGIN(RAM1); -_ethram_size = LENGTH(RAM1); - -/* - * _used_ram = ORIGIN(SDRAM); - */ -_used_ram = ORIGIN(RAM); - -_uvect_start = ORIGIN(UVECTRAM); -_uvect_size = LENGTH(UVECTRAM); - -SECTIONS -{ - /* - * - */ - .text LOAD_OFFSET : { - . = ALIGN(4); - *(vectors) /* vector table, XXX used from flash anyway */ - *(.text) /* program code */ - *(.text.*) /* remaining code */ - *(.rodata) /* read-only data (constants) */ - *(.rodata*) - - . = ALIGN(4); - _sidata = .; /* start of data section */ - - /* XXX - _data_vma = (LOAD_OFFSET >= _used_ram) ? . : (_used_ram - LOAD_OFFSET); - */ - } - - /* This is the initialized data section. */ - .data : AT ( _sidata ) { - . = ALIGN(4); - _sdata = . ; /* start of data section */ - *(.data) - *(.data.*) - - . = ALIGN(4); - _edata = . ; /* end of data section */ - _bss_vma = .; - } >RAM - - /* This is the uninitialized data section. */ - .bss _bss_vma (NOLOAD) : - { - . = ALIGN(4); - _sbss = .; /* start of bss section */ - - *(.bss) - *(COMMON) - - . = ALIGN(4); - _ebss = . ; /* end of bss section */ - /* - _bss2_vma = .; - */ - } - - /* This is used for memory used by OS (stacks, memory spool). */ - .bss2 (NOLOAD): { - . = ALIGN(4); - *(heap); - . = ALIGN(8); - *(gsmem); - } >SDRAM - - /* This is used by DPort for user-defined functions */ - .userf (NOLOAD): { - . = ALIGN(4); - *(userf); - } >UVECTRAM - - /DISCARD/ : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } -} - DELETED firmware/board/lpc17xx/src/main.c Index: firmware/board/lpc17xx/src/main.c ================================================================== --- firmware/board/lpc17xx/src/main.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -/* - * - */ -#include -#include -#include -#include -#include -#include "version.h" -#include "gs/gs.h" -#include "irqp.h" -#include "command.h" -#include "sdcard.h" - -/* - * - */ -int main(void) -{ - __enable_irq(); - - irqp_init(); - gpio_init(); - stimer_init(); - uart_setup(DEBUG_UART, UART_BAUD_115200, NULL); - - dprint("nsn", "================================="); - dprint("sn", "= "MODULE_NAME); - dprint("sn", "="); - dprint("sn", "= v"VERSION_STRING", "__DATE__" "__TIME__); - dprint("sn", "================================="); - - gs_init(); - command_init(); - - if (sdcard_init() < 0) - { - debug_emsg("SD init error"); - } - -#if 1 - gs_text_put(gs_get_layer(GS_LAYER_BACK_BUFFER), "LCD Controller, sw. version " VERSION_STRING, - 10, 10, 0, GS_COLOR_YELLOW, GS_DEFAULT_COLOR, (struct gs_font_t*)gs_data_font_ter32b); - gs_cmd_flip(); -#endif - - while (1) - { - command_process(); - } - - return 0; -} - DELETED firmware/board/lpc17xx/src/sdcard.c Index: firmware/board/lpc17xx/src/sdcard.c ================================================================== --- firmware/board/lpc17xx/src/sdcard.c +++ /dev/null @@ -1,547 +0,0 @@ -#include -#include -#include -#include -#include -#include "sdcard.h" -#include "sdcard_def.h" - -#define DEBUG_SDCARD - -#ifdef DEBUG_SDCARD - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - -#define SD_BLOCK_SIZE 512 - -#define SDCARD_SSP SSP1 - -/* - * SD_LO_CLK should not exceed 400 kHz. - * SD_HI_CLK should not exceed 25 MHz. - */ -#define SD_LO_CLK SSP_SPEED_100KHZ -#define SD_HI_CLK SSP_SPEED_12MHZ - -#define SD_CS(value) do { if (value) LPC_GPIO0->SET = (1 << 10); else LPC_GPIO0->CLR = (1 << 10); } while (0) -#define SD_CS_DIR_OUTPUT() do { LPC_GPIO0->DIR |= (1 << 10);} while (0) -//#define SD_CD() (LPC_GPIO1->FIOPIN & (1 << 25)) - -#define SD_CARDTYPE_UNUSABLE 0x00 -#define SD_CARDTYPE_SD_V1X 0x01 -#define SD_CARDTYPE_SD_V200_SC 0x02 -#define SD_CARDTYPE_SD_V200_HC 0x03 -#define SD_CARDTYPE_SD_V200_XC 0x04 - -static int cardtype; - -enum sd_expect_t { - SD_EXPECT_R1, - SD_EXPECT_R1b, - SD_EXPECT_R2, - SD_EXPECT_R3, - SD_EXPECT_R7, -}; - -#define CS_RELEASE 1 -#define CS_HOLD 0 - -static int sdcard_cmd(uint8 cmd, - union sd_argument_t *arg, union sd_response_t *resp, enum sd_expect_t expect, int cs_release); -static int sdcard_cmd0(); -static int sdcard_cmd8(); -static int sdcard_cmd16(int blocklen); -static int sdcard_cmd58(); -static int sdcard_acmd41(); -static int sdcard_cmd16(int blocklen); -static void _swap32(uint32 *v); -static void _swap16(uint16 *v); - -/* - * RETURN - * 0 on success, -1 on error - */ -int sdcard_init() -{ - { - SD_CS(1); - SD_CS_DIR_OUTPUT(); - ssp_setup(SDCARD_SSP, SD_LO_CLK, SSP_MODE_CPOL0_CPHA0); - } - - cardtype = SD_CARDTYPE_UNUSABLE; - -// /* -// * Transfer 74 or more clocks with CS and DI high - the card -// * will enter it's native operation mode -// */ -// SD_CS(1); -// ssp_wr(SDCARD_SSP, NULL, NULL, 10); - - if (sdcard_cmd0() < 0) - return -1; - if (sdcard_cmd8() < 0) - return -1; - if (sdcard_cmd58() < 0) - return -1; - if (sdcard_acmd41() < 0) - return -1; - if (sdcard_cmd58() < 0) - return -1; - if (sdcard_cmd16(SD_BLOCK_SIZE) < 0) - return -1; - - ssp_setup(SDCARD_SSP, SD_HI_CLK, SSP_MODE_CPOL0_CPHA0); - - DPRINT("sn", "SD init OK"); - - return 0; -} - -#define RESPONSE_TIMEOUTE_NCYCLE 20 - -/* - * - */ -int sdcard_detect() -{ -// if (SD_CD()) -// return 0; -// - return 1; -} - -/* - * - * RETURN - * zero on success, -1 on error - */ -static int sdcard_cmd0() -{ - union sd_argument_t arg; - union sd_response_t resp; - int retry; - - retry = 5; - - arg.value = 0; - while (retry--) - { - if (sdcard_cmd(SD_CMD0_GO_IDLE_STATE, &arg, &resp, SD_EXPECT_R1, CS_RELEASE) < 0) - { - debug_emsg("CMD0 failed"); - continue; - } - - if (resp.r1.val != 0x01) - { - dprint("1xn", resp.r1.val); - continue; - } - - return 0; - } - - debug_emsg("retry limit reached"); - - return -1; -} - -/* - * CMD8 command (SEND_IF_COND) - * - * RETURN - * 0 if valid response was received, -1 otherwise - */ -static int sdcard_cmd8() -{ - union sd_argument_t arg; - union sd_response_t resp; - int retry; - -#define CHECK_PATTERN 0xAB - arg.value = 0; - arg.cmd08.check_pattern = 0xAB; - arg.cmd08.voltage_accepted = VOLTAGE_ACCEPTED_27_36; - - retry = 5; - while (retry--) - { - if (sdcard_cmd(SD_CMD8_SEND_IF_COND, &arg, &resp, SD_EXPECT_R7, CS_RELEASE) == 0) - { - if (resp.r1.val != 0x01) - { - debug_emsgf("R1 ", "1xn", resp.r1.val); - continue; - } - - /* - * NOTE - * Check pattern not necessary. Card does not response if - * voltage not supported or sdcard is Ver1.X. - */ - if (resp.r7.check_pattern == CHECK_PATTERN && resp.r7.voltage_accepted == VOLTAGE_ACCEPTED_27_36) - { - return 0; - } else { - debug_emsgf("CMD8 check pattern failed, voltage not accepted, or ver1.x: ", - "1x< R7 >4xn", resp.r1.val, resp.val32); - return -1; - } - } - } - - debug_emsg("retry limit reached"); - return -1; -} - -/* - * CMD16 (SET_BLOCKLEN) - * - * RETURN - * 0 if valid response was received, -1 otherwise - */ -static int sdcard_cmd16(int blocklen) -{ - int retry; - union sd_argument_t arg; - union sd_response_t resp; - - arg.value = blocklen; - - retry = 20; - while (retry--) - { - if (sdcard_cmd(SD_CMD16_SET_BLOCKLEN, &arg, &resp, SD_EXPECT_R1, CS_RELEASE) == 0) - { - if (resp.r1.val & 0xFE) - { - debug_emsgf("R1 ", "1xn", resp.r1.val); - continue; - } - - return 0; - } - } - - debug_emsg("retry limit reached"); - return -1; -} - -/* - * CMD58 command (SEND_IF_COND) - * - * RETURN - * 0 if valid response was received, -1 otherwise - */ -static int sdcard_cmd58() -{ - union sd_argument_t arg; - union sd_response_t resp; - int retry; - - arg.value = 0; - - retry = 5; - while (retry--) - { - if (sdcard_cmd(SD_CMD58_READ_OCR, &arg, &resp, SD_EXPECT_R3, CS_RELEASE) == 0) - { - if (resp.r1.val & 0xFE) - { - debug_emsgf("R1 ", "1xn", resp.r1.val); - continue; - } - - DEBUG_IMSGF("CCS ", "1dn", resp.r3.ccs); - if (resp.r3.ccs) - cardtype = SD_CARDTYPE_SD_V200_SC; - else - cardtype = SD_CARDTYPE_SD_V200_HC; - - return 0; - } - } - - debug_emsg("retry limit reached"); - return -1; -} - -/* - * CMD55 (APP_CMD) - * - * RETURN - * 0 if valid response was received, -1 otherwise - */ -static int sdcard_cmd55() -{ - int retry; - union sd_argument_t arg; - union sd_response_t resp; - - arg.value = 0; -// arg.cmd55.rca = cardstate.rca; - arg.cmd55.rca = 0; - - retry = 5; - while (retry--) - { - if (sdcard_cmd(SD_CMD55_APP_CMD, &arg, &resp, SD_EXPECT_R1, CS_RELEASE) == 0) - { - return 0; - } - } - debug_emsg("retry limit reached"); - return -1; -} - - - -/* - * ACMD41 (SD_SEND_OP_COND) - * - * RETURN - * 0 if valid response was received, -1 otherwise - */ -static int sdcard_acmd41() -{ - int retry; - union sd_argument_t arg; - union sd_response_t resp; - - arg.value = 0; - /* XXX */ - arg.acmd41.v27_28 = 0; - arg.acmd41.v28_29 = 0; - arg.acmd41.v29_30 = 0; - arg.acmd41.v30_31 = 0; - arg.acmd41.v31_32 = 1; - arg.acmd41.v32_33 = 1; - arg.acmd41.v33_34 = 0; - arg.acmd41.v34_35 = 0; - arg.acmd41.v35_36 = 0; - arg.acmd41.hcs = 1; - - retry = 1000; - while (retry--) - { - if (sdcard_cmd55() < 0) - continue; - - if (sdcard_cmd(SD_ACMD41_SD_SEND_OP_COND, &arg, &resp, SD_EXPECT_R1, CS_RELEASE) < 0) - continue; - - if (resp.r1.in_idle_state) - { - DEBUG_IMSG("idle"); - continue; - } - - DEBUG_IMSG("done"); - return 0; - } - - debug_emsg("retry limit reached"); - return -1; -} - - -/* - * - * RETURN - * 0 if valid response was received, -1 otherwise - */ -int sdcard_read_block(uint32 blocknum, uint8 *buf) -{ - union sd_argument_t arg; - union sd_response_t resp; - int retry; - int timeout; - uint8 token; - int ret; - uint16 crc0, crc1; - - ret = -1; - arg.value = blocknum; - - retry = 10; - do - { - if (sdcard_cmd(SD_CMD17_READ_SINGLE_BLOCK, &arg, &resp, SD_EXPECT_R1, CS_HOLD) == 0) - { - if (resp.r1.val != 0) - { - debug_emsgf("R1 ", "1xn", resp.r1.val); - continue; - } - - break; - } - } while (retry--); - - if (retry < 0) - { - debug_emsg("retry limit reached"); - goto out; - } - - /* - * Physical Layer Simplified Specification Version 4.10, page - */ -#define CMD17_DATA_TOKEN 0xFE - - timeout = 100000; - while (timeout--) - { - /* lookup for data or error token */ - ssp_wr(SDCARD_SSP, NULL, &token, 1); - if (token == 0xff) - continue; - - if (token == CMD17_DATA_TOKEN) - { - /* read data block */ - ssp_wr(SDCARD_SSP, NULL, buf, SD_BLOCK_SIZE); - - /* read CRC */ - ssp_wr(SDCARD_SSP, NULL, (uint8*)&crc0, 2); - _swap16(&crc0); - - crc1 = 0; - crc16ccitt_update(&crc1, buf, SD_BLOCK_SIZE); - - if (crc0 != crc1) - { - debug_emsgf("CRC mismatch", "2x_2xn", crc0, crc1); - goto out; - } - - ret = 0; - goto out; - } - if ((token & 0xF0) == 0) - { - debug_emsgf("error token received", "1xn", token); - ret = -1; - goto out; - } - } - - debug_emsg("timeout"); - -out: - SD_CS(1); - return ret; -} - -/* - * - */ -static void _swap32(uint32 *v) -{ - uint32 value; - - value = (*v & 0xff000000) >> 24; - value |= (*v & 0x00ff0000) >> 8; - value |= (*v & 0x0000ff00) << 8; - value |= (*v & 0x000000ff) << 24; - - *v = value; -} - -/* - * - */ -static void _swap16(uint16 *v) -{ - uint16 value; - - value = (*v & 0xff00) >> 8; - value |= (*v & 0x00ff) << 8; - - *v = value; -} - - - -/* - * - * RETURN - * zero on success, -1 on error - */ -static int sdcard_cmd(uint8 cmd, - union sd_argument_t *arg, union sd_response_t *resp, enum sd_expect_t expect, int cs_release) -{ - uint8 crc; - int ncycle; - int ret; - - ret = 0; - - cmd |= 0x40; - _swap32(&arg->value); - - /* - * NOTE - * When once the card enters SPI mode, the CRC feature is disabled - * and the CRC is not checked by the card, - * so that command transmission routine can be written with the - * hardcorded CRC value that valid for only CMD0 and CMD8 with the argument of zero. - * The CRC feature can also be switched with CMD59. - */ - - crc = 0; - if (cmd == SD_CMD0_GO_IDLE_STATE || SD_CMD8_SEND_IF_COND) - { - crc7_update(&crc, &cmd, 1); - crc7_update(&crc, (uint8*)&arg->value, 4); - } - - crc <<= 1; - crc |= 1; - - SD_CS(0); - { - ssp_wr(SDCARD_SSP, &cmd, NULL, 1); - ssp_wr(SDCARD_SSP, (uint8*)&arg->value, NULL, 4); - ssp_wr(SDCARD_SSP, &crc, NULL, 1); - - /* wait for response */ - ncycle = RESPONSE_TIMEOUTE_NCYCLE; - do - { - ssp_wr(SDCARD_SSP, NULL, &resp->val[0], 1); - if (resp->r1.zero == 0) - break; - } while (ncycle--); - - if (ncycle < 0) - { - debug_emsg("wait response timeout"); - ret = -1; - goto out; - } - - switch (expect) - { - case SD_EXPECT_R1: - goto out; - case SD_EXPECT_R3: - case SD_EXPECT_R7: - ssp_wr(SDCARD_SSP, NULL, &resp->val[1], 4); - _swap32(&resp->val32); - break; - default: - debug_emsg("unknown expect"); - ret = -1; - goto out; - } - } -out: - if (cs_release) - SD_CS(1); - return ret; -} - DELETED firmware/board/lpc17xx/src/sdcard.h Index: firmware/board/lpc17xx/src/sdcard.h ================================================================== --- firmware/board/lpc17xx/src/sdcard.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _SDCARD_H -#define _SDCARD_H - -#include - -int sdcard_init(); -int sdcard_detect(); -int sdcard_read_block(uint32 blocknum, uint8 *buf); - -#endif /* !_SDCARD_H */ - DELETED firmware/board/lpc17xx/src/sdcard_def.h Index: firmware/board/lpc17xx/src/sdcard_def.h ================================================================== --- firmware/board/lpc17xx/src/sdcard_def.h +++ /dev/null @@ -1,135 +0,0 @@ -#ifndef _SDCARD_DEF_H -#define _SDCARD_DEF_H - -#include - -/************************************************ - * Physical Layer Simplified Specification v4.10. Tables 4-22 to 4-32. - ***********************************************/ -#define SD_CMD0_GO_IDLE_STATE 0 /* bc response - */ -#define SD_CMD2_ALL_SEND_CID 2 /* bcr response R2 */ -#define SD_CMD3_SEND_RELATIVE_ADDR 3 /* bcr response R6 */ -#define SD_CMD7_SELECT_DESELECT_CARD 7 /* ac response R1b */ -#define SD_CMD8_SEND_IF_COND 8 /* bcr response R7 */ -#define SD_CMD9_SEND_CSD 9 /* ac response R2 */ -#define SD_CMD12_STOP_TRANSMISSION 12 /* ac response R1b */ -#define SD_CMD13_SEND_STATUS 13 /* ac response R1 */ -#define SD_CMD16_SET_BLOCKLEN 16 /* ac response R1 */ -#define SD_CMD17_READ_SINGLE_BLOCK 17 /* ac response R1 */ -#define SD_CMD18_READ_MULTIPLE_BLOCK 18 /* ac response R1 */ -#define SD_CMD55_APP_CMD 55 /* ac response R1 */ -#define SD_CMD58_READ_OCR 58 /* ac response R3 */ -#define SD_ACMD6_SET_BUS_WISTH 6 /* ac response R1 */ -#define SD_ACMD41_SD_SEND_OP_COND 41 /* bcr response R3 */ - -#pragma pack(push, 1) -union sd_argument_t { - uint32 value; - - struct { - uint32 check_pattern : 8; -#define VOLTAGE_ACCEPTED_27_36 0x01 -#define VOLTAGE_ACCEPTED_RESERVED_LOW 0x02 - uint32 voltage_accepted : 4; - uint32 reserved : 20; - } cmd08; - - struct { - uint32 reserved : 16; - uint32 rca : 16; - } ac; - - /* OCR */ - struct { - uint32 reserved00 : 15; /* 0 - 14 */ - uint32 v27_28 : 1; /* 15 */ - uint32 v28_29 : 1; /* 16 */ - uint32 v29_30 : 1; /* 17 */ - uint32 v30_31 : 1; /* 18 */ - uint32 v31_32 : 1; /* 19 */ - uint32 v32_33 : 1; /* 20 */ - uint32 v33_34 : 1; /* 21 */ - uint32 v34_35 : 1; /* 22 */ - uint32 v35_36 : 1; /* 23 */ - uint32 s18r : 1; /* 24 */ - uint32 reserved01 : 3; /* 25 - 27 */ - uint32 xpc : 1; /* 28 SDXC power control */ - uint32 fb : 1; /* 29 */ - uint32 hcs : 1; /* 30 Host Capacity Support, 0 - SDSC only, 1 - SDHC or SDXC */ - uint32 busy : 1; /* 31 */ - } acmd41; - - struct { -#define ACMD6_BUS_WIDTH_1 0 -#define ACMD6_BUS_WIDTH_4 2 - uint32 bus_width : 2; /* 0 - 1 */ - uint32 reserved : 30; - } acmd6; - - struct { - uint32 reserved : 16; - uint32 rca : 16; - } cmd55; -}; - -union sd_response_t { - uint8 val[5]; - - struct { - union { - struct { - uint8 in_idle_state : 1; /* 0 */ - uint8 erase_reset : 1; /* 1 */ - uint8 illegal_command : 1; /* 2 */ - uint8 com_crc_error : 1; /* 3 */ - uint8 erase_seq_error : 1; /* 4 */ - uint8 address_error : 1; /* 5 */ - uint8 parameter_error : 1; /* 6 */ - uint8 zero : 1; /* 7 */ - }; - uint8 val; - } r1; - - union { - struct { - uint32 reserved00 : 15; /* 0 - 14 */ - uint32 v27_28 : 1; /* 15 */ - uint32 v28_29 : 1; /* 16 */ - uint32 v29_30 : 1; /* 17 */ - uint32 v30_31 : 1; /* 18 */ - uint32 v31_32 : 1; /* 19 */ - uint32 v32_33 : 1; /* 20 */ - uint32 v33_34 : 1; /* 21 */ - uint32 v34_35 : 1; /* 22 */ - uint32 v35_36 : 1; /* 23 */ - uint32 s18a : 1; /* 24 */ - uint32 reserved01 : 4; /* 25 - 28 */ - uint32 uhs2 : 1; /* 29 0 - Non UHS-II card, 1 - UHS-II card */ - uint32 ccs : 1; /* 30 Card Capacity Status, 0 - SDSC, 1 - SDHC or SDXC */ - uint32 busy : 1; /* 31 */ - } r3; - struct { - uint8 card_is_locked : 1; /* 0 */ - uint8 lock_unlock_failed : 1; /* 1 */ - uint8 error : 1; /* 2 */ - uint8 cc_error : 1; /* 3 */ - uint8 card_ecc_failed : 1; /* 4 */ - uint8 wp_violation : 1; /* 5 */ - uint8 erase_param : 1; /* 6 */ - uint8 out_of_range : 1; /* 7 */ - } r2; - struct { - uint32 check_pattern : 8; /* 0 - 7 */ - uint32 voltage_accepted : 4; /* 8 - 11 */ - uint32 reserved : 16; /* 12 - 27 */ - uint32 command_version : 4; /* 28 - 31 */ - } r7; - uint32 val16; - uint32 val32; - }; - }; -}; -#pragma pack(pop) - -#endif /* !_SDCARD_DEF_H */ - DELETED firmware/board/lpc17xx/src/startup.c Index: firmware/board/lpc17xx/src/startup.c ================================================================== --- firmware/board/lpc17xx/src/startup.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include "startup.h" - -extern unsigned long _sidata; /* start address for the initialization values of the .data section. defined in linker script */ -extern unsigned long _sdata; /* start address for the .data section. defined in linker script */ -extern unsigned long _edata; /* end address for the .data section. defined in linker script */ - -extern unsigned long _sbss; /* start address for the .bss section. defined in linker script */ -extern unsigned long _ebss; /* end address for the .bss section. defined in linker script */ - -extern unsigned int *myvectors[]; - -int main(void); - -/* - * - */ -void __attribute__((naked)) Reset_Handler() -{ - unsigned long *pulSrc, *pulDest; - -// /* -// * NOTE -// * Initialization below no necessary if this -// * handler is called by bootloader or processor itself. -// * -// * But if handler is called from debugger we should: -// * * set MSP as thread stack pointer -// * * initialize SP from vector table -// */ -// asm volatile ( -// /* set MSP as thread stack pointer, unprivileged thread mode */ -// "mov r0,#0 \n" -// "msr control, r0 \n" -// "mov r0, %0 \n" -// "msr msp, r0 \n" -// : : "r"(myvectors[0]) : "r0" -// ); - - /* copy the data segment initializers from flash to SRAM */ - pulSrc = &_sidata; - - /* NOTE no need to initialize if code performed from RAM (already copied by bootloader) */ - if (_sidata != _sdata) - { - for(pulDest = &_sdata; pulDest < &_edata; ) - { - *(pulDest++) = *(pulSrc++); - } - } - - /* zero fill the bss segment */ - for(pulDest = &_sbss; pulDest < &_ebss; ) - { - *(pulDest++) = 0; - } - - /* call the application's entry point */ - main(); - - /* NOTREACHED */ - for(;;); -} - DELETED firmware/board/lpc17xx/src/startup.h Index: firmware/board/lpc17xx/src/startup.h ================================================================== --- firmware/board/lpc17xx/src/startup.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef STARTUP_H -#define STARTUP_H - -void Reset_Handler(); - -#endif - DELETED firmware/board/lpc17xx/src/version.h Index: firmware/board/lpc17xx/src/version.h ================================================================== --- firmware/board/lpc17xx/src/version.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -/* - */ -#ifndef VERSION_H -#define VERSION_H - -#define MODULE_NAME "K14-LCD" - -#define MAJOR 0 -#define MINOR 1 -#define BUILD 1 - -#define QUOTEME_(x) #x -#define QUOTEME(x) QUOTEME_(x) - -#define VERSION_STRING QUOTEME(MAJOR.MINOR.BUILD) - -#endif - -/* - * CHANGELOG - * - * 20130620 0.1.1 - * * initial version - */ - DELETED firmware/board/lpc17xx_boot/Makefile Index: firmware/board/lpc17xx_boot/Makefile ================================================================== --- firmware/board/lpc17xx_boot/Makefile +++ /dev/null @@ -1,114 +0,0 @@ -################################################################################ -# -# Generic bootloader for LPC177x and LPC178x based boards. -# -################################################################################ -ROOT_DIR = ../.. - -TARGET = bloader -################################# -# -# Tools config -# -################################# - -SCRIPTS_PATH = $(ROOT_DIR)/$(UTIL_PATH) -OPENOCD_DIR = $(ROOT_DIR)/$(UTIL_PATH)/openocd -MLPC17XX_LIB_PATH = $(ROOT_DIR)/lib/mlpc17xx -MISC_LIB_PATH = $(ROOT_DIR)/lib/misc - -include $(ROOT_DIR)/tcl.mk - -################################# -# -# Compiller flags -# -################################# -include bloader.mk - -CFLAGS += -O2 -CFLAGS += -I$(ROOT_DIR)/lib/lpc17xx -CFLAGS += -I$(MLPC17XX_LIB_PATH)/src -CFLAGS += -I$(MISC_LIB_PATH)/src -CFLAGS += -DIMAGE_OFFSET=$(MAIN_IMAGE_OFFSET) -CFLAGS += -DLOAD_OFFSET=$(MAIN_LOAD_OFFSET) -CFLAGS += -DSIZE_OFFSET=$(MAIN_SIZE_OFFSET) -CFLAGS += -DCRC_OFFSET=$(MAIN_CRC_OFFSET) - -LDFLAGS += -L$(MLPC17XX_LIB_PATH) -LDFLAGS += -L$(MISC_LIB_PATH) -LDFLAGS += -Wl,-Map=$(TARGET).map - -################################# -# -# Objects to build -# -################################# - -TARGET_BIN = $(TARGET).bin -TARGET_OUT = $(TARGET).out -TARGET_HEX = $(TARGET).hex - -DEPFILE = depfile.mk - - -SRC_DIR = src - -C_FILES = $(SRC_DIR)/main.c -C_FILES += $(SRC_DIR)/it.c -C_FILES += $(SRC_DIR)/startup.c -C_FILES += $(SRC_DIR)/sdram.c -C_FILES += $(SRC_DIR)/mpu.c -C_FILES += $(SRC_DIR)/dport.c -C_FILES += $(SRC_DIR)/dport_hw.c - -C_OBJS = $(foreach obj,$(C_FILES),$(patsubst %c,%o, $(obj))) -AS_OBJS = $(foreach obj,$(AS_FILES),$(patsubst %s,%o, $(obj))) -OBJS += $(AS_OBJS) -OBJS += $(C_OBJS) - -LDSCRIPT = src/lpc17xx.ld - -#LIBS += -lc -LIBS += -lmlpc17xx -LIBS += -lmisc - -# TODO VPATH -VPATH += $(MLPC17XX_LIB_PATH) -VPATH += $(MISC_LIB_PATH) - -################################# -# -# Build rules -# -################################# -.PHONY: all list - -all: $(TARGET_BIN) - -$(TARGET_BIN) $(TARGET_HEX): $(TARGET_OUT) - $(CP) -Obinary $(TARGET_OUT) $(TARGET_BIN) - $(CP) -Oihex $(TARGET_OUT) $(TARGET_HEX) - $(TCL_SHELL) insvectcs.tcl $(TARGET_BIN) - -$(TARGET_OUT): $(OBJS) $(LDSCRIPT) $(LIBS) - $(LD) $(LDFLAGS) -T$(LDSCRIPT) -o $(TARGET_OUT) $(OBJS) $(LIBS) - $(SZ) -A $(TARGET_OUT) - --include $(DEPFILE) - -depend: $(C_FILES) - $(CC) $(CFLAGS) -MM $(C_FILES) > $(DEPFILE) - $(TCL_SHELL) $(SCRIPTS_PATH)/depdir.tcl $(DEPFILE) $(C_OBJS) - -list: $(TARGET_OUT) - $(OD) -S $(TARGET_OUT) > $(TARGET).lst - -.PHONY: clean prog - -clean: - $(RM) $(OBJS) $(TARGET_BIN) $(TARGET_HEX) $(TARGET_OUT) $(TARGET).lst - -#prog: $(TARGET_BIN) -# -cd $(OPENOCD_DIR) && openocd -f openocd.cfg -c "upload_image ../../$(PROJECT_DIR)/$(TARGET_BIN) 0x0;shutdown" - DELETED firmware/board/lpc17xx_boot/README Index: firmware/board/lpc17xx_boot/README ================================================================== --- firmware/board/lpc17xx_boot/README +++ /dev/null @@ -1,2 +0,0 @@ -This bootloader is used by different projects. -For build rules see apropriate *.mk file in board directory. DELETED firmware/board/lpc17xx_boot/bloader.mk Index: firmware/board/lpc17xx_boot/bloader.mk ================================================================== --- firmware/board/lpc17xx_boot/bloader.mk +++ /dev/null @@ -1,42 +0,0 @@ -################################# -# -################################# - -# -# NOTE -# vector table offset should be alligned to 128 bytes boundary -# (bits 0:6 of VTOR not implemented) -# - -BLOADER_MAXIMAGE_SIZE = 0x00008000 # maximum size of bootloader image -# -# NOTE -# SIZE, CRC and IMAGE are on the separate sectors of flash -# - -TEXT_ON_SDRAM = 0 - -ifeq ($(TEXT_ON_SDRAM), 1) -# -# .text, .data, .bss on SDRAM -# -MAIN_SIZE_OFFSET = 0x00008000 # address where size of main applicaiton are stored -MAIN_CRC_OFFSET = 0x00008004 # address where CRC of main applicaiton are stored, XXX unused -MAIN_IMAGE_OFFSET = 0x00009000 # where image with main program are stored -MAIN_LOAD_OFFSET = 0xA0000000 # where main program should be loaded, SDRAM -else -# -# .text FLASH -# .data, .bss SDRAM -# -MAIN_SIZE_OFFSET = 0x00008000 # address where size of main applicaiton are stored -MAIN_CRC_OFFSET = 0x00008004 # address where CRC of main applicaiton are stored, XXX unused -MAIN_IMAGE_OFFSET = 0x00009000 # where image with main program are stored -MAIN_LOAD_OFFSET = 0x00009000 # where main program should be loaded, SDRAM -endif - -# -# TODO draw memory usage map -# -# - DELETED firmware/board/lpc17xx_boot/insvectcs.tcl Index: firmware/board/lpc17xx_boot/insvectcs.tcl ================================================================== --- firmware/board/lpc17xx_boot/insvectcs.tcl +++ /dev/null @@ -1,78 +0,0 @@ -#!/bin/sh -#\ -exec tclsh "$0" "$@" - -# -# convert binary string to list of hex numbers -# -proc bin2list {bin} { - set ret [list] - - # XXX will this function work if UTF encoding is used? - while {[string length $bin]} { - if {[binary scan $bin H2 byte]} { - lappend ret 0x$byte - set bin [string range $bin 1 end] - } else { - tk_messageBox -message "can't convert byte" -type ok -icon error - exit 1 - } - } - - return $ret -} - -# -# convert list of hexnumbers (LSB first) to one big number -# -proc list2num {data} { - set ret 0 - set idx 0 - - if {[llength $data] == 0} { - tk_messageBox -message "[dict get [info frame 0] proc]: empty list specified" -type ok -icon error - } - - foreach byte $data { - set ret [expr {$ret | ($byte << (8 * $idx))}] - incr idx - } - - return 0x[format %02X $ret] -} - -# -# conver one big number to list (LSB - first element of list) -# -proc num2list {num size} { - set ret [list] - for {set i 0} {$i < $size} {incr i} { - lappend ret 0x[format %02x [expr {($num >> (8*$i)) & 0xff}]] - } - return $ret -} - -#================================================ -# -# - -set fd [open [lindex $argv 0] r+] -fconfigure $fd -translation binary - -set crc 0 -foreach {b0 b1 b2 b3} [bin2list [read $fd [expr {4 * 7}]]] { - incr crc [expr {$b0 | ($b1 << 8) | ($b2 << 16) | ($b3 << 24)}] -} - -set crc [num2list [expr {0xffffffff - ($crc & 0xffffffff) + 1}] 4] -puts $crc - -foreach byte $crc { - append value [binary format c $byte] -} - -seek $fd 0x1c start -puts -nonewline $fd $value - -close $fd - DELETED firmware/board/lpc17xx_boot/src/dport.c Index: firmware/board/lpc17xx_boot/src/dport.c ================================================================== --- firmware/board/lpc17xx_boot/src/dport.c +++ /dev/null @@ -1,702 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -/* - * TODO - * * turn on/off initializaiton of debug port dependant on GPIO state - * (jumper switch) (or exit from handler without process if GPIO in specific state) - * * show with LED DPort initialization - * * if C_DEBUGEN enabled in DHCSR then DebugMonitor exception - * does not work - show this also - */ -#include -#include -#include -#include -#include "dport.h" -#include "dport_hw.h" -#include "dport_proto.h" - -#define STATIC static -//#define STATIC - -//const struct gpio_t doff_pin = { -// LPC_GPIO3, (1 << 31) -//}; - -static void dport_process(); -static void dport_handler(); -static uint8 dport_cs(uint8 *cs, uint8 *data, int len); -static uint16 dport_num2dup(uint8 num); -static uint8 dport_dup2num(uint16 dup); -static void dport_send_data(uint8 cmd, uint8 *data, int len); -static int dport_process_cmd(uint8 cmd, uint8 *data, int len); - - -extern uint32 *_flash_start; -extern uint32 *_flash_size; -extern uint32 *_uvect_start; -extern uint32 *_uvect_size; - -struct dport_context_t { - /* context stored by software */ - uint32 r4; /* 0x00 */ - uint32 r5; /* 0x04 */ - uint32 r6; /* 0x08 */ - uint32 r7; /* 0x0c */ - uint32 r8; /* 0x10 */ - uint32 r9; /* 0x14 */ - uint32 r10; /* 0x18 */ - uint32 r11; /* 0x1c */ - /* context stored by ARMv7-M core */ - uint32 r0; /* 0x20 0x00 */ - uint32 r1; /* 0x24 0x04 */ - uint32 r2; /* 0x28 0x08 */ - uint32 r3; /* 0x2c 0x0c */ - uint32 r12; /* 0x30 0x10 */ - uint32 lr; /* 0x34 0x14 */ - uint32 pc; /* 0x38 0x18 */ - uint32 xpsr; /* 0x3c 0x1c */ - - /* not realy used */ - uint32 sp; /* 0x40 */ -}; - -#define DPORT_BUF_SIZE 2048 - -struct dport_buffer_t { - uint8 data[DPORT_BUF_SIZE]; - int p; - int c; -}; - -//#define SOFT_BREAK_COUNT 4 - -struct dport_state_t { - struct dport_buffer_t ibuf; - -// struct { -// uint32 addr; /* address where software instruction is placed */ -// uint32 instr; /* substituted instruction */ -// } sbk[SOFT_BREAK_COUNT]; -}; - -STATIC struct dport_context_t context; -STATIC struct dport_state_t dstate; - -/* - * - */ -void dport_init() -{ - /* set handlers priorities to lowest */ - { - int i; - - for (i = 0; i < sizeof(NVIC->IP); i++) - NVIC->IP[i] = 0xff; - } - - /* enable the DebugMonitor exception */ - CoreDebug->DEMCR = CoreDebug_DEMCR_MON_EN_Msk | CoreDebug_DEMCR_TRCENA_Msk; - - /* - * if C_DEBUGEN enabled in DHCSR then DebugMonitor exception - * does not work. - */ - if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) - { - - } - - dport_hw_init(); - - dstate.ibuf.p = 0; - dstate.ibuf.c = 0; -// { -// int i; -// for (i = 0; i < SOFT_BREAK_COUNT; i++) -// dstate.sbk[i].addr = 0; -// } - -// dport_send_data(DPORT_CMD_REQ_RESET, NULL, 0); -} - -/* - * Called on "Debug Monitor" exception and "UART0" interrupt - * - * NOTE - * main program dport vector point to redireciton function which - * redirect to corresponding bootloader vector - * - * NOTE interrupt disable not necessary if this handler has highest priority - */ -void __attribute__((naked)) DPort_Handler() -{ - /* - * store context - * - * EXC_RETURN - * 0xFFFFFFF1 Return to Handler mode. - * Exception return gets state from the main stack. - * Execution uses MSP after return. - * 0xFFFFFFF9 Return to Thread mode. - * Exception Return get state from the main stack. - * Execution uses MSP after return. - * 0xFFFFFFFD Exception return gets state from the process stack. - * Execution uses PSP after return. - */ - asm volatile ( - /* store software part of context */ - "ldr r1, dpcontext__ \n" - "stmia r1!,{r4-r11} \n" - /* check whether MSP or PSP used by previous thread/handler */ - "mov r0, #0xfffffffd \n" - "cmp lr, r0 \n" - "ite eq \n" - "mrseq r0, psp \n" - "mrsne r0, msp \n" - /* XXX store SP in context \n*/ - "str sp, [r1, #0x20] \n" - /* copy hardware stack to context (r0-r3, r12, lr, pc, xpsr) */ - "mov r3, #8 \n" - "copy_hw_stack: \n" - "\t ldr r2, [r0], #4 \n" - "\t str r2, [r1], #4 \n" - "\t subs r3, #1 \n" - "\t bne copy_hw_stack \n" - ); - - /* call handler */ - asm volatile ( - "push {lr} \n" /* NOTE save LR before branch to handler */ - "mov r0, %0 \n" - "blx r0 \n" - "pop {lr} \n" /* NOTE restore LR */ - : : "r"(dport_handler) : "r0", "lr" - ); - - /* restore context */ - asm volatile ( - /* check whether MSP or PSP used by previous thread/handler */ - "mov r0, #0xfffffffd \n" - "cmp lr, r0 \n" - "ite eq \n" - "mrseq r0, psp \n" - "mrsne r0, msp \n" - /* restore hardware part of context (r0-r3, r12, lr, pc, xpsr) */ - "ldr r1, dpcontext__ \n" - "add r1, #0x20 \n" - "mov r3, #8 \n" - "copyback_hw_stack: \n" - "\t ldr r2, [r1], #4 \n" - "\t str r2, [r0], #4 \n" - "\t subs r3, #1 \n" - "\t bne copyback_hw_stack \n" - /* restore software part of context */ - "ldr r1, dpcontext__ \n" - "ldmia r1!,{r4-r11} \n" - /* return from handler */ - "bx lr \n" - ".align 2 \n" - "dpcontext__: .word context \n" - ); -} - -/* - * - */ -static void dport_handler() -{ - char irqn; - - /* if handler is UART0 handler wait for valid command */ - irqn = (SCB->ICSR & 0xff) - 16; - if (irqn == UART0_IRQn) - { -// dport_send_data('U', (uint8*)&context.pc, 4); - } else { -// CoreDebug->DEMCR |= CoreDebug_DEMCR_MON_STEP_Msk; - -// /* check wheather this is software breakpoint */ -// { -// int i; -// for (i = 0; i < SOFT_BREAK_COUNT; i++) -// dstate.sbk[i].addr = 0; -// } - - /* move to instruction next to BKPT */ - if (((*(uint32*)context.pc) & 0xff00) == 0xbe00) - context.pc += 2; - } - - dport_process(); - - if (irqn != UART0_IRQn) - { - /* Debug Monitor Exception */ - SCB->DFSR = SCB_DFSR_BKPT_Msk; /* XXX clear BKPT event? */ - } - NVIC_ClearPendingIRQ(UART0_IRQn); -} - -/* - * - */ -static void dport_process() -{ - char ch; - int *cnt; - int dlen; - uint8 *buf; - - while (1) - { - if (!dport_hw_getchar(&ch)) -#ifdef DPORT_SKIP - ; -#else - continue; -#endif - -#ifdef DPORT_SKIP - return; -#endif - cnt = &dstate.ibuf.c; - buf = dstate.ibuf.data; - - if (ch == DPORT_CMD_MARK) - *cnt = 0; - - if (*cnt == 0 && ch != DPORT_CMD_MARK) - continue; - - if (*cnt > DPORT_BUF_SIZE) - { - *cnt = 0; - continue; - } - - buf[*cnt] = ch; - *cnt = *cnt + 1; - if (ch == '\n') - { - /* - * Command should have even number of symbols. - * And at least 6 symbols - one symbol for MARK, - * one symbol for command, two symbols for checksum; CR symbol, - * LF symbol. - */ - if ((*cnt % 2) != 0 || *cnt < DPORT_HEADTAIL_SIZE) - { - *cnt = 0; - continue; - } - - /* transform command to binary data */ - { - uint8 *in; - uint8 *out; - - in = &buf[2]; - out = &buf[2]; - /* length of hexadecimal data transformed to binary */ - dlen = (*cnt - DPORT_HEADTAIL_SIZE) / 2; - while (*in != '\r') - { - *out = dport_dup2num(*((uint16*)in)); - in += 2; - out += 1; - } - } - - /* check CS */ - { - uint8 cs; - - cs = dport_cs(&buf[1], NULL, 0); - cs = dport_cs(&cs, &buf[2], dlen); - - if (cs != buf[2 + dlen]) - { - dport_send_data(DPORT_CMD_RESP_CSERROR, NULL, 0); - } - else - if (dport_process_cmd(buf[1], &buf[2], dlen)) - return; - } - - *cnt = 0; - continue; - } - } -} - -/* - * ARGS - * cmd input command - * data input data - * len length of input data - * - * - * RETURN - * 1 if debug handler should return control to main program - */ -static int dport_process_cmd(uint8 cmd, uint8 *data, int len) -{ - union dport_req_t *req; - union dport_resp_t *resp; - - req = (union dport_req_t*)data; - resp = (union dport_resp_t*)data; /* XXX same buffer */ - - switch (cmd) - { - case DPORT_CMD_REQ_BUFSIZE: - resp->bufsize.length = DPORT_BUF_SIZE; - dport_send_data(cmd, (uint8*)resp, 2); - return 1; /* NOTE continue */ - case DPORT_CMD_REQ_BREAK: - dport_send_data(cmd, (uint8*)&context.pc, 4); - return 0; - case DPORT_CMD_REQ_CONTINUE: - /* disable stepping */ - CoreDebug->DEMCR &= ~CoreDebug_DEMCR_MON_STEP_Msk; - - dport_send_data(cmd, NULL, 0); - return 1; - case DPORT_CMD_REQ_READREG: - if (len < 1) - return 0; - switch (data[0]) - { - /* XXX GDB numbering scheme */ - case 0: memcpy(&data[1], &context.r0, 4); break; - case 1: memcpy(&data[1], &context.r1, 4); break; - case 2: memcpy(&data[1], &context.r2, 4); break; - case 3: memcpy(&data[1], &context.r3, 4); break; - case 4: memcpy(&data[1], &context.r4, 4); break; - case 5: memcpy(&data[1], &context.r5, 4); break; - case 6: memcpy(&data[1], &context.r6, 4); break; - case 7: memcpy(&data[1], &context.r7, 4); break; - case 8: memcpy(&data[1], &context.r8, 4); break; - case 9: memcpy(&data[1], &context.r9, 4); break; - case 10: memcpy(&data[1], &context.r10, 4); break; - case 11: memcpy(&data[1], &context.r11, 4); break; - case 12: memcpy(&data[1], &context.r12, 4); break; - case 13: memcpy(&data[1], &context.sp, 4); break; - case 14: memcpy(&data[1], &context.lr, 4); break; - case 15: memcpy(&data[1], &context.pc, 4); break; - case 25: memcpy(&data[1], &context.xpsr,4); break; - default: return 0; - } - dport_send_data(cmd, data, 5); - - return 0; - case DPORT_CMD_REQ_WRITEREG: - if (len < 1) - return 0; - switch (req->write_reg.regn) - { - /* XXX GDB numbering scheme */ - case 0: memcpy(&context.r0, &data[1], 4); break; - case 1: memcpy(&context.r1, &data[1], 4); break; - case 2: memcpy(&context.r2, &data[1], 4); break; - case 3: memcpy(&context.r3, &data[1], 4); break; - case 4: memcpy(&context.r4, &data[1], 4); break; - case 5: memcpy(&context.r5, &data[1], 4); break; - case 6: memcpy(&context.r6, &data[1], 4); break; - case 7: memcpy(&context.r7, &data[1], 4); break; - case 8: memcpy(&context.r8, &data[1], 4); break; - case 9: memcpy(&context.r9, &data[1], 4); break; - case 10: memcpy(&context.r10, &data[1], 4); break; - case 11: memcpy(&context.r11, &data[1], 4); break; - case 12: memcpy(&context.r12, &data[1], 4); break; - case 13: memcpy(&context.sp, &data[1], 4); break; - case 14: memcpy(&context.lr, &data[1], 4); break; - case 15: memcpy(&context.pc, &data[1], 4); break; - case 25: memcpy(&context.xpsr, &data[1], 4); break; - default: return 0; - } - - resp->write_reg.regn = req->write_reg.regn; - dport_send_data(cmd, (uint8*)resp, sizeof(struct dport_resp_write_reg_t)); - return 0; - case DPORT_CMD_REQ_READMEM: - if (req->read_mem.length > READMEM_PAYLOAD_MAX_SIZE) - return 0; - resp->read_mem.offset = req->read_mem.offset; - resp->read_mem.length = req->read_mem.length; - switch (req->read_mem.length) - { - case 4: - resp->read_mem.reg32 = *((volatile uint32*)req->read_mem.offset); - break; - case 2: - resp->read_mem.reg16 = *((volatile uint16*)req->read_mem.offset); - break; - case 1: - resp->read_mem.reg8 = *((volatile uint8*)req->read_mem.offset); - break; - default: - memcpy(resp->read_mem.data, (void*)req->read_mem.offset, req->read_mem.length); - } - - dport_send_data(cmd, data, 8 + req->read_mem.length); - return 0; - case DPORT_CMD_REQ_WRITEMEM: - if (req->write_mem.length > WRITEMEM_PAYLOAD_MAX_SIZE) - return 0; - - resp->write_mem.offset = req->write_mem.offset; - resp->write_mem.length = req->write_mem.length; - - switch (req->write_mem.length) - { - case 4: - *((volatile uint32*)req->write_mem.offset) = req->write_mem.reg32; - break; - case 2: - *((volatile uint16*)req->write_mem.offset) = req->write_mem.reg16; - break; - case 1: - *((volatile uint8*)req->write_mem.offset) = req->write_mem.reg8; - break; - default: - memcpy((void*)(uint32)req->write_mem.offset, req->write_mem.data, req->write_mem.length); - } - - asm volatile ( - "dsb \n" - "isb \n" - ); - - dport_send_data(cmd, (uint8*)resp, sizeof(struct dport_write_mem_resp_t)); - return 0; - case DPORT_CMD_REQ_FLASH: - /* XXX simple, FLASHBUF_SIZE bytes blocks write with autoerase */ - { - uint32 offset; - uint32 result; - uint32 length; - uint32 fstart; - uint32 fsize; - - offset = req->flash.offset; - length = req->flash.length; - - fstart = (uint32)&_flash_start; - fsize = (uint32)&_flash_size; - - /* XXX flash range check */ - if ((fstart > 0 && offset < fstart) || - ((offset + length) > (fstart + fsize))) - { - result = 0xa0a0a0a0; - dport_send_data(DPORT_CMD_RESP_ERRCUSTOM, (uint8*)&result, 4); - return 0; - } - - if ((offset % FLASHBUF_SIZE) != 0) - { - result = 0xa5a5a5a5; - dport_send_data(DPORT_CMD_RESP_ERRCUSTOM, (uint8*)&result, 4); - return 0; - } - - memcpy(flashbuf, req->flash.data, length); - result = dport_hw_iap_write(flashbuf, FLASHBUF_SIZE, offset); - if (result != 0) - { - dport_send_data(DPORT_CMD_RESP_ERRCUSTOM, (uint8*)&result, 4); - return 0; - } - - resp->flash.offset = req->flash.offset; - resp->flash.length = req->flash.length; - dport_send_data(cmd, (uint8*)resp, 8); - return 0; - } - case DPORT_CMD_REQ_FLASH_BUFSIZE: - resp->flash_bufsize.size = FLASHBUF_SIZE; - - dport_send_data(cmd, (uint8*)resp, sizeof(struct dport_resp_flash_bufsize_t)); - break; - case DPORT_CMD_REQ_RESET: - dport_send_data(cmd, NULL, 0); - - /* NOTE insert some pause - let command be processed by host */ - stimer_wait_us(500 * 1000); - - asm volatile ( - "dsb \r\n" - "cpsid i \r\n" - ); - SCB->AIRCR = (0x05fa << SCB_AIRCR_VECTKEY_Pos) | SCB_AIRCR_SYSRESETREQ_Msk; - return 1; - case DPORT_CMD_REQ_STEP: - CoreDebug->DEMCR |= CoreDebug_DEMCR_MON_STEP_Msk; - dport_send_data(cmd, NULL, NULL); - return 1; - case DPORT_CMD_REQ_USERF: - { - uint32 *handler; - - /* XXX */ - if (req->userf.n >= ((uint32)&_uvect_size / 4)) - { - dport_send_data(DPORT_CMD_RESP_ERRCUSTOM, (uint8*)&req->userf.n, 1); - return 0; - } - - dport_send_data(cmd, NULL, 0); - - /* NOTE insert some pause - let command be processed by host */ - stimer_wait_us(200 * 1000); - - handler = (uint32*)*((uint32*)((uint32)&_uvect_start + 4 * req->userf.n)); - - asm volatile ( - "push {lr} \n" /* NOTE save LR before branch to handler */ - "mov r0, %0 \n" - "blx r0 \n" - "pop {lr} \n" /* NOTE restore LR */ - : :"r" (handler): "r0", "lr" - ); - - break; - } - default: - dport_send_data(DPORT_CMD_RESP_CMDUNKNOWN, &cmd, 1); - } - - return 0; -} - -/* - * - */ -static void dport_send_data(uint8 cmd, uint8 *data, int len) -{ - uint8 cs; - uint16 dup; - - dport_hw_putchar('%'); - dport_hw_putchar(cmd); - - cs = dport_cs(&cmd, NULL, 0); - if (data) - { - while (len--) - { - cs = dport_cs(&cs, data, 1); - dup = dport_num2dup(*data++); - dport_hw_putchar(dup & 0xff); - dport_hw_putchar(dup >> 8); - } - } - dup = dport_num2dup(cs); - dport_hw_putchar(dup & 0xff); - dport_hw_putchar(dup >> 8); - - dport_hw_putchar('\r'); - dport_hw_putchar('\n'); -} - -/* - * - */ -static uint16 dport_num2dup(uint8 num) -{ - uint16 ret; - uint8 n; - - ret = 0; - n = num & 0x0f; - if (n < 10) - ret |= (n + '0'); - else - ret |= (n + 'A' - 10); - - n = num >> 4; - ret <<= 8; - if (n < 10) - ret |= (n + '0'); - else - ret |= (n + 'A' - 10); - - return ret; -} - -/* - * - */ -static uint8 dport_dup2num(uint16 dup) -{ - uint8 ret; - uint8 n; - - ret = 0; - n = dup & 0xff; - if (n < 'A') - ret |= (n - '0' ) & 0x0f; - else - ret |= (n - 'A' + 10) & 0x0f; - - ret <<= 4; - n = dup >> 8; - if (n < 'A') - ret |= (n - '0' ) & 0x0f; - else - ret |= (n - 'A' + 10) & 0x0f; - - return ret; -} - -/* - * - */ -static uint8 dport_cs(uint8 *cs, uint8 *data, int len) -{ - uint8 ret; - - ret = 0; - if (cs) - ret = *cs; - if (data) - { - while (len--) - ret += *data++; - } - - return ret & 0xff; -} - -///* -// * -// */ -//static void dport_send_str(char *st) -//{ -// if (!st) -// return; -// for (; *st;st++) -// dport_hw_putchar(*st); -//} -// DELETED firmware/board/lpc17xx_boot/src/dport.h Index: firmware/board/lpc17xx_boot/src/dport.h ================================================================== --- firmware/board/lpc17xx_boot/src/dport.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef DPORT_H -#define DPORT_H - -#include -void dport_init(); - -#endif - DELETED firmware/board/lpc17xx_boot/src/dport_hw.c Index: firmware/board/lpc17xx_boot/src/dport_hw.c ================================================================== --- firmware/board/lpc17xx_boot/src/dport_hw.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include -#include -#include "dport_hw.h" - -static void dport_hw_uart_setup(); -static void dport_hw_iap_setup(); - -/* - * - */ -void dport_hw_init() -{ - dport_hw_uart_setup(); - dport_hw_iap_setup(); -// dport_hw_timer_setup(); -} - -/************************************************* - * UART functions - *************************************************/ -#define UART_BAUD_38400_20_MHZ ((0 << 0) | (19 << 8) | (5 << 16) | (7 << 24)) -#define UART_BAUD_38400_24_MHZ ((0 << 0) | (23 << 8) | (7 << 16) | (10 << 24)) -#define UART_BAUD_115200_20_MHZ ((0 << 0) | (8 << 8) | (5 << 16) | (14 << 24)) -#define UART_BAUD_115200_24_MHZ ((0 << 0) | (7 << 8) | (6 << 16) | (7 << 24)) -#define UART_BAUD_115200_36_MHZ ((0 << 0) | (13 << 8) | (1 << 16) | ( 2 << 24)) - -#if CLK_PCLK == (36 * 1000000) - #define UART_BAUD_115200 UART_BAUD_115200_36_MHZ -#elif CLK_PCLK == (24 * 1000000) - #define UART_BAUD_38400 UART_BAUD_38400_24_MHZ - #define UART_BAUD_115200 UART_BAUD_115200_24_MHZ -#elif CLK_PCLK == (20 * 1000000) - #define UART_BAUD_38400 UART_BAUD_38400_20_MHZ - #define UART_BAUD_115200 UART_BAUD_115200_20_MHZ -#else - #error Unknown PCLK frequency -#endif - - -//#if CLK_PCLK == (24 * 1000000) -// #define UART_BAUD_38400 UART_BAUD_38400_24_MHZ -// #define UART_BAUD_115200 UART_BAUD_115200_24_MHZ -//#elif CLK_PCLK == (20 * 1000000) -// #define UART_BAUD_38400 UART_BAUD_38400_20_MHZ -// #define UART_BAUD_115200 UART_BAUD_115200_20_MHZ -//#else -// #error Unknown PCLK frequency -//#endif - -#define UART_BAUD UART_BAUD_115200 -/* - * - */ -static void dport_hw_uart_setup() -{ - /* setup UART0 */ - { - LPC_SC->PCONP |= PCONP_PCUART0; - - /* P0.2 (TXD0), P0.3 (RXD0) */ - LPC_IOCON->P0_2 &= ~LPC_IOCON_FUNC_MASK; - LPC_IOCON->P0_2 |= LPC_IOCON_FUNC(1); - LPC_IOCON->P0_3 &= ~LPC_IOCON_FUNC_MASK; - LPC_IOCON->P0_3 |= LPC_IOCON_FUNC(1); - - LPC_UART0->LCR = UART_LCR_DLAB; - - /* - * CCLK/4 = 22.11834 MHz - * - * PCLK - * BAUD = ---------------------------------------- - * (16 * (256 * DLM + DLL) * (1 + DIV/MUL)) - * - * - */ - - /* - * bits of speed argument: - * - * 0..7 bits DLM - * 8..15 bits DLL - * 16..23 bits DIV - * 24..31 bits MUL - */ - { - uint8 dlm; - uint8 dll; - uint8 div; - uint8 mul; - - dlm = (UART_BAUD >> 0) & 0xff; - dll = (UART_BAUD >> 8) & 0xff; - div = (UART_BAUD >> 16) & 0xff; - mul = (UART_BAUD >> 24) & 0xff; - - LPC_UART0->DLM = dlm; - LPC_UART0->DLL = dll; - LPC_UART0->FDR = (div << 0) | (mul << 4); - LPC_UART0->LCR = (3 << 0); - } - - /* Reset RX, TX FIFO's, activate FIFO's, 0 characters for CTI interrupt */ - LPC_UART0->FCR = (1 << 2) | (1 << 1) | (1 << 0) | (0 << 6); - - /* Enable receive interrupt */ - LPC_UART0->IER = UART_IER_RBR; - } - - /* enable UART interrupt, set priority to maximum */ - NVIC_EnableIRQ(UART0_IRQn); - NVIC_SetPriorityRaw(UART0_IRQn, 0); -} - -/* - * - */ -int dport_hw_getchar(char *c) -{ - uint32 intid; - - intid = (LPC_UART0->IIR >> 1) & 0x07; - - if (intid == UART_INTID_RLS || intid == UART_INTID_RDA || intid == UART_INTID_CTI) - { - if (LPC_UART0->LSR & UART_LSR_RDR) - { - *c = LPC_UART0->RBR; -// dport_hw_putchar((*c >> 4) >= 10 ? ((*c >> 4) + 'a' - 10): (*c >> 4) + '0'); -// dport_hw_putchar((*c & 0x0f) >= 10 ? ((*c & 0x0f) + 'a' - 10): (*c & 0x0f) + '0'); -// dport_hw_putchar('\r'); -// dport_hw_putchar('\n'); - return 1; - } - } - - return 0; -} - -/* - * - */ -int dport_hw_putchar(char c) -{ - while (!(LPC_UART0->LSR & UART_LSR_THRE)) - ; - LPC_UART0->THR = c; - - return c; -} - -/************************************************* - * Flash write functions (IAP) - *************************************************/ - -struct flash_sector_t { - uint32 size; /* sector size in bytes */ - uint32 start; /* sector start address */ -}; - -#define SECTOR_COUNT 30 -const struct flash_sector_t sectors[SECTOR_COUNT] = { - { (4 * 1024), 0x00000000}, /* 0 00 0x00000000 - 0x00000FFF */ - { (4 * 1024), 0x00001000}, /* 1 01 0x00001000 - 0x00001FFF */ - { (4 * 1024), 0x00002000}, /* 2 02 0x00002000 - 0x00002FFF */ - { (4 * 1024), 0x00003000}, /* 3 03 0x00003000 - 0x00003FFF */ - { (4 * 1024), 0x00004000}, /* 4 04 0x00004000 - 0x00004FFF */ - { (4 * 1024), 0x00005000}, /* 5 05 0x00005000 - 0x00005FFF */ - { (4 * 1024), 0x00006000}, /* 6 06 0x00006000 - 0x00006FFF */ - { (4 * 1024), 0x00007000}, /* 7 07 0x00007000 - 0x00007FFF */ - { (4 * 1024), 0x00008000}, /* 8 08 0x00008000 - 0x00008FFF */ - { (4 * 1024), 0x00009000}, /* 9 09 0x00009000 - 0x00009FFF */ - { (4 * 1024), 0x0000a000}, /* 10 0a 0x0000A000 - 0x0000AFFF */ - { (4 * 1024), 0x0000b000}, /* 11 0b 0x0000B000 - 0x0000BFFF */ - { (4 * 1024), 0x0000c000}, /* 12 0c 0x0000C000 - 0x0000CFFF */ - { (4 * 1024), 0x0000d000}, /* 13 0d 0x0000D000 - 0x0000DFFF */ - { (4 * 1024), 0x0000e000}, /* 14 0e 0x0000E000 - 0x0000EFFF */ - { (4 * 1024), 0x0000f000}, /* 15 0f 0x0000F000 - 0x0000FFFF */ - { (32 * 1024), 0x00010000}, /* 16 10 0x00010000 - 0x00017FFF */ - { (32 * 1024), 0x00018000}, /* 17 11 0x00018000 - 0x0001FFFF */ - { (32 * 1024), 0x00020000}, /* 18 12 0x00020000 - 0x00027FFF */ - { (32 * 1024), 0x00028000}, /* 19 13 0x00028000 - 0x0002FFFF */ - { (32 * 1024), 0x00030000}, /* 20 14 0x00030000 - 0x00037FFF */ - { (32 * 1024), 0x00038000}, /* 21 15 0x00038000 - 0x0003FFFF */ - { (32 * 1024), 0x00040000}, /* 22 16 0x00040000 - 0x00047FFF */ - { (32 * 1024), 0x00048000}, /* 23 17 0x00048000 - 0x0004FFFF */ - { (32 * 1024), 0x00050000}, /* 24 18 0x00050000 - 0x00057FFF */ - { (32 * 1024), 0x00058000}, /* 25 19 0x00058000 - 0x0005FFFF */ - { (32 * 1024), 0x00060000}, /* 26 1a 0x00060000 - 0x00067FFF */ - { (32 * 1024), 0x00068000}, /* 27 1b 0x00068000 - 0x0006FFFF */ - { (32 * 1024), 0x00070000}, /* 28 1c 0x00070000 - 0x00077FFF */ - { (32 * 1024), 0x00078000}, /* 29 1d 0x00078000 - 0x0007FFFF */ -}; - - -#define IAP_LOCATION 0x1fff1ff1 - -#define IAP_CMD_PREPARE_SECTORS_FOR_WRITE 50 -#define IAP_CMD_COPY_RAM_TO_FLASH 51 -#define IAP_CMD_ERASE_SECTORS 52 -#define IAP_CMD_BLANK_CHECK_SECTORS 53 -#define IAP_CMD_READ_PART_ID 54 - -#define IAP_RCODE_CMD_SUCCESS 0 -#define IAP_RCODE_INVALID_COMMAND 1 -#define IAP_RCODE_SRC_ADDR_ERROR 2 -#define IAP_RCODE_DST_ADDR_ERROR 3 -#define IAP_RCODE_SRC_ADDR_NOT_MAPPED 4 -#define IAP_RCODE_DST_ADDR_NOT_MAPPED 5 -#define IAP_RCODE_COUNT_ERROR 6 -#define IAP_RCODE_INVALID_SECTOR 7 -#define IAP_RCODE_SECTOR_NOT_BLANK 8 -#define IAP_RCODE_SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION 9 -#define IAP_RCODE_COMPARE_ERROR 10 -#define IAP_RCODE_BUSY 11 - - - -static unsigned int command[5]; -static unsigned int result[5]; - -uint8 flashbuf[FLASHBUF_SIZE]; - -typedef void (*IAP) (unsigned int [], unsigned int []); - -static IAP dport_hw_iap_entry; - -static uint32 dport_hw_iap_prepare(uint32 start, uint32 end); -static uint32 dport_hw_iap_erase(uint32 start, uint32 end); -static uint32 dport_hw_iap_ram2flash(uint8 *data, uint32 len, uint32 offs); - -static uint32 addr2sector(uint32 addr); -static uint32 addrisstart(uint32 addr); - -/* - * - */ -static void dport_hw_iap_setup() -{ - dport_hw_iap_entry = (IAP)IAP_LOCATION; - - command[0] = IAP_CMD_READ_PART_ID; - dport_hw_iap_entry(command, result); -} - -/* - * wrapper for completely write data to flash - * - * NOTE interrupts should be disabled when using internal IAP functions - * - * ARGS - * data pointer to data - * len length of data - * offs offset of flash - * - * RETURN - * zero on success or IAP return code otherwise - * - */ -uint32 dport_hw_iap_write(uint8 *data, uint32 len, uint32 offs) -{ - uint32 sector; - uint32 ret; - - sector = addr2sector(offs); - - ret = 0; - if (addrisstart(offs)) - { - ret = dport_hw_iap_prepare(sector, sector); - if (ret != IAP_RCODE_CMD_SUCCESS) - goto out; - - ret = dport_hw_iap_erase(sector, sector); - if (ret != IAP_RCODE_CMD_SUCCESS) - goto out; - } - - ret = dport_hw_iap_prepare(sector, sector); - if (ret != IAP_RCODE_CMD_SUCCESS) - goto out; - - ret = dport_hw_iap_ram2flash(data, len, offs); - if (ret != IAP_RCODE_CMD_SUCCESS) - goto out; - -out: - return ret; -} - -/* - * ARGS - * start start sector - * end end sector - */ -static uint32 dport_hw_iap_prepare(uint32 start, uint32 end) -{ - command[0] = IAP_CMD_PREPARE_SECTORS_FOR_WRITE; - command[1] = start; - command[2] = end; - dport_hw_iap_entry(command, result); - return result[0]; -} - -/* - * ARGS - * start start sector - * end end sector - * - */ -static uint32 dport_hw_iap_erase(uint32 start, uint32 end) -{ - command[0] = IAP_CMD_ERASE_SECTORS; - command[1] = start; - command[2] = end; - command[3] = CLK_CCLK/1000; - dport_hw_iap_entry(command, result); - return result[0]; -} - -/* - * ARGS - * start start sector - * end end sector - * - */ -static uint32 dport_hw_iap_ram2flash(uint8 *data, uint32 len, uint32 offs) -{ - command[0] = IAP_CMD_COPY_RAM_TO_FLASH; - command[1] = offs; - command[2] = (unsigned int)data; - command[3] = len; - command[4] = CLK_CCLK/1000; - dport_hw_iap_entry(command, result); - return result[0]; -} - -/* - * return sector number from appropriate address - */ -static uint32 addr2sector(uint32 addr) -{ - uint32 i; - uint32 end; - - for (i = 0; i < SECTOR_COUNT; i++) - { - end = sectors[i].start + sectors[i].size; - if (addr >= sectors[i].start && addr < end) - return i; - } - - return (SECTOR_COUNT - 1); /* NOTREACHED */ -} - -/* - * check whether address is start address of sector - * - * RETURN - * 1 if address is start of sector - * 0 otherwise - */ -static uint32 addrisstart(uint32 addr) -{ - uint32 i; - - for (i = 0; i < SECTOR_COUNT; i++) - { - if (addr == sectors[i].start) - return 1; - } - - return 0; -} - DELETED firmware/board/lpc17xx_boot/src/dport_hw.h Index: firmware/board/lpc17xx_boot/src/dport_hw.h ================================================================== --- firmware/board/lpc17xx_boot/src/dport_hw.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef DPORT_HW_H -#define DPORT_HW_H - -#include - -void dport_hw_init(); -int dport_hw_getchar(char *c); -int dport_hw_putchar(char c); -uint32 dport_hw_iap_write(uint8 *data, uint32 len, uint32 offs); - -#define FLASHBUF_SIZE 512 -extern uint8 flashbuf[FLASHBUF_SIZE]; - -#endif - DELETED firmware/board/lpc17xx_boot/src/dport_proto.h Index: firmware/board/lpc17xx_boot/src/dport_proto.h ================================================================== --- firmware/board/lpc17xx_boot/src/dport_proto.h +++ /dev/null @@ -1,170 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef DPORT_PROTO_H -#define DPORT_PROTO_H - -#include - -/* - * Packet format - * ============= - * - * % CR LF - * - * % start of packet - * cmd one symbol [a-zA-Z] - * payload hex digits [0-9A-Z] - * CS sum of "cmd" (ASCII value) and payload in binary form - * truncated to one byte - * - * Examples - * -------- - * - * XXX invalid check in this example (XOR'ed instead of addition) - * %m84C021A004000000AC read 4 bytes of memory at 0xa021c084 - * - * - */ - -#define DPORT_CMD_MARK '%' - -#define DPORT_CMD_REQ_BUFSIZE 'a' -#define DPORT_CMD_REQ_BREAK 'b' -#define DPORT_CMD_REQ_CONTINUE 'c' -#define DPORT_CMD_REQ_FLASH 'f' -#define DPORT_CMD_REQ_READREG 'g' -#define DPORT_CMD_REQ_WRITEREG 'G' -#define DPORT_CMD_REQ_FLASH_BUFSIZE 'l' -#define DPORT_CMD_REQ_READMEM 'm' -#define DPORT_CMD_REQ_WRITEMEM 'M' -#define DPORT_CMD_REQ_RESET 'r' -#define DPORT_CMD_REQ_STEP 's' -#define DPORT_CMD_REQ_USERF 'u' - -#define DPORT_CMD_RESP_CSERROR 'E' -#define DPORT_CMD_RESP_CMDUNKNOWN 'U' -#define DPORT_CMD_RESP_ERRCUSTOM 'e' - -#define DPORT_MAXBUF_SIZE 4096 - -#define DPORT_HEAD_SIZE 2 -#define DPORT_TAIL_SIZE 4 -#define DPORT_HEADTAIL_SIZE (DPORT_HEAD_SIZE + DPORT_TAIL_SIZE) -#define DPORT_PAYLOAD_SIZE (DPORT_MAXBUF_SIZE - DPORT_HEADTAIL_SIZE) -#define DPORT_BINARY_PAYLOAD_SIZE (DPORT_PAYLOAD_SIZE / 2) - -#define DPORT_BINARY_PAYLOAD_SIZE2(buflen) ((buflen - DPORT_HEADTAIL_SIZE) / 2) - -#pragma pack(push, 1) -union dport_req_t { - struct dport_req_read_reg_t { - uint8 regn; - } read_reg; - struct dport_req_write_reg_t { - uint8 regn; - uint32 value; - } write_reg; - struct dport_req_read_mem_t { - uint32 offset; - uint32 length; - } read_mem; - struct dport_req_write_mem_t{ - uint32 offset; - uint32 length; -#define WRITEMEM_PAYLOAD_MAX_SIZE (DPORT_BINARY_PAYLOAD_SIZE - 8) - union { - uint8 data[WRITEMEM_PAYLOAD_MAX_SIZE]; - uint8 reg8; - uint16 reg16; - uint32 reg32; - }; - } write_mem; - struct { -#define DPORT_CMD_FLASH_ARG_SIZE 8 - uint32 offset; - uint32 length; -#define FLASH_PAYLOAD_MAX_SIZE (DPORT_BINARY_PAYLOAD_SIZE - DPORT_CMD_FLASH_ARG_SIZE) - uint8 data[FLASH_PAYLOAD_MAX_SIZE]; - } flash; - struct dport_req_userf_t { - uint8 n; - } userf; -}; - -union dport_resp_t { - struct { - uint8 regn; - uint32 value; - } read_reg; - struct dport_resp_write_reg_t { - uint8 regn; - } write_reg; - struct dport_resp_flash_bufsize_t { - uint32 size; - } flash_bufsize; - struct { - uint32 addr; - } brk; - struct { - uint16 length; - } bufsize; - struct { - uint32 offset; - uint32 length; -#define READMEM_PAYLOAD_MAX_SIZE (DPORT_BINARY_PAYLOAD_SIZE - 8) - union { - uint8 data[READMEM_PAYLOAD_MAX_SIZE]; - uint8 reg8; - uint16 reg16; - uint32 reg32; - }; - } read_mem; - struct dport_write_mem_resp_t { - uint32 offset; - uint32 length; - } write_mem; - struct { - uint32 offset; - uint32 length; - } flash; -}; -#pragma pack(pop) - -#define DPORT_REGNUM_R0 0 -#define DPORT_REGNUM_R1 1 -#define DPORT_REGNUM_R2 2 -#define DPORT_REGNUM_R3 3 -#define DPORT_REGNUM_R4 4 -#define DPORT_REGNUM_R5 5 -#define DPORT_REGNUM_R6 6 -#define DPORT_REGNUM_R7 7 -#define DPORT_REGNUM_R8 8 -#define DPORT_REGNUM_R9 9 -#define DPORT_REGNUM_R10 10 -#define DPORT_REGNUM_R11 11 -#define DPORT_REGNUM_R12 12 -#define DPORT_REGNUM_SP 13 -#define DPORT_REGNUM_LR 14 -#define DPORT_REGNUM_PC 15 -#define DPORT_REGNUM_XPSR 25 - -#endif - DELETED firmware/board/lpc17xx_boot/src/it.c Index: firmware/board/lpc17xx_boot/src/it.c ================================================================== --- firmware/board/lpc17xx_boot/src/it.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -/* - * interrupt vectors definitions - */ -extern unsigned int *_estack; /* init value for the stack pointer. defined in linker script */ - -extern void Reset_Handler(void); - -void Default_Handler(void); - -void NMI_Handler(void); -void HF_Handler(void); -void MEM_Handler(void); -void BUS_Handler(void); -void UF_Handler(void); -void SVC_Handler(void); -void PendSV_Handler(void); - -void DPort_Handler(void); -void UART1_Handler(void); -void UART2_Handler(void); -void UART3_Handler(void); - -/* - * vector table - */ -unsigned int * myvectors[] __attribute__ ((section("vectors")))= { - (unsigned int *)&_estack, /* The initial stack pointer */ - /* Interrupt ID / Exception number, TODO Check interrupts sources comment, add missing interrupts */ - (unsigned int *)Reset_Handler, /* 1, Reset */ - (unsigned int *)NMI_Handler, /* 2, NMI */ - (unsigned int *)HF_Handler, /* 3, Hard Fault */ - (unsigned int *)MEM_Handler, /* 4, Memory Management */ - (unsigned int *)BUS_Handler, /* 5, Bus Fault */ - (unsigned int *)UF_Handler, /* 6, Usage Fault */ - (unsigned int *)Default_Handler, /* 7, Reserved */ - (unsigned int *)Default_Handler, /* 8, Reserved */ - (unsigned int *)Default_Handler, /* 9, Reserved */ - (unsigned int *)Default_Handler, /* 10, Reserved */ - (unsigned int *)Default_Handler, /* 11, SVCall */ - (unsigned int *)DPort_Handler, /* 12, Debug Monitor */ - (unsigned int *)Default_Handler, /* 13, Reserved */ - (unsigned int *)Default_Handler, /* 14, PendSV Handler */ - (unsigned int *)Default_Handler, /* 15, SysTick ISR Handler */ - (unsigned int *)Default_Handler, /* 0 / 16, WatchDog Timer */ - (unsigned int *)Default_Handler, /* 1 / 17, Timer 0 */ - (unsigned int *)Default_Handler, /* 2 / 18, Timer 1 */ - (unsigned int *)Default_Handler, /* 3 / 19, Timer 2 */ - (unsigned int *)Default_Handler, /* 4 / 20, Timer 3 */ - (unsigned int *)DPort_Handler, /* 5 / 21, UART 0 */ - (unsigned int *)UART1_Handler, /* 6 / 22, UART 1 */ - (unsigned int *)UART2_Handler, /* 7 / 23, UART 2 */ - (unsigned int *)UART3_Handler, /* 8 / 24, UART 3 */ - (unsigned int *)Default_Handler, /* 9 / 25, PWM Interrupt */ - (unsigned int *)Default_Handler, /* 10 / 26, I2C0 */ - (unsigned int *)Default_Handler, /* 11 / 27, I2C1 */ - (unsigned int *)Default_Handler, /* 12 / 28, I2C2 */ - (unsigned int *)Default_Handler, /* 13 / 29, SPI0 */ - (unsigned int *)Default_Handler, /* 14 / 30, SSP0 */ - (unsigned int *)Default_Handler, /* 15 / 31, SSP1 */ - (unsigned int *)Default_Handler, /* 16 / 32, PLL lock */ - (unsigned int *)Default_Handler, /* 17 / 33, Real Time Clock Interrupt */ - (unsigned int *)Default_Handler, /* 18 / 34, External interrupt 0 */ - (unsigned int *)Default_Handler, /* 19 / 35, External interrupt 1 */ - (unsigned int *)Default_Handler, /* 20 / 36, External interrupt 2 */ - (unsigned int *)Default_Handler, /* 21 / 37, External interrupt 3 */ - (unsigned int *)Default_Handler, /* 22 / 38, A/D Converter 0 end of conversion */ - (unsigned int *)Default_Handler, /* 23 / 39, Brown out detect */ - (unsigned int *)Default_Handler, /* 24 / 40, USB DMA Interrupt */ - (unsigned int *)Default_Handler, /* 25 / 41, CAN Interrupt */ - (unsigned int *)Default_Handler, /* 26 / 42, IntStatus of DMA channel 0/1 */ - (unsigned int *)Default_Handler, /* 27 / 43, SI (state change) */ - (unsigned int *)Default_Handler, /* 28 / 44, Ethernet Interrupt */ - (unsigned int *)Default_Handler, /* 29 / 45, Repetitive interrupt timer */ - (unsigned int *)Default_Handler, /* 30 / 46, Motor Control PWM */ - (unsigned int *)Default_Handler, /* 31 / 47, Quadrature Encoder */ - (unsigned int *)Default_Handler, /* 32 / 48, PLL1 lock (PLOCK) */ - (unsigned int *)Default_Handler, /* 33 / 49, USB Activity */ - (unsigned int *)Default_Handler, /* 34 / 50, CAN Activity */ -}; - -/* - * - */ -void Default_Handler(void) -{ - while (1); -} - -/* - * - */ -void NMI_Handler(void) -{ - while (1); -} - -/* - * - */ -void HF_Handler(void) -{ - while (1); -} - -/* - * - */ -void MEM_Handler(void) -{ - while (1); -} - -/* - * - */ -void BUS_Handler(void) -{ - while (1); -} - -/* - * - */ -void UF_Handler(void) -{ - while (1); -} - DELETED firmware/board/lpc17xx_boot/src/lpc17xx.ld Index: firmware/board/lpc17xx_boot/src/lpc17xx.ld ================================================================== --- firmware/board/lpc17xx_boot/src/lpc17xx.ld +++ /dev/null @@ -1,101 +0,0 @@ -/* - * - */ -MEMORY -{ - RAM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K - /* - * bootloader copy vector table to SRAM - reserve some space. - * 256 bytes should be enough (168 bytes actually, 40 vectors, - * 4 bytes for stack pointer, 4 bytes for reset vector). - */ - VECTRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256 - /* four user-defined vectors that can be called from DPort interface */ - UVECTRAM (rwx) : ORIGIN = 0x20000100, LENGTH = 16 - RAM0_0 (rwx) : ORIGIN = 0x20000104, LENGTH = 7936 - RAM0_1 (rwx) : ORIGIN = 0x20002000, LENGTH = 8K - RAM1 (rwx) : ORIGIN = 0x20004000, LENGTH = 16K - /* NOTE 512 Kb available, but limit to 32k */ - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 32K - FLASH_TRUE (rx) : ORIGIN = 0x00000000, LENGTH = 512K -} - -_estack = ORIGIN(RAM)+LENGTH(RAM); - -_flash_start = ORIGIN(FLASH_TRUE); -_flash_size = LENGTH(FLASH_TRUE); - -_vect_start = ORIGIN(VECTRAM); -_vect_size = LENGTH(VECTRAM); - -_uvect_start = ORIGIN(UVECTRAM); -_uvect_size = LENGTH(UVECTRAM); - -SECTIONS -{ - .text : { - . = ALIGN(4); - *(vectors) /* Vector table */ - *(.text) /* Program code */ - *(.text.*) /* remaining code */ - *(.rodata) /* read-only data (constants) */ - *(.rodata*) - - . = ALIGN(4); - _etext = .; - /* This is used by the startup in order to initialize the .data secion */ - _sidata = _etext; - } >FLASH - - /* .ARM.exidx is sorted, so has to go in its own output section. - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >RAM - */ - - /DISCARD/ : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - /* This is used by the startup in order to initialize the .data secion */ - _sdata = . ; - - *(.data) - *(.data.*) - - . = ALIGN(4); - /* This is used by the startup in order to initialize the .data secion */ - _edata = . ; - } >RAM - - /* This is the uninitialized data section */ - .bss (NOLOAD): - { - . = ALIGN(4); - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; - - *(.bss) - *(COMMON) - - . = ALIGN(4); - /* This is used by the startup in order to initialize the .bss secion */ - _ebss = . ; - } >RAM - - PROVIDE ( end = _ebss ); - PROVIDE ( _end = _ebss ); -} - -PROVIDE( _heap = _ebss ); -PROVIDE ( _eheap = ALIGN(ORIGIN(RAM) + LENGTH(RAM) - 8 ,8) ); - DELETED firmware/board/lpc17xx_boot/src/main.c Index: firmware/board/lpc17xx_boot/src/main.c ================================================================== --- firmware/board/lpc17xx_boot/src/main.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * - */ -#include -#include -#include -#include -#include -#include -#include "sdram.h" -#include "version.h" -#include "mpu.h" -#include "dport.h" -#include "dport_hw.h" - -static void bootjump(uint32 address); -static void start_main(); -static void _set_irqp(); - -extern uint32 * _vect_start; -extern uint32 * _vect_size; - -//const struct gpio_t testpin = { -// LPC_GPIO3, (1 << 30) -//}; - -/* - * - */ -int main(void) -{ - int skipflash; - - gpio_init(); - stimer_init(); /* NOTE used by dport, move code to dport itself */ - dport_init(); - - _set_irqp(); - - uart_setup(DEBUG_UART, UART_BAUD_115200, NULL); - -// rtcmem_get(); - - dprint("nsn", "*********************************"); - dprint("sn", "* "MODULE_NAME); - dprint("sn", "* v"VERSION_STRING", "__DATE__" "__TIME__); - dprint("sn", "*********************************"); - - dprint("g4d< MHz>n", 3, CLK_CCLK / 1000 / 1000); - dprint("g4d< MHz>n", 3, CLK_PCLK / 1000 / 1000); - dprint("g4d< MHz>n", 3, CLK_EMC / 1000 / 1000); - - mpu_init(); - sdram_init(); - - if (!sdram_test(SDRAM_TEST_SHORT)) - while (1); - -// if (!sdram_test(gpio_read(&testpin) ? SDRAM_TEST_SHORT : SDRAM_TEST_FULL)) -// while (1); - -#if 1 - /* - * Following code is used for loading main program by dport to FLASH or SDRAM. - * If RTC general purpose register contains magic number, skip load of main program from flash (if program in SDRAM). - * "bkpt" instruction is used for entry to dport handler. - */ - skipflash = 0; - dprint("s4xn", "MAGIC ", LPC_RTC->GPREG0); - - if (LPC_RTC->GPREG0 == 0x4444BEEF || LPC_RTC->GPREG0 == 0x4444DEAD) - { - dprint("n", 0); - asm volatile ( - "bkpt #0xAB \n" - "nop \n" - "cpsid i \n" - "dsb \n" - "isb \n" - ); - if (LPC_RTC->GPREG0 == 0x4444DEAD) - skipflash = 1; - /* NOTE spoil value to prevent entry to handler each time. */ - LPC_RTC->GPREG0 = 0x00000000; - } -#endif - - /* check whether we should copy main program to SDRAM */ - if (LOAD_OFFSET >= SDRAM_BASE_ADDR && LOAD_OFFSET < (SDRAM_BASE_ADDR + SDRAM_SIZE)) - { - /* copy main program to SDRAM */ - if (!skipflash) - { - uint8 *rd; - uint8 *wr; - uint32 len; - uint16 crc, fcrc; - - len = *((uint32*)SIZE_OFFSET); - crc = *((uint16*)CRC_OFFSET); - - dprint("4xn", len); - - /* sanity check */ - if (len > SDRAM_SIZE) - { - dprint("sn", ERR_PREFIX "size too long"); - for (;;); /* NOTE loop */ - } - - rd = (uint8*)IMAGE_OFFSET; - wr = (uint8*)LOAD_OFFSET; - - /* check CRC */ - crc16ccitt_init(&fcrc); - crc16ccitt_update(&fcrc, rd, len); - dprint("2xn", crc); - dprint("2xn", fcrc); - if (fcrc != crc) - { - dprint("sn", ERR_PREFIX "checksum mismatch"); - for (;;); /* NOTE loop */ - } - - while (len--) - *wr++ = *rd++; - asm volatile ( - "dsb \n" - "isb \n" - ); - } - } - - /* - * Copy vector table of main program from LOAD_OFFSET to SRAM. - * - * NOTE If LOAD_OFFSET is in flash no neccessary to copy, but - * this must be performed if LOAD_OFFSET is in SDRAM. - */ - { - uint32 len; - uint8* rd; - uint8* wr; - - len = (uint32)&_vect_size; - rd = (uint8*)LOAD_OFFSET; - wr = (uint8*)&_vect_start; - - while (len--) - *wr++ = *rd++; - asm volatile ( - "dsb \n" - "isb \n" - ); - } - - start_main(); - - /* UNREACHED */ - for (;;); - - return 0; -} - -/* - * - */ -static void start_main() -{ - dprint("4xn", LOAD_OFFSET); - - __disable_irq(); - /* - * NOTE - * SDRAM can not be used as vector table (?). - * - * In order of loading of main program to SDRAM by dport - * we should use vector table from SRAM. - */ - SCB->VTOR = ((uint32)&_vect_start); - /* NOTE irq stay disabled */ - - asm volatile ("dsb"); - asm volatile ("isb"); - bootjump(LOAD_OFFSET); -} - -/* - * - */ -static void __attribute__((naked)) bootjump(uint32 address) -{ - asm volatile ( - "ldr r1, [r0,#0] \n\t" - "msr msp, r1 \n\t" - "ldr PC,[r0,#4] \n\t" - ); -} - - -/* - * set priority groups, priority of interrupts - * - * NOTE interrupts already disabled in os_init() - */ -static void _set_irqp() -{ - /* - * group priorities 8 (bits [7:5]) - * subprioties 32 (bits [4:0]) - * - * LPC17xx subpriorities 4 (bits [4:3], bits [2:0] are not used) - * - * XXX check that implementation support this value */ - SCB->AIRCR = (4 << 8) | (0x05FA << 16); - - /* set PendSV lowest priority, SysTick highest priority (but not higher than debug port) */ - SCB->SHP[10] = 0xff; - SCB->SHP[11] = (1 << 5) | (0 << 3); -} - DELETED firmware/board/lpc17xx_boot/src/mpu.c Index: firmware/board/lpc17xx_boot/src/mpu.c ================================================================== --- firmware/board/lpc17xx_boot/src/mpu.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include "mpu.h" -#include "sdram.h" - -/* - * - */ -void mpu_init() -{ - /* setup access for SDRAM */ - - __disable_irq(); - - asm volatile("dmb\n"); - - /* disable MPU */ - MPU->CTRL = 0; - - /* set first region parameters */ - { - MPU->RNR = 0; - - /* normal, shareable, outer and inner write-back, write and read allocate */ -#define RASR_TEX 1 -#define RASR_C 1 -#define RASR_B 1 -#define RASR_S 1 -//#define RASR_TEX 0 -//#define RASR_C 0 -//#define RASR_B 0 -//#define RASR_S 0 - MPU->RBAR = SDRAM_BASE_ADDR & 0xffffffe0; - MPU->RASR = - (0 << 28) | /* instruction fetches enabled */ - (3 << 24) | /* full access by priveleged and unpriveleged software */ - (RASR_TEX << 19) | - (RASR_S << 18) | - (RASR_C << 17) | - (RASR_B << 16) | - ((25 - 1) << 1) | /* XXX 32 Mb */ - (1 << 0); /* enable region */ - } - - /* - * enable MPU, - * enable use of default memory map, - * disable MPU during hard fault - */ - MPU->CTRL = (1 << 0) | (0 << 1) | (1 << 2); - - asm volatile( - "dsb\n" - "isb\n" - ); - - __enable_irq(); -} - DELETED firmware/board/lpc17xx_boot/src/mpu.h Index: firmware/board/lpc17xx_boot/src/mpu.h ================================================================== --- firmware/board/lpc17xx_boot/src/mpu.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef MPU_H -#define MPU_H - -void mpu_init(); - -#endif - DELETED firmware/board/lpc17xx_boot/src/sdram.c Index: firmware/board/lpc17xx_boot/src/sdram.c ================================================================== --- firmware/board/lpc17xx_boot/src/sdram.c +++ /dev/null @@ -1,619 +0,0 @@ -#include -#include -#include -#include -#include -#include "sdram.h" - -/* NOTE (?) SDRAM controller work on frequency <= 80 MHZ */ - -#define CLK_EMC_MHZ (CLK_EMC / 1000000) - -#define tCLK_ns ((double)1000000000.0 / CLK_EMC) // CCLK period in ns -#define P2C(ns) ((uint32_t)( (double)(ns) / tCLK_ns )) // convert ns to CCLKs - -//#define ROW_BANK_COLUMN_MAP -#ifndef ROW_BANK_COLUMN_MAP - #define BANK_ROW_COLUMN_MAP -#endif - -#if 0 - /* - * SDRAM Chip: MT48LC16M16A2P-75 - */ - #define SDRAM_RAS_LATENCY 3 - #define SDRAM_CAS_LATENCY 3 - - /* 8192 cycles thru 64 ms ~ 7812 ns */ - #define SDRAM_ROWS 8192 - #define SDRAM_REFRESH_PERIOD 64 /* ms */ - - #define SDRAM_REFRESH (1000000 * SDRAM_REFRESH_PERIOD / SDRAM_ROWS) /* ns */ - #define SDRAM_TRP 20 /* ns */ - #define SDRAM_TRAS 45 /* ns */ - #define SDRAM_TAPR SDRAM_TRP /* NOTE not tAPR value, using tRP value */ - #define SDRAM_TDAL 5 /* CLK */ - #define SDRAM_TWR 2 /* tWR, tDPL, tRWL or tRDL: CLK */ - #define SDRAM_TRC 66 /* ns */ - #define SDRAM_TRFC 66 /* ns */ - #define SDRAM_TXSR 75 /* ns */ - #define SDRAM_TRRD 15 /* ns */ - #define SDRAM_TMRD 3 - -#ifdef ROW_BANK_COLUMN_MAP - #define DYNAMIC_CONFIG0 ((0 << 14) | (0 << 12) | (0x03 << 9) | (0x01 << 7)) -#else - #define DYNAMIC_CONFIG0 ((0 << 14) | (1 << 12) | (0x03 << 9) | (0x01 << 7)) -#endif - -#define SDRAM_COLUMN_BITS 9 -#define SDRAM_ROW_BITS 13 -#define SDRAM_BANK_BITS 2 -#define SDRAM_DATA_BITS 16 - -#endif /* 0/1 */ - -#if 0 - /* - * SDRAM Chip: H57V256GTR-60C - */ - #define SDRAM_RAS_LATENCY 3 - #define SDRAM_CAS_LATENCY 3 - - /* 8192 cycles thru 64 ms ~ 7812 ns */ - #define SDRAM_ROWS 8192 - //#define SDRAM_REFRESH_PERIOD 64 /* ms */ - #define SDRAM_REFRESH_PERIOD 16 /* ms */ - - #define SDRAM_REFRESH (1000000 * SDRAM_REFRESH_PERIOD / SDRAM_ROWS) /* ns */ - #define SDRAM_TRP 20 /* precharge command period, ns */ - #define SDRAM_TRAS 42 /* ns */ - #define SDRAM_TAPR SDRAM_TRP /* NOTE tRP value, last-data-out to active command time, ns */ - #define SDRAM_TDAL 2 /* CLK */ - #define SDRAM_TWR 2 /* tWR, tDPL, tRWL or tRDL, clocks */ - #define SDRAM_TRC 63 /* ns */ - #define SDRAM_TRFC 63 /* auto-refresh to active command, ns */ - #define SDRAM_TXSR 63 /* exit self refresh to active command, ns*/ - #define SDRAM_TSREX 15 /* self-refresh exit time, ns */ - #define SDRAM_TRRD 15 /* , ns */ - #define SDRAM_TMRD 3 /* , clocks */ - -#ifdef ROW_BANK_COLUMN_MAP - #define DYNAMIC_CONFIG0 ((0 << 14) | (0 << 12) | (0x03 << 9) | (0x01 << 7)) -#else - #define DYNAMIC_CONFIG0 ((0 << 14) | (1 << 12) | (0x03 << 9) | (0x01 << 7)) -#endif - -#define SDRAM_COLUMN_BITS 9 -#define SDRAM_ROW_BITS 13 -#define SDRAM_BANK_BITS 2 -#define SDRAM_DATA_BITS 16 - -#endif /* 0/1 */ - - -#if 0 - /* - * SDRAM Chip: K4S561632J - */ - #define SDRAM_RAS_LATENCY 3 - #define SDRAM_CAS_LATENCY 3 - - /* 8192 cycles thru 64 ms ~ 7812 ns */ - #define SDRAM_ROWS 8192 - #define SDRAM_REFRESH_PERIOD 64 /* ms */ - //#define SDRAM_REFRESH_PERIOD 16 /* ms */ - - #define SDRAM_REFRESH (1000000 * SDRAM_REFRESH_PERIOD / SDRAM_ROWS) /* ns */ - #define SDRAM_TRP 20 /* precharge command period, ns */ - #define SDRAM_TRAS 45 /* ns */ - #define SDRAM_TAPR SDRAM_TRP /* NOTE tRP value, last-data-out to active command time, ns */ - #define SDRAM_TDAL 2 /* CLK */ - #define SDRAM_TWR 2 /* tWR, tDPL, tRWL or tRDL, clocks */ - #define SDRAM_TRC 65 /* ns */ - #define SDRAM_TRFC 65 /* auto-refresh to active command, ns */ - #define SDRAM_TXSR 75 /* exit self refresh to active command, ns*/ - #define SDRAM_TSREX 15 /* self-refresh exit time, ns */ - #define SDRAM_TRRD 15 /* , ns */ - #define SDRAM_TMRD 3 /* , clocks */ - -#ifdef ROW_BANK_COLUMN_MAP - #define DYNAMIC_CONFIG0 ((0 << 14) | (0 << 12) | (0x03 << 9) | (0x01 << 7)) -#else - #define DYNAMIC_CONFIG0 ((0 << 14) | (1 << 12) | (0x03 << 9) | (0x01 << 7)) -#endif - -#define SDRAM_COLUMN_BITS 9 -#define SDRAM_ROW_BITS 13 -#define SDRAM_BANK_BITS 2 -#define SDRAM_DATA_BITS 16 - -#endif /* 0/1 */ - -#if 1 - /* - * SDRAM Chip: EM638165TS-6G - */ - #define SDRAM_RAS_LATENCY 3 - #define SDRAM_CAS_LATENCY 3 - - /* 8192 cycles thru 64 ms ~ 7812 ns */ - #define SDRAM_ROWS 8192 - #define SDRAM_REFRESH_PERIOD 64 /* ms */ - //#define SDRAM_REFRESH_PERIOD 16 /* ms */ - - #define SDRAM_REFRESH (1000000 * SDRAM_REFRESH_PERIOD / SDRAM_ROWS) /* ns */ - #define SDRAM_TRP 20 /* precharge command period, ns */ - #define SDRAM_TRAS 45 /* ns */ - #define SDRAM_TAPR SDRAM_TRP /* NOTE tRP value, last-data-out to active command time, ns */ - #define SDRAM_TDAL 2 /* CLK */ - #define SDRAM_TWR 2 /* tWR, tDPL, tRWL or tRDL, clocks */ - #define SDRAM_TRC 65 /* ns */ - #define SDRAM_TRFC 65 /* auto-refresh to active command, ns */ - #define SDRAM_TXSR 75 /* exit self refresh to active command, ns*/ - #define SDRAM_TSREX 15 /* self-refresh exit time, ns */ - #define SDRAM_TRRD 15 /* , ns */ - #define SDRAM_TMRD 3 /* , clocks */ - -#ifdef ROW_BANK_COLUMN_MAP - #define DYNAMIC_CONFIG0 ((0 << 14) | (0 << 12) | (0x01 << 9) | (0x01 << 7)) -#else - #define DYNAMIC_CONFIG0 ((0 << 14) | (1 << 12) | (0x01 << 9) | (0x01 << 7)) -#endif - -#define SDRAM_COLUMN_BITS 8 -#define SDRAM_ROW_BITS 12 -#define SDRAM_BANK_BITS 2 -#define SDRAM_DATA_BITS 16 - -#endif /* 0/1 */ - - -static void wait_us(uint32 us); - -/* - * setup EMC to drive SDRAM - */ -void __attribute__((optimize("O0"))) sdram_init() -{ - volatile unsigned long dummy; - - LPC_IOCON->P2_16 = 0x229; /* #CAS */ - LPC_IOCON->P2_17 = 0x229; /* #RAS */ - LPC_IOCON->P2_18 = 0x229; /* CLK0 */ -#if 0 - LPC_IOCON->P2_19 = 0x229; /* CLK1 */ -#endif - LPC_IOCON->P2_20 = 0x229; /* #DYCS0 */ -#if 0 - LPC_IOCON->P2_21 = 0x229; /* #DYCS1 */ - LPC_IOCON->P2_22 = 0x229; /* #DYCS2 */ - LPC_IOCON->P2_23 = 0x229; /* #DYCS3 */ -#endif - LPC_IOCON->P2_24 = 0x229; /* CKE0 */ -#if 0 - LPC_IOCON->P2_25 = 0x229; /* CKE1 */ - LPC_IOCON->P2_26 = 0x229; /* CKE2 */ - LPC_IOCON->P2_27 = 0x229; /* CKE3 */ -#endif - LPC_IOCON->P2_28 = 0x229; /* #DQM0 */ - LPC_IOCON->P2_29 = 0x229; /* #DQM1 */ -#if 0 - LPC_IOCON->P2_30 = 0x229; /* #DQM2 */ - LPC_IOCON->P2_31 = 0x229; /* #DQM3 */ -#endif - LPC_IOCON->P3_0 = 0x229; /* D0 */ - LPC_IOCON->P3_1 = 0x229; /* D1 */ - LPC_IOCON->P3_2 = 0x229; /* D2 */ - LPC_IOCON->P3_3 = 0x229; /* D3 */ - LPC_IOCON->P3_4 = 0x229; /* D4 */ - LPC_IOCON->P3_5 = 0x229; /* D5 */ - LPC_IOCON->P3_6 = 0x229; /* D6 */ - LPC_IOCON->P3_7 = 0x229; /* D7 */ - LPC_IOCON->P3_8 = 0x229; /* D8 */ - LPC_IOCON->P3_9 = 0x229; /* D9 */ - LPC_IOCON->P3_10 = 0x229; /* D10 */ - LPC_IOCON->P3_11 = 0x229; /* D11 */ - LPC_IOCON->P3_12 = 0x229; /* D12 */ - LPC_IOCON->P3_13 = 0x229; /* D13 */ - LPC_IOCON->P3_14 = 0x229; /* D14 */ - LPC_IOCON->P3_15 = 0x229; /* D15 */ -#if 0 - LPC_IOCON->P3_16 = 0x229; /* D16 */ - LPC_IOCON->P3_17 = 0x229; /* D17 */ - LPC_IOCON->P3_18 = 0x229; /* D18 */ - LPC_IOCON->P3_19 = 0x229; /* D19 */ - LPC_IOCON->P3_20 = 0x229; /* D20 */ - LPC_IOCON->P3_21 = 0x229; /* D21 */ - LPC_IOCON->P3_22 = 0x229; /* D22 */ - LPC_IOCON->P3_23 = 0x229; /* D23 */ - LPC_IOCON->P3_24 = 0x229; /* D24 */ - LPC_IOCON->P3_25 = 0x229; /* D25 */ - LPC_IOCON->P3_26 = 0x229; /* D26 */ - LPC_IOCON->P3_27 = 0x229; /* D27 */ - LPC_IOCON->P3_28 = 0x229; /* D28 */ - LPC_IOCON->P3_29 = 0x229; /* D29 */ - LPC_IOCON->P3_30 = 0x229; /* D30 */ - LPC_IOCON->P3_31 = 0x229; /* D31 */ -#endif - LPC_IOCON->P4_0 = 0x229; /* A0 */ - LPC_IOCON->P4_1 = 0x229; /* A1 */ - LPC_IOCON->P4_2 = 0x229; /* A2 */ - LPC_IOCON->P4_3 = 0x229; /* A3 */ - LPC_IOCON->P4_4 = 0x229; /* A4 */ - LPC_IOCON->P4_5 = 0x229; /* A5 */ - LPC_IOCON->P4_6 = 0x229; /* A6 */ - LPC_IOCON->P4_7 = 0x229; /* A7 */ - LPC_IOCON->P4_8 = 0x229; /* A8 */ - LPC_IOCON->P4_9 = 0x229; /* A9 */ - LPC_IOCON->P4_10 = 0x229; /* A10 */ - LPC_IOCON->P4_11 = 0x229; /* A11 */ - LPC_IOCON->P4_12 = 0x229; /* A12 */ - LPC_IOCON->P4_13 = 0x229; /* A13 */ - LPC_IOCON->P4_14 = 0x229; /* A14 */ -#if 0 - LPC_IOCON->P4_15 = 0x229; /* A15 */ - LPC_IOCON->P4_16 = 0x229; /* A16 */ - LPC_IOCON->P4_17 = 0x229; /* A17 */ - LPC_IOCON->P4_18 = 0x229; /* A18 */ - LPC_IOCON->P4_19 = 0x229; /* A19 */ - LPC_IOCON->P4_20 = 0x229; /* A20 */ - LPC_IOCON->P4_21 = 0x229; /* A21 */ - LPC_IOCON->P4_22 = 0x229; /* A22 */ - LPC_IOCON->P4_23 = 0x229; /* A23 */ -#endif - LPC_IOCON->P4_25 = 0x229; /* #WE */ - - /* Power up SDRAM controller */ - LPC_SC->PCONP |= PCONP_PCEMC; - - /* - * Set dynamic memory read strategy. - * - * - * http://www.lpcware.com/content/forum/lpc177x-emc-and-sdram-conundrum - * - * 1. EMC clock <= 60 MHz: clock delayed read strategy. - * CMDDLY = 0, CLKOUT0DLY = 31, FBCLKDLY = 16. Fastest option. - * - * 2. EMC clock <= 80 MHz: command delayed read strategy + 0. - * CLKOUT0DLY = 0, FBCLKDLY = 20. CMDDLY in relation to EMC clock! - * CMDDLY = 31 for EMCCLK <= 48 MHz, - * CMDDLY = 27 for EMCCLK =60 MHz, - * CMDDLY = 16 for EMCCLK =72 MHz. - * - * 3. EMC clock >= 80 MHz: command delayed read strategy + 1. - * CLKOUT0DLY = 0, FBCLKDLY = 20. CMDDLY = 2. (Not valid area, but working) - */ - { - uint32 delay; - -#define SDRAM_READ_CONFIG_CLKOUT_DELAY 0x00 /* Clock out delayed strategy, using CLKOUT (command not delayed, clock out delayed) */ -#define SDRAM_READ_CONFIG_COMMAND_DELAY 0x01 /* Command delayed strategy, using EMCCLKDELAY (command delayed, clock out) not delayed) */ -#define SDRAM_READ_CONFIG_COMMAND_DELAY1 0x02 /* Command delayed strategy plus one clock cycle, using EMCCLKDELAY (command delayed, clock out) not delayed) */ -#define SDRAM_READ_CONFIG_COMMAND_DELAY2 0x03 /* Command delayed strategy plus two clock cycles, using EMCCLKDELAY (command delayed, clock out) not delayed) */ - -#if (CLK_EMC_MHZ <= 60) - #define SDRAM_READ_CONFIG SDRAM_READ_CONFIG_CLKOUT_DELAY - - delay = ( 0 << 0) | /* 0 : 4, CMDDLY */ - (16 << 8) | /* 8 : 12, FBCLKDLY */ - (31 << 16) | /* 16 : 20, CLKOUT0DLY */ - ( 0 << 24); /* 24 : 28, CLKOUT1DLY */ -#elif (CLK_EMC_MHZ <= 80) - #define SDRAM_READ_CONFIG SDRAM_READ_CONFIG_COMMAND_DELAY - - delay = (16 << 0) | /* 0 : 4, CMDDLY */ - (20 << 8) | /* 8 : 12, FBCLKDLY */ - ( 0 << 16) | /* 16 : 20, CLKOUT0DLY */ - ( 0 << 24); /* 24 : 28, CLKOUT1DLY */ -#elif (CLK_EMC_MHZ > 80) - #define SDRAM_READ_CONFIG SDRAM_READ_CONFIG_COMMAND_DELAY1 - - delay = ( 2 << 0) | /* 0 : 4, CMDDLY */ - (20 << 8) | /* 8 : 12, FBCLKDLY */ - ( 0 << 16) | /* 16 : 20, CLKOUT0DLY */ - ( 0 << 24); /* 24 : 28, CLKOUT1DLY */ -#else - #error Unknown EMC clock frequency -#endif - - LPC_SC->EMCDLYCTL = delay; - } - - LPC_EMC->Control = 1; - - LPC_EMC->DynamicReadConfig = SDRAM_READ_CONFIG; - LPC_EMC->DynamicRasCas0 = (SDRAM_RAS_LATENCY << 0) | (SDRAM_CAS_LATENCY << 8); - LPC_EMC->DynamicRP = P2C(SDRAM_TRP); - LPC_EMC->DynamicRAS = P2C(SDRAM_TRAS); - LPC_EMC->DynamicSREX = P2C(SDRAM_TXSR); - LPC_EMC->DynamicAPR = P2C(SDRAM_TAPR); - LPC_EMC->DynamicDAL = SDRAM_TDAL + P2C(SDRAM_TRP) + 1; - LPC_EMC->DynamicWR = SDRAM_TWR - 1; - LPC_EMC->DynamicRC = P2C(SDRAM_TRC); - LPC_EMC->DynamicRFC = P2C(SDRAM_TRFC); - LPC_EMC->DynamicXSR = P2C(SDRAM_TXSR); - LPC_EMC->DynamicRRD = P2C(SDRAM_TRRD); - LPC_EMC->DynamicMRD = SDRAM_TMRD - 1; - - /* 13 row, 9 - col */ - LPC_EMC->DynamicConfig0 = DYNAMIC_CONFIG0; - - /* - * JEDEC General SDRAM Initialization Sequence delay to allow - * power and clocks to stabilize ~100 us - * - * NOP - */ - LPC_EMC->DynamicControl = 0x0183; - wait_us(200); - /* PALL */ - LPC_EMC->DynamicControl = 0x0103; - LPC_EMC->DynamicRefresh = 1; - wait_us(50); - LPC_EMC->DynamicRefresh = (P2C(SDRAM_REFRESH)) >> 4; - /* COMM */ - LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */ - - -#define SDRAM_SEQUENTIAL_BURST_LENGTH_4 2 -#define SDRAM_SEQUENTIAL_BURST_LENGTH_8 3 - -#define SDRAM_BURST_LENGTH SDRAM_SEQUENTIAL_BURST_LENGTH_8 - -#define SDRAM_MODE_REG_VALUE ((SDRAM_CAS_LATENCY << 4) | SDRAM_BURST_LENGTH) - -#ifdef ROW_BANK_COLUMN_MAP - dummy = *((volatile uint32_t *)(SDRAM_BASE_ADDR | - (SDRAM_MODE_REG_VALUE << (SDRAM_COLUMN_BITS + SDRAM_BANK_BITS + SDRAM_DATA_BITS / 16)))); -#else - dummy = *((volatile uint32_t *)(SDRAM_BASE_ADDR | - (SDRAM_MODE_REG_VALUE << (SDRAM_COLUMN_BITS + SDRAM_DATA_BITS / 16)))); -#endif - - (void)dummy; /* make compiller happy */ - - /* NORM */ - LPC_EMC->DynamicControl = 0x0000; - - /* enable buffer */ - LPC_EMC->DynamicConfig0 |= (1 << 19); - wait_us(200); - - /* - * print result timings - */ - { - uint32 val; - -#define SCALE 10 -#define CLK2NS(clk) (SCALE * 1000 / (CLK_EMC / 1000000) * (clk)) - dprint("sn", "SDRAM timing: "); - dprint("< CLK_EMC, MHz >4dn", CLK_EMC / 1000000); - dprint("< CLK_EMC, ns >4d*.4dn", CLK2NS(1) / SCALE, CLK2NS(1) % SCALE); - - val = (LPC_EMC->DynamicRefresh & 0x3ff) << 4; - dprint("< Refresh, ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - dprint("< RAS latency, clk >4dn", (LPC_EMC->DynamicRasCas0 >> 0) & 0x03); - dprint("< CAS latency, clk >4dn", (LPC_EMC->DynamicRasCas0 >> 8) & 0x03); - - val = (LPC_EMC->DynamicRP & 0x0f) + 1; - dprint("< tRP (precharge command period), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicRAS & 0x0f) + 1; - dprint("< tRAS (active to precharge command period), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicSREX & 0x0f) + 1; - dprint("< tSREX (self-refresh exit time), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicAPR & 0x0f) + 1; - dprint("< tAPR (last-data-out to active command time), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicDAL & 0x0f); - dprint("< tDAL (data-in to active command time), clk >4dn", val); - val = (LPC_EMC->DynamicWR & 0x0f) + 1; - dprint("< tWR (write recovery time), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicRC & 0x0f) + 1; - dprint("< tRC (active to active command period), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicRFC & 0x1f) + 1; - dprint("< tRFC (auto-refresh period), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicXSR & 0x1f) + 1; - dprint("< tXSR (exit self-refresh to active command time), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicRRD & 0x0f) + 1; - dprint("< tRRD (active bank A to active bank B latency), ns >4d*.4dn", CLK2NS(val) / SCALE, CLK2NS(val) % SCALE); - val = (LPC_EMC->DynamicMRD & 0x0f) + 1; - dprint("< tMRD (load mode register to active command time), clk >4dn", val); - } -} - -/* - * RETURN - * 1 on success, 0 on error - */ -int __attribute__((optimize("O0"))) sdram_test(int type) -{ - int ntest; - uint32 tm; - volatile uint8 *p8; - volatile uint16 *p16; - volatile uint32 *p32; - uint16 val; - uint32 bank, row, column, n, i; - uint32 mask; - - for (ntest = 0; ntest < 2; ntest++) - { - dprint("1d*:n", ntest); - -#ifndef ROW_BANK_COLUMN_MAP - if (type == SDRAM_TEST_SHORT) - { - /* - * Test each line of address (each row, each bank) - */ - dprint("ts", "short test... "); - stimer_settime_us(&tm); - - p16 = (volatile uint16*)SDRAM_BASE_ADDR; - for (bank = 0; bank < (1 << SDRAM_BANK_BITS); bank++) - { - for (row = 0; row < (1 << SDRAM_ROW_BITS); row++) - { - *p16 = row | (bank << 14); - p16 += (1 << SDRAM_COLUMN_BITS); - } - } - - p16 = (volatile uint16*)SDRAM_BASE_ADDR; - for (bank = 0; bank < (1 << SDRAM_BANK_BITS); bank++) - { - for (row = 0; row < (1 << SDRAM_ROW_BITS); row++) - { - if (*p16 != (row | (bank << 14))) - { - dprint("sn", "FAILED"); - dprint("tt4xn", row); - dprint("tt4xn", bank); - return 0; - } - p16 += (1 << SDRAM_COLUMN_BITS); - } - } - - tm = stimer_deltatime_us(tm); - dprint("4d*.4d< ms)>n", tm / 1000, tm % 1000); - } else if (type == SDRAM_TEST_FULL) { - /* - * Clean-up memory - */ - dprint("ts", "clean-up memory "); - stimer_settime_us(&tm); - p32 = (volatile uint32*)SDRAM_BASE_ADDR; - for (i = 0; i < (SDRAM_SIZE / 4); i++) - { - *p32 = 0; - if (*p32) - { - dprint("sn", "FAILED"); - dprint("tt4xn", p32); - } - p32++; - } - tm = stimer_deltatime_us(tm); - dprint("4d*.4d< ms)>n", tm / 1000, tm % 1000); - - dprint("ts", "running bit "); - stimer_settime_us(&tm); - p16 = (volatile uint16*)SDRAM_BASE_ADDR; - for (mask = 1; mask < 0x10000; mask <<= 1) - *p16++ = mask & 0xffff; - - p16 = (volatile uint16*)SDRAM_BASE_ADDR; - for (mask = 1; mask < 0x10000; mask <<= 1) - { - if (*p16++ != mask) - { - dprint("sn", "FAILED"); - dprint("tt4xn", mask); - return 0; - } - } - - tm = stimer_deltatime_us(tm); - dprint("4d*.4d< ms)>n", tm / 1000, tm % 1000); - - /* - * Sequential write all memory locations by 16-bit - */ - dprint("ts", "16-bit write "); - stimer_settime_us(&tm); - n = 0; - p16 = (volatile uint16*)SDRAM_BASE_ADDR; - for (bank = 0; bank < (1 << SDRAM_BANK_BITS); bank++) - { - for (row = 0; row < (1 << SDRAM_ROW_BITS); row++) - { - for (column = 0; column < (1 << SDRAM_COLUMN_BITS); column++) - { - *p16 = n & 0xffff; - p16++; - n++; - } - n++; - } - } - n = 0; - - p16 = (volatile uint16*)SDRAM_BASE_ADDR; - for (bank = 0; bank < (1 << SDRAM_BANK_BITS); bank++) - { - for (row = 0; row < (1 << SDRAM_ROW_BITS); row++) - { - for (column = 0; column < (1 << SDRAM_COLUMN_BITS); column++) - { - val = *p16; - if (val != (n & 0xffff)) - { - dprint("sn", "FAILED"); - dprint("tt4xn", p16); - dprint("tt4xn", column); - dprint("tt4xn", row); - dprint("tt4xn", bank); - dprint("tt2xn", n); - dprint("tt2xn", val); - return 0; - } - p16++; - n++; - } - n++; - } - } - tm = stimer_deltatime_us(tm); - dprint("4d*.4d< ms)>n", tm / 1000, tm % 1000); - - /* - * Sequential write all memory locations by 8-bit - */ - dprint("ts", "8-bit write "); - stimer_settime_us(&tm); - n = 0; - p8 = (volatile uint8*)SDRAM_BASE_ADDR; -#define SDRAM_8BIT_PATTERN ((i ^ ( (i / 256) % 2 ? 0xff : 0)) & 0xff) - for (i = 0; i < SDRAM_SIZE; i++) - *p8++ = SDRAM_8BIT_PATTERN; - - p8 = (volatile uint8*)SDRAM_BASE_ADDR; - for (i = 0; i < SDRAM_SIZE; i++) - { - if (*p8 != SDRAM_8BIT_PATTERN) - { - dprint("sn", "FAILED"); - dprint("tt4xn", p8); - dprint("tt1xn", SDRAM_8BIT_PATTERN); - return 0; - } - p8++; - } - tm = stimer_deltatime_us(tm); - dprint("4d*.4d< ms)>n", tm / 1000, tm % 1000); - } -#endif - } - - return 1; -} - - -/* - * delay approximately for N microseconds interval - */ -void __attribute__((optimize("O0"))) wait_us(uint32 us) -{ - uint32 nclk; - - nclk = CLK_CCLK / 1000000 * us; - - while (nclk--) - { - asm volatile("nop"); - } -} - DELETED firmware/board/lpc17xx_boot/src/sdram.h Index: firmware/board/lpc17xx_boot/src/sdram.h ================================================================== --- firmware/board/lpc17xx_boot/src/sdram.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _SDRAM_H_ -#define _SDRAM_H_ - -#include - -#define SDRAM_BASE_ADDR_CHIP0 0xA0000000 -#define SDRAM_BASE_ADDR_CHIP1 0xB0000000 -#define SDRAM_BASE_ADDR SDRAM_BASE_ADDR_CHIP0 - -#define SDRAM_SIZE (0x2000000 / 4) - -void sdram_init(); -#define SDRAM_TEST_SHORT 0 -#define SDRAM_TEST_FULL 1 -int sdram_test(int type); - -#endif - DELETED firmware/board/lpc17xx_boot/src/startup.c Index: firmware/board/lpc17xx_boot/src/startup.c ================================================================== --- firmware/board/lpc17xx_boot/src/startup.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include -#include - -#define CLKSRCSEL_INTRC (0x00) -#define CLKSRCSEL_MAINOSC (0x01) - -#define CCLKSEL_CCLKSEL_SYSCLK (0 << 8) -#define CCLKSEL_CCLKSEL_PLL (1 << 8) -#define CCLKSEL_CCLKDIV(val) val - -#define PCLKSEL_PCLKDIV(val) val - -#define EMCCLKSEL_EMCDIV_CPU (0 << 0) -#define EMCCLKSEL_EMCDIV_DIV2 (1 << 0) - -#define SCS_OSCEN (1 << 5) -#define SCS_OSCSTAT (1 << 6) - -#define PBOOST_BOOST (1 << 1) - -extern unsigned long _sidata; /* start address for the initialization values of the .data section. defined in linker script */ -extern unsigned long _sdata; /* start address for the .data section. defined in linker script */ -extern unsigned long _edata; /* end address for the .data section. defined in linker script */ - -extern unsigned long _sbss; /* start address for the .bss section. defined in linker script */ -extern unsigned long _ebss; /* end address for the .bss section. defined in linker script */ - -int main(void); - -static void lowlevel_init(); -static void pllfeed(); - -/* - * - */ -void Reset_Handler() -{ - unsigned long *pulSrc, *pulDest; - - /* copy the data segment initializers from flash to SRAM */ - pulSrc = &_sidata; - for(pulDest = &_sdata; pulDest < &_edata; ) - { - *(pulDest++) = *(pulSrc++); - } - - /* zero fill the bss segment */ - for(pulDest = &_sbss; pulDest < &_ebss; ) - { - *(pulDest++) = 0; - } - - /* basic configuration */ - lowlevel_init(); - /* call the application's entry point */ - main(); - - /* NOTREACHED */ - for(;;); -} - -/* - * basic configuraiton - */ -static void lowlevel_init() -{ - /* switch clock to sysclk */ - LPC_SC->CCLKSEL = CCLKSEL_CCLKSEL_SYSCLK | CCLKSEL_CCLKDIV(1); - /* turn-off USB clock */ - LPC_SC->USBCLKSEL = 0; - - /* turn-off PLL */ - LPC_SC->PLL0CON = 0; - pllfeed(); - - /* setup flash access time for 100 MHz to 120 MHz CPU clock (with power boost on) */ - LPC_SC->FLASHCFG |= 3 << 12; - - /* enable/disable power boost */ -#if (CLK_CCLK > 100000000) - LPC_SC->PBOOST = PBOOST_BOOST; -#else - LPC_SC->PBOOST &= ~PBOOST_BOOST; -#endif - - /* select frequency range of main oscillator from 1 MHz to 20 Mhz */ - LPC_SC->SCS = 0; - LPC_SC->SCS = SCS_OSCEN; - /* wait for ready of main oscilator */ - while (!(LPC_SC->SCS & SCS_OSCSTAT)); - - /* select main oscillator as the PLL0 clock source */ - LPC_SC->CLKSRCSEL = CLKSRCSEL_MAINOSC; - /* - * setup divider and multiplier - * - * 10 MHz < pll_in_clk < 25 MHz - * 156 MHz < Fcco < 320 MHz - * 9.75 MHz < pll_out_clk < 160 MHz - * - * - * M 1..32 - * P 1, 2, 4, 8 - * - * - * Fcco = pll_in_clk * M * 2 * P - * pll_out_clk = Fcco / (2 * P) - * - * M = pll_out_clk / pll_in_clk - * - * - */ - LPC_SC->PLL0CFG = (CLK_M - 1) | ((CLK_P - 1) << 5); - pllfeed(); - /* enable PLL */ - LPC_SC->PLL0CON = PLLCON_PLLE; - pllfeed(); - /* wait for enable */ - while(!(LPC_SC->PLL0STAT & PLLSTAT_PLLE)); - - /* setup necessary clock dividers (CCLKSEL, PCLKSEL, EMCCLKSEL, USBCLKSEL) */ - LPC_SC->CCLKSEL = CCLKSEL_CCLKSEL_PLL | CCLKSEL_CCLKDIV(CLK_CCLKDIV); - LPC_SC->PCLKSEL = PCLKSEL_PCLKDIV(CLK_PCLKDIV); -#if CLK_EMCDIV == 2 - LPC_SC->EMCCLKSEL = EMCCLKSEL_EMCDIV_DIV2; -#else - LPC_SC->EMCCLKSEL = EMCCLKSEL_EMCDIV_CPU; -#endif - - /* wait for the PLL to lock */ - while(!(LPC_SC->PLL0STAT & PLLSTAT_PLOCK)); - - /* connect PLL (CCLKSEL, USBCLKSEL, ... ) */ - LPC_SC->CCLKSEL |= CCLKSEL_CCLKSEL_PLL; -} - -/* - * PLL feed sequence - */ -static void pllfeed() -{ - LPC_SC->PLL0FEED = 0xAA; - LPC_SC->PLL0FEED = 0x55; -} - DELETED firmware/board/lpc17xx_boot/src/startup.h Index: firmware/board/lpc17xx_boot/src/startup.h ================================================================== --- firmware/board/lpc17xx_boot/src/startup.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef STARTUP_H -#define STARTUP_H - -void Reset_Handler(); - - -#endif - DELETED firmware/board/lpc17xx_boot/src/version.h Index: firmware/board/lpc17xx_boot/src/version.h ================================================================== --- firmware/board/lpc17xx_boot/src/version.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of K14, the LCD controller. - * - * Copyright (C) 2014 Dmitry Kobylin - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#ifndef VERSION_H -#define VERSION_H - -#define MODULE_NAME "BOOT" - -#define MAJOR 0 -#define MINOR 1 -#define BUILD 1 - -#define QUOTEME_(x) #x -#define QUOTEME(x) QUOTEME_(x) - -#define VERSION_STRING QUOTEME(MAJOR.MINOR.BUILD) - - -#endif - -/* - * CHANGELOG - * - * 20130619 0.1.1 - * * initial version - */ - DELETED firmware/config.mk Index: firmware/config.mk ================================================================== --- firmware/config.mk +++ /dev/null @@ -1,14 +0,0 @@ -######################## - -# Build configuration -# -# NOTE before changing of variables in this file "make clean" required. -# Also "make depend" should be used after modification. -# -######################## - -export BOARD = lpc17xx - -# To build documentation set value of this variable to 1 -BUILD_DOC = 0 - DELETED firmware/custom.vim Index: firmware/custom.vim ================================================================== --- firmware/custom.vim +++ /dev/null @@ -1,2 +0,0 @@ -:set path=lib/misc/src,lib/lpc17xx,lib/mlpc17xx/src,lib/os/src,lib/os/src/port/ARMv7-M,board/lpc17xx/src,board/lpc17xx_boot/src - DELETED firmware/lib/lpc17xx/LPC177x_8x.h Index: firmware/lib/lpc17xx/LPC177x_8x.h ================================================================== --- firmware/lib/lpc17xx/LPC177x_8x.h +++ /dev/null @@ -1,1446 +0,0 @@ -/********************************************************************** -* $Id: LPC177x_8x.h 7485 2011-06-03 07:57:16Z sgg06786 $ LPC177x_8x.h 2011-06-02 -*//** -* @file LPC177x_8x.h -* @brief Cortex-M3 Core Peripheral Access Layer Header File for -* NXP LPC177x_8x Series. -* @version 1.0 -* @date 02. June. 2011 -* @author NXP MCU SW Application Team -* -* Copyright(C) 2011, NXP Semiconductor -* All rights reserved. -* -*********************************************************************** -* Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. -**********************************************************************/ - -#ifndef __LPC177x_8x_H__ -#define __LPC177x_8x_H__ - -/* - * ========================================================================== - * ---------- Interrupt Number Definition ----------------------------------- - * ========================================================================== - */ - -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** LPC177x_8x Specific Interrupt Numbers *******************************************************/ - WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ - TIMER0_IRQn = 1, /*!< Timer0 Interrupt */ - TIMER1_IRQn = 2, /*!< Timer1 Interrupt */ - TIMER2_IRQn = 3, /*!< Timer2 Interrupt */ - TIMER3_IRQn = 4, /*!< Timer3 Interrupt */ - UART0_IRQn = 5, /*!< UART0 Interrupt */ - UART1_IRQn = 6, /*!< UART1 Interrupt */ - UART2_IRQn = 7, /*!< UART2 Interrupt */ - UART3_IRQn = 8, /*!< UART3 Interrupt */ - PWM1_IRQn = 9, /*!< PWM1 Interrupt */ - I2C0_IRQn = 10, /*!< I2C0 Interrupt */ - I2C1_IRQn = 11, /*!< I2C1 Interrupt */ - I2C2_IRQn = 12, /*!< I2C2 Interrupt */ - Reserved0_IRQn = 13, /*!< Reserved */ - SSP0_IRQn = 14, /*!< SSP0 Interrupt */ - SSP1_IRQn = 15, /*!< SSP1 Interrupt */ - PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */ - RTC_IRQn = 17, /*!< Real Time Clock Interrupt */ - EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */ - EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */ - EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */ - EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */ - ADC_IRQn = 22, /*!< A/D Converter Interrupt */ - BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */ - USB_IRQn = 24, /*!< USB Interrupt */ - CAN_IRQn = 25, /*!< CAN Interrupt */ - DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */ - I2S_IRQn = 27, /*!< I2S Interrupt */ - ENET_IRQn = 28, /*!< Ethernet Interrupt */ - MCI_IRQn = 29, /*!< SD/MMC card I/F Interrupt */ - MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */ - QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */ - PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */ - USBActivity_IRQn = 33, /*!< USB Activity interrupt */ - CANActivity_IRQn = 34, /*!< CAN Activity interrupt */ - UART4_IRQn = 35, /*!< UART4 Interrupt */ - SSP2_IRQn = 36, /*!< SSP2 Interrupt */ - LCD_IRQn = 37, /*!< LCD Interrupt */ - GPIO_IRQn = 38, /*!< GPIO Interrupt */ - PWM0_IRQn = 39, /*!< PWM0 Interrupt */ - EEPROM_IRQn = 40, /*!< EEPROM Interrupt */ -} IRQn_Type; - - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/* Configuration of the Cortex-M3 Processor and Core Peripherals */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - - -#include "core_cm3.h" /* Cortex-M3 processor and core peripherals */ -//#include "system_LPC177x_8x.h" /* System Header */ - - -/******************************************************************************/ -/* Device Specific Peripheral registers structures */ -/******************************************************************************/ - -#if defined ( __CC_ARM ) -#pragma anon_unions -#endif - -/*------------- System Control (SC) ------------------------------------------*/ -typedef struct -{ - __IO uint32_t FLASHCFG; /*!< Offset: 0x000 (R/W) Flash Accelerator Configuration Register */ - uint32_t RESERVED0[31]; - __IO uint32_t PLL0CON; /*!< Offset: 0x080 (R/W) PLL0 Control Register */ - __IO uint32_t PLL0CFG; /*!< Offset: 0x084 (R/W) PLL0 Configuration Register */ - __I uint32_t PLL0STAT; /*!< Offset: 0x088 (R/ ) PLL0 Status Register */ - __O uint32_t PLL0FEED; /*!< Offset: 0x08C ( /W) PLL0 Feed Register */ - uint32_t RESERVED1[4]; - __IO uint32_t PLL1CON; /*!< Offset: 0x0A0 (R/W) PLL1 Control Register */ - __IO uint32_t PLL1CFG; /*!< Offset: 0x0A4 (R/W) PLL1 Configuration Register */ - __I uint32_t PLL1STAT; /*!< Offset: 0x0A8 (R/ ) PLL1 Status Register */ - __O uint32_t PLL1FEED; /*!< Offset: 0x0AC ( /W) PLL1 Feed Register */ - uint32_t RESERVED2[4]; - __IO uint32_t PCON; /*!< Offset: 0x0C0 (R/W) Power Control Register */ - __IO uint32_t PCONP; /*!< Offset: 0x0C4 (R/W) Power Control for Peripherals Register */ - uint32_t RESERVED3[14]; - __IO uint32_t EMCCLKSEL; /*!< Offset: 0x100 (R/W) External Memory Controller Clock Selection Register */ - __IO uint32_t CCLKSEL; /*!< Offset: 0x104 (R/W) CPU Clock Selection Register */ - __IO uint32_t USBCLKSEL; /*!< Offset: 0x108 (R/W) USB Clock Selection Register */ - __IO uint32_t CLKSRCSEL; /*!< Offset: 0x10C (R/W) Clock Source Select Register */ - __IO uint32_t CANSLEEPCLR; /*!< Offset: 0x110 (R/W) CAN Sleep Clear Register */ - __IO uint32_t CANWAKEFLAGS; /*!< Offset: 0x114 (R/W) CAN Wake-up Flags Register */ - uint32_t RESERVED4[10]; - __IO uint32_t EXTINT; /*!< Offset: 0x140 (R/W) External Interrupt Flag Register */ - uint32_t RESERVED5[1]; - __IO uint32_t EXTMODE; /*!< Offset: 0x148 (R/W) External Interrupt Mode Register */ - __IO uint32_t EXTPOLAR; /*!< Offset: 0x14C (R/W) External Interrupt Polarity Register */ - uint32_t RESERVED6[12]; - __IO uint32_t RSID; /*!< Offset: 0x180 (R/W) Reset Source Identification Register */ - uint32_t RESERVED7[7]; - __IO uint32_t SCS; /*!< Offset: 0x1A0 (R/W) System Controls and Status Register */ - __IO uint32_t IRCTRIM; /*!< Offset: 0x1A4 (R/W) Clock Dividers */ - __IO uint32_t PCLKSEL; /*!< Offset: 0x1A8 (R/W) Peripheral Clock Selection Register */ -// uint32_t RESERVED8[3]; - uint32_t RESERVED8[1]; - __IO uint32_t PBOOST; /*!< Offset: 0x1B0 (R/W) Power Boost Control Register */ - uint32_t RESERVED8_[1]; - __IO uint32_t LCD_CFG; /*!< Offset: 0x1B8 (R/W) LCD Configuration and clocking control Register */ - uint32_t RESERVED9[1]; - __IO uint32_t USBIntSt; /*!< Offset: 0x1C0 (R/W) USB Interrupt Status Register */ - __IO uint32_t DMAREQSEL; /*!< Offset: 0x1C4 (R/W) DMA Request Select Register */ - __IO uint32_t CLKOUTCFG; /*!< Offset: 0x1C8 (R/W) Clock Output Configuration Register */ - __IO uint32_t RSTCON0; /*!< Offset: 0x1CC (R/W) RESET Control0 Register */ - __IO uint32_t RSTCON1; /*!< Offset: 0x1D0 (R/W) RESET Control1 Register */ - uint32_t RESERVED10[2]; - __IO uint32_t EMCDLYCTL; /*!< Offset: 0x1DC (R/W) SDRAM programmable delays */ - __IO uint32_t EMCCAL; /*!< Offset: 0x1E0 (R/W) Calibration of programmable delays */ - } LPC_SC_TypeDef; - -/*------------- Pin Connect Block (PINCON) -----------------------------------*/ -typedef struct -{ - __IO uint32_t P0_0; /* 0x000 */ - __IO uint32_t P0_1; - __IO uint32_t P0_2; - __IO uint32_t P0_3; - __IO uint32_t P0_4; - __IO uint32_t P0_5; - __IO uint32_t P0_6; - __IO uint32_t P0_7; - - __IO uint32_t P0_8; /* 0x020 */ - __IO uint32_t P0_9; - __IO uint32_t P0_10; - __IO uint32_t P0_11; - __IO uint32_t P0_12; - __IO uint32_t P0_13; - __IO uint32_t P0_14; - __IO uint32_t P0_15; - - __IO uint32_t P0_16; /* 0x040 */ - __IO uint32_t P0_17; - __IO uint32_t P0_18; - __IO uint32_t P0_19; - __IO uint32_t P0_20; - __IO uint32_t P0_21; - __IO uint32_t P0_22; - __IO uint32_t P0_23; - - __IO uint32_t P0_24; /* 0x060 */ - __IO uint32_t P0_25; - __IO uint32_t P0_26; - __IO uint32_t P0_27; - __IO uint32_t P0_28; - __IO uint32_t P0_29; - __IO uint32_t P0_30; - __IO uint32_t P0_31; - - __IO uint32_t P1_0; /* 0x080 */ - __IO uint32_t P1_1; - __IO uint32_t P1_2; - __IO uint32_t P1_3; - __IO uint32_t P1_4; - __IO uint32_t P1_5; - __IO uint32_t P1_6; - __IO uint32_t P1_7; - - __IO uint32_t P1_8; /* 0x0A0 */ - __IO uint32_t P1_9; - __IO uint32_t P1_10; - __IO uint32_t P1_11; - __IO uint32_t P1_12; - __IO uint32_t P1_13; - __IO uint32_t P1_14; - __IO uint32_t P1_15; - - __IO uint32_t P1_16; /* 0x0C0 */ - __IO uint32_t P1_17; - __IO uint32_t P1_18; - __IO uint32_t P1_19; - __IO uint32_t P1_20; - __IO uint32_t P1_21; - __IO uint32_t P1_22; - __IO uint32_t P1_23; - - __IO uint32_t P1_24; /* 0x0E0 */ - __IO uint32_t P1_25; - __IO uint32_t P1_26; - __IO uint32_t P1_27; - __IO uint32_t P1_28; - __IO uint32_t P1_29; - __IO uint32_t P1_30; - __IO uint32_t P1_31; - - __IO uint32_t P2_0; /* 0x100 */ - __IO uint32_t P2_1; - __IO uint32_t P2_2; - __IO uint32_t P2_3; - __IO uint32_t P2_4; - __IO uint32_t P2_5; - __IO uint32_t P2_6; - __IO uint32_t P2_7; - - __IO uint32_t P2_8; /* 0x120 */ - __IO uint32_t P2_9; - __IO uint32_t P2_10; - __IO uint32_t P2_11; - __IO uint32_t P2_12; - __IO uint32_t P2_13; - __IO uint32_t P2_14; - __IO uint32_t P2_15; - - __IO uint32_t P2_16; /* 0x140 */ - __IO uint32_t P2_17; - __IO uint32_t P2_18; - __IO uint32_t P2_19; - __IO uint32_t P2_20; - __IO uint32_t P2_21; - __IO uint32_t P2_22; - __IO uint32_t P2_23; - - __IO uint32_t P2_24; /* 0x160 */ - __IO uint32_t P2_25; - __IO uint32_t P2_26; - __IO uint32_t P2_27; - __IO uint32_t P2_28; - __IO uint32_t P2_29; - __IO uint32_t P2_30; - __IO uint32_t P2_31; - - __IO uint32_t P3_0; /* 0x180 */ - __IO uint32_t P3_1; - __IO uint32_t P3_2; - __IO uint32_t P3_3; - __IO uint32_t P3_4; - __IO uint32_t P3_5; - __IO uint32_t P3_6; - __IO uint32_t P3_7; - - __IO uint32_t P3_8; /* 0x1A0 */ - __IO uint32_t P3_9; - __IO uint32_t P3_10; - __IO uint32_t P3_11; - __IO uint32_t P3_12; - __IO uint32_t P3_13; - __IO uint32_t P3_14; - __IO uint32_t P3_15; - - __IO uint32_t P3_16; /* 0x1C0 */ - __IO uint32_t P3_17; - __IO uint32_t P3_18; - __IO uint32_t P3_19; - __IO uint32_t P3_20; - __IO uint32_t P3_21; - __IO uint32_t P3_22; - __IO uint32_t P3_23; - - __IO uint32_t P3_24; /* 0x1E0 */ - __IO uint32_t P3_25; - __IO uint32_t P3_26; - __IO uint32_t P3_27; - __IO uint32_t P3_28; - __IO uint32_t P3_29; - __IO uint32_t P3_30; - __IO uint32_t P3_31; - - __IO uint32_t P4_0; /* 0x200 */ - __IO uint32_t P4_1; - __IO uint32_t P4_2; - __IO uint32_t P4_3; - __IO uint32_t P4_4; - __IO uint32_t P4_5; - __IO uint32_t P4_6; - __IO uint32_t P4_7; - - __IO uint32_t P4_8; /* 0x220 */ - __IO uint32_t P4_9; - __IO uint32_t P4_10; - __IO uint32_t P4_11; - __IO uint32_t P4_12; - __IO uint32_t P4_13; - __IO uint32_t P4_14; - __IO uint32_t P4_15; - - __IO uint32_t P4_16; /* 0x240 */ - __IO uint32_t P4_17; - __IO uint32_t P4_18; - __IO uint32_t P4_19; - __IO uint32_t P4_20; - __IO uint32_t P4_21; - __IO uint32_t P4_22; - __IO uint32_t P4_23; - - __IO uint32_t P4_24; /* 0x260 */ - __IO uint32_t P4_25; - __IO uint32_t P4_26; - __IO uint32_t P4_27; - __IO uint32_t P4_28; - __IO uint32_t P4_29; - __IO uint32_t P4_30; - __IO uint32_t P4_31; - - __IO uint32_t P5_0; /* 0x280 */ - __IO uint32_t P5_1; - __IO uint32_t P5_2; - __IO uint32_t P5_3; - __IO uint32_t P5_4; /* 0x290 */ -} LPC_IOCON_TypeDef; - -/*------------- General Purpose Input/Output (GPIO) --------------------------*/ -typedef struct -{ - __IO uint32_t DIR; - uint32_t RESERVED0[3]; - __IO uint32_t MASK; - __IO uint32_t PIN; - __IO uint32_t SET; - __O uint32_t CLR; -} LPC_GPIO_TypeDef; - -typedef struct -{ - __I uint32_t IntStatus; - __I uint32_t IO0IntStatR; - __I uint32_t IO0IntStatF; - __O uint32_t IO0IntClr; - __IO uint32_t IO0IntEnR; - __IO uint32_t IO0IntEnF; - uint32_t RESERVED0[3]; - __I uint32_t IO2IntStatR; - __I uint32_t IO2IntStatF; - __O uint32_t IO2IntClr; - __IO uint32_t IO2IntEnR; - __IO uint32_t IO2IntEnF; -} LPC_GPIOINT_TypeDef; - -/*------------- Timer (TIM) --------------------------------------------------*/ -typedef struct -{ - __IO uint32_t IR; /*!< Offset: 0x000 Interrupt Register (R/W) */ - __IO uint32_t TCR; /*!< Offset: 0x004 Timer Control Register (R/W) */ - __IO uint32_t TC; /*!< Offset: 0x008 Timer Counter Register (R/W) */ - __IO uint32_t PR; /*!< Offset: 0x00C Prescale Register (R/W) */ - __IO uint32_t PC; /*!< Offset: 0x010 Prescale Counter Register (R/W) */ - __IO uint32_t MCR; /*!< Offset: 0x014 Match Control Register (R/W) */ - __IO uint32_t MR0; /*!< Offset: 0x018 Match Register 0 (R/W) */ - __IO uint32_t MR1; /*!< Offset: 0x01C Match Register 1 (R/W) */ - __IO uint32_t MR2; /*!< Offset: 0x020 Match Register 2 (R/W) */ - __IO uint32_t MR3; /*!< Offset: 0x024 Match Register 3 (R/W) */ - __IO uint32_t CCR; /*!< Offset: 0x028 Capture Control Register (R/W) */ - __I uint32_t CR0; /*!< Offset: 0x02C Capture Register 0 (R/ ) */ - __I uint32_t CR1; /*!< Offset: 0x030 Capture Register 1 (R/ ) */ - uint32_t RESERVED0[2]; - __IO uint32_t EMR; /*!< Offset: 0x03C External Match Register (R/W) */ - uint32_t RESERVED1[12]; - __IO uint32_t CTCR; /*!< Offset: 0x070 Count Control Register (R/W) */ -} LPC_TIM_TypeDef; - -/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ -typedef struct -{ - __IO uint32_t IR; /*!< Offset: 0x000 Interrupt Register (R/W) */ - __IO uint32_t TCR; /*!< Offset: 0x004 Timer Control Register (R/W) */ - __IO uint32_t TC; /*!< Offset: 0x008 Timer Counter Register (R/W) */ - __IO uint32_t PR; /*!< Offset: 0x00C Prescale Register (R/W) */ - __IO uint32_t PC; /*!< Offset: 0x010 Prescale Counter Register (R/W) */ - __IO uint32_t MCR; /*!< Offset: 0x014 Match Control Register (R/W) */ - __IO uint32_t MR0; /*!< Offset: 0x018 Match Register 0 (R/W) */ - __IO uint32_t MR1; /*!< Offset: 0x01C Match Register 1 (R/W) */ - __IO uint32_t MR2; /*!< Offset: 0x020 Match Register 2 (R/W) */ - __IO uint32_t MR3; /*!< Offset: 0x024 Match Register 3 (R/W) */ - __IO uint32_t CCR; /*!< Offset: 0x028 Capture Control Register (R/W) */ - __I uint32_t CR0; /*!< Offset: 0x02C Capture Register 0 (R/ ) */ - __I uint32_t CR1; /*!< Offset: 0x030 Capture Register 1 (R/ ) */ - __I uint32_t CR2; /*!< Offset: 0x034 Capture Register 2 (R/ ) */ - __I uint32_t CR3; /*!< Offset: 0x038 Capture Register 3 (R/ ) */ - uint32_t RESERVED0; - __IO uint32_t MR4; /*!< Offset: 0x040 Match Register 4 (R/W) */ - __IO uint32_t MR5; /*!< Offset: 0x044 Match Register 5 (R/W) */ - __IO uint32_t MR6; /*!< Offset: 0x048 Match Register 6 (R/W) */ - __IO uint32_t PCR; /*!< Offset: 0x04C PWM Control Register (R/W) */ - __IO uint32_t LER; /*!< Offset: 0x050 Load Enable Register (R/W) */ - uint32_t RESERVED1[7]; - __IO uint32_t CTCR; /*!< Offset: 0x070 Counter Control Register (R/W) */ -} LPC_PWM_TypeDef; - -/*------------- Universal Asynchronous Receiver Transmitter (UARTx) -----------*/ -/* There are three types of UARTs on the chip: -(1) UART0,UART2, and UART3 are the standard UART. -(2) UART1 is the standard with modem capability. -(3) USART(UART4) is the sync/async UART with smart card capability. -More details can be found on the Users Manual. */ - -#if 0 -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __I uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[39]; - __I uint8_t FIFOLVL; -} LPC_UART_TypeDef; -#else -typedef struct -{ - union - { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union - { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union - { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7];//Reserved - __I uint8_t LSR; - uint8_t RESERVED2[7];//Reserved - __IO uint8_t SCR; - uint8_t RESERVED3[3];//Reserved - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3];//Reserved - __IO uint8_t FDR; - uint8_t RESERVED5[7];//Reserved - __IO uint8_t TER; - uint8_t RESERVED8[27];//Reserved - __IO uint8_t RS485CTRL; - uint8_t RESERVED9[3];//Reserved - __IO uint8_t ADRMATCH; - uint8_t RESERVED10[3];//Reserved - __IO uint8_t RS485DLY; - uint8_t RESERVED11[3];//Reserved - __I uint8_t FIFOLVL; -}LPC_UART_TypeDef; -#endif - - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[3]; - __IO uint8_t MCR; - uint8_t RESERVED2[3]; - __I uint8_t LSR; - uint8_t RESERVED3[3]; - __I uint8_t MSR; - uint8_t RESERVED4[3]; - __IO uint8_t SCR; - uint8_t RESERVED5[3]; - __IO uint32_t ACR; - uint32_t RESERVED6; - __IO uint32_t FDR; - uint32_t RESERVED7; - __IO uint8_t TER; - uint8_t RESERVED8[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED9[3]; - __IO uint8_t ADRMATCH; - uint8_t RESERVED10[3]; - __IO uint8_t RS485DLY; - uint8_t RESERVED11[3]; - __I uint8_t FIFOLVL; -} LPC_UART1_TypeDef; - -typedef struct -{ - union { - __I uint32_t RBR; /*!< Offset: 0x000 Receiver Buffer Register (R/ ) */ - __O uint32_t THR; /*!< Offset: 0x000 Transmit Holding Register ( /W) */ - __IO uint32_t DLL; /*!< Offset: 0x000 Divisor Latch LSB (R/W) */ - }; - union { - __IO uint32_t DLM; /*!< Offset: 0x004 Divisor Latch MSB (R/W) */ - __IO uint32_t IER; /*!< Offset: 0x000 Interrupt Enable Register (R/W) */ - }; - union { - __I uint32_t IIR; /*!< Offset: 0x008 Interrupt ID Register (R/ ) */ - __O uint32_t FCR; /*!< Offset: 0x008 FIFO Control Register ( /W) */ - }; - __IO uint32_t LCR; /*!< Offset: 0x00C Line Control Register (R/W) */ - __IO uint32_t MCR; /*!< Offset: 0x010 Modem control Register (R/W) */ - __I uint32_t LSR; /*!< Offset: 0x014 Line Status Register (R/ ) */ - __I uint32_t MSR; /*!< Offset: 0x018 Modem status Register (R/ ) */ - __IO uint32_t SCR; /*!< Offset: 0x01C Scratch Pad Register (R/W) */ - __IO uint32_t ACR; /*!< Offset: 0x020 Auto-baud Control Register (R/W) */ - __IO uint32_t ICR; /*!< Offset: 0x024 irDA Control Register (R/W) */ - __IO uint32_t FDR; /*!< Offset: 0x028 Fractional Divider Register (R/W) */ - __IO uint32_t OSR; /*!< Offset: 0x02C Over sampling Register (R/W) */ - __O uint32_t POP; /*!< Offset: 0x030 NHP Pop Register (W) */ - __IO uint32_t MODE; /*!< Offset: 0x034 NHP Mode selection Register (W) */ - uint32_t RESERVED0[2]; - __IO uint32_t HDEN; /*!< Offset: 0x040 Half duplex Enable Register (R/W) */ - uint32_t RESERVED1; - __IO uint32_t SCI_CTRL; /*!< Offset: 0x048 Smart card Interface Control Register (R/W) */ - __IO uint32_t RS485CTRL; /*!< Offset: 0x04C RS-485/EIA-485 Control Register (R/W) */ - __IO uint32_t ADRMATCH; /*!< Offset: 0x050 RS-485/EIA-485 address match Register (R/W) */ - __IO uint32_t RS485DLY; /*!< Offset: 0x054 RS-485/EIA-485 direction control delay Register (R/W) */ - __IO uint32_t SYNCCTRL; /*!< Offset: 0x058 Synchronous Mode Control Register (R/W ) */ - __IO uint32_t TER; /*!< Offset: 0x05C Transmit Enable Register (R/W) */ - uint32_t RESERVED2[989]; - __I uint32_t CFG; /*!< Offset: 0xFD4 Configuration Register (R) */ - __O uint32_t INTCE; /*!< Offset: 0xFD8 Interrupt Clear Enable Register (W) */ - __O uint32_t INTSE; /*!< Offset: 0xFDC Interrupt Set Enable Register (W) */ - __I uint32_t INTS; /*!< Offset: 0xFE0 Interrupt Status Register (R) */ - __I uint32_t INTE; /*!< Offset: 0xFE4 Interrupt Enable Register (R) */ - __O uint32_t INTCS; /*!< Offset: 0xFE8 Interrupt Clear Status Register (W) */ - __O uint32_t INTSS; /*!< Offset: 0xFEC Interrupt Set Status Register (W) */ - uint32_t RESERVED3[3]; - __I uint32_t MID; /*!< Offset: 0xFFC Module Identification Register (R) */ -} LPC_UART4_TypeDef; - -/*------------- Synchronous Serial Communication (SSP) -----------------------*/ -typedef struct -{ - __IO uint32_t CR0; /*!< Offset: 0x000 Control Register 0 (R/W) */ - __IO uint32_t CR1; /*!< Offset: 0x004 Control Register 1 (R/W) */ - __IO uint32_t DR; /*!< Offset: 0x008 Data Register (R/W) */ - __I uint32_t SR; /*!< Offset: 0x00C Status Registe (R/ ) */ - __IO uint32_t CPSR; /*!< Offset: 0x010 Clock Prescale Register (R/W) */ - __IO uint32_t IMSC; /*!< Offset: 0x014 Interrupt Mask Set and Clear Register (R/W) */ - __IO uint32_t RIS; /*!< Offset: 0x018 Raw Interrupt Status Register (R/W) */ - __IO uint32_t MIS; /*!< Offset: 0x01C Masked Interrupt Status Register (R/W) */ - __IO uint32_t ICR; /*!< Offset: 0x020 SSPICR Interrupt Clear Register (R/W) */ - __IO uint32_t DMACR; -} LPC_SSP_TypeDef; - -/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ -typedef struct -{ - __IO uint32_t CONSET; /*!< Offset: 0x000 I2C Control Set Register (R/W) */ - __I uint32_t STAT; /*!< Offset: 0x004 I2C Status Register (R/ ) */ - __IO uint32_t DAT; /*!< Offset: 0x008 I2C Data Register (R/W) */ - __IO uint32_t ADR0; /*!< Offset: 0x00C I2C Slave Address Register 0 (R/W) */ - __IO uint32_t SCLH; /*!< Offset: 0x010 SCH Duty Cycle Register High Half Word (R/W) */ - __IO uint32_t SCLL; /*!< Offset: 0x014 SCL Duty Cycle Register Low Half Word (R/W) */ - __O uint32_t CONCLR; /*!< Offset: 0x018 I2C Control Clear Register ( /W) */ - __IO uint32_t MMCTRL; /*!< Offset: 0x01C Monitor mode control register (R/W) */ - __IO uint32_t ADR1; /*!< Offset: 0x020 I2C Slave Address Register 1 (R/W) */ - __IO uint32_t ADR2; /*!< Offset: 0x024 I2C Slave Address Register 2 (R/W) */ - __IO uint32_t ADR3; /*!< Offset: 0x028 I2C Slave Address Register 3 (R/W) */ - __I uint32_t DATA_BUFFER; /*!< Offset: 0x02C Data buffer register ( /W) */ - __IO uint32_t MASK0; /*!< Offset: 0x030 I2C Slave address mask register 0 (R/W) */ - __IO uint32_t MASK1; /*!< Offset: 0x034 I2C Slave address mask register 1 (R/W) */ - __IO uint32_t MASK2; /*!< Offset: 0x038 I2C Slave address mask register 2 (R/W) */ - __IO uint32_t MASK3; /*!< Offset: 0x03C I2C Slave address mask register 3 (R/W) */ -} LPC_I2C_TypeDef; - -/*------------- Inter IC Sound (I2S) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t DAO; - __IO uint32_t DAI; - __O uint32_t TXFIFO; - __I uint32_t RXFIFO; - __I uint32_t STATE; - __IO uint32_t DMA1; - __IO uint32_t DMA2; - __IO uint32_t IRQ; - __IO uint32_t TXRATE; - __IO uint32_t RXRATE; - __IO uint32_t TXBITRATE; - __IO uint32_t RXBITRATE; - __IO uint32_t TXMODE; - __IO uint32_t RXMODE; -} LPC_I2S_TypeDef; - -/*------------- Real-Time Clock (RTC) ----------------------------------------*/ -typedef struct -{ - __IO uint8_t ILR; - uint8_t RESERVED0[7]; - __IO uint8_t CCR; - uint8_t RESERVED1[3]; - __IO uint8_t CIIR; - uint8_t RESERVED2[3]; - __IO uint8_t AMR; - uint8_t RESERVED3[3]; - __I uint32_t CTIME0; - __I uint32_t CTIME1; - __I uint32_t CTIME2; - __IO uint8_t SEC; - uint8_t RESERVED4[3]; - __IO uint8_t MIN; - uint8_t RESERVED5[3]; - __IO uint8_t HOUR; - uint8_t RESERVED6[3]; - __IO uint8_t DOM; - uint8_t RESERVED7[3]; - __IO uint8_t DOW; - uint8_t RESERVED8[3]; - __IO uint16_t DOY; - uint16_t RESERVED9; - __IO uint8_t MONTH; - uint8_t RESERVED10[3]; - __IO uint16_t YEAR; - uint16_t RESERVED11; - __IO uint32_t CALIBRATION; - __IO uint32_t GPREG0; - __IO uint32_t GPREG1; - __IO uint32_t GPREG2; - __IO uint32_t GPREG3; - __IO uint32_t GPREG4; - __IO uint8_t RTC_AUXEN; - uint8_t RESERVED12[3]; - __IO uint8_t RTC_AUX; - uint8_t RESERVED13[3]; - __IO uint8_t ALSEC; - uint8_t RESERVED14[3]; - __IO uint8_t ALMIN; - uint8_t RESERVED15[3]; - __IO uint8_t ALHOUR; - uint8_t RESERVED16[3]; - __IO uint8_t ALDOM; - uint8_t RESERVED17[3]; - __IO uint8_t ALDOW; - uint8_t RESERVED18[3]; - __IO uint16_t ALDOY; - uint16_t RESERVED19; - __IO uint8_t ALMON; - uint8_t RESERVED20[3]; - __IO uint16_t ALYEAR; - uint16_t RESERVED21; - __IO uint32_t ERSTATUS; - __IO uint32_t ERCONTROL; - __IO uint32_t ERCOUNTERS; - uint32_t RESERVED22; - __IO uint32_t ERFIRSTSTAMP0; - __IO uint32_t ERFIRSTSTAMP1; - __IO uint32_t ERFIRSTSTAMP2; - uint32_t RESERVED23; - __IO uint32_t ERLASTSTAMP0; - __IO uint32_t ERLASTSTAMP1; - __IO uint32_t ERLASTSTAMP2; -} LPC_RTC_TypeDef; - -/*------------- Watchdog Timer (WDT) -----------------------------------------*/ -typedef struct -{ - __IO uint8_t MOD; - uint8_t RESERVED0[3]; - __IO uint32_t TC; - __O uint8_t FEED; - uint8_t RESERVED1[3]; - __I uint32_t TV; - uint32_t RESERVED2; - __IO uint32_t WARNINT; - __IO uint32_t WINDOW; -} LPC_WDT_TypeDef; - -/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ -typedef struct -{ - __IO uint32_t CR; /*!< Offset: 0x000 A/D Control Register (R/W) */ - __IO uint32_t GDR; /*!< Offset: 0x004 A/D Global Data Register (R/W) */ - uint32_t RESERVED0; - __IO uint32_t INTEN; /*!< Offset: 0x00C A/D Interrupt Enable Register (R/W) */ - __IO uint32_t DR[8]; /*!< Offset: 0x010-0x02C A/D Channel 0..7 Data Register (R/W) */ - __I uint32_t STAT; /*!< Offset: 0x030 A/D Status Register (R/ ) */ - __IO uint32_t ADTRM; -} LPC_ADC_TypeDef; - -/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CTRL; - __IO uint32_t CNTVAL; -} LPC_DAC_TypeDef; - -/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/ -typedef struct -{ - __I uint32_t CON; - __O uint32_t CON_SET; - __O uint32_t CON_CLR; - __I uint32_t CAPCON; - __O uint32_t CAPCON_SET; - __O uint32_t CAPCON_CLR; - __IO uint32_t TC0; - __IO uint32_t TC1; - __IO uint32_t TC2; - __IO uint32_t LIM0; - __IO uint32_t LIM1; - __IO uint32_t LIM2; - __IO uint32_t MAT0; - __IO uint32_t MAT1; - __IO uint32_t MAT2; - __IO uint32_t DT; - __IO uint32_t CP; - __IO uint32_t CAP0; - __IO uint32_t CAP1; - __IO uint32_t CAP2; - __I uint32_t INTEN; - __O uint32_t INTEN_SET; - __O uint32_t INTEN_CLR; - __I uint32_t CNTCON; - __O uint32_t CNTCON_SET; - __O uint32_t CNTCON_CLR; - __I uint32_t INTF; - __O uint32_t INTF_SET; - __O uint32_t INTF_CLR; - __O uint32_t CAP_CLR; -} LPC_MCPWM_TypeDef; - -/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/ -typedef struct -{ - __O uint32_t CON; - __I uint32_t STAT; - __IO uint32_t CONF; - __I uint32_t POS; - __IO uint32_t MAXPOS; - __IO uint32_t CMPOS0; - __IO uint32_t CMPOS1; - __IO uint32_t CMPOS2; - __I uint32_t INXCNT; - __IO uint32_t INXCMP0; - __IO uint32_t LOAD; - __I uint32_t TIME; - __I uint32_t VEL; - __I uint32_t CAP; - __IO uint32_t VELCOMP; - __IO uint32_t FILTERPHA; - __IO uint32_t FILTERPHB; - __IO uint32_t FILTERINX; - __IO uint32_t WINDOW; - __IO uint32_t INXCMP1; - __IO uint32_t INXCMP2; - uint32_t RESERVED0[993]; - __O uint32_t IEC; - __O uint32_t IES; - __I uint32_t INTSTAT; - __I uint32_t IE; - __O uint32_t CLR; - __O uint32_t SET; -} LPC_QEI_TypeDef; - -/*------------- SD/MMC card Interface (MCI)-----------------------------------*/ -typedef struct -{ - __IO uint32_t POWER; - __IO uint32_t CLOCK; - __IO uint32_t ARGUMENT; - __IO uint32_t COMMAND; - __I uint32_t RESP_CMD; - __I uint32_t RESP0; - __I uint32_t RESP1; - __I uint32_t RESP2; - __I uint32_t RESP3; - __IO uint32_t DATATMR; - __IO uint32_t DATALEN; - __IO uint32_t DATACTRL; - __I uint32_t DATACNT; - __I uint32_t STATUS; - __O uint32_t CLEAR; - __IO uint32_t MASK0; - uint32_t RESERVED0[2]; - __I uint32_t FIFOCNT; - uint32_t RESERVED1[13]; - __IO uint32_t FIFO; -} LPC_MCI_TypeDef; - -/*------------- Controller Area Network (CAN) --------------------------------*/ -typedef struct -{ - __IO uint32_t mask[512]; /* ID Masks */ -} LPC_CANAF_RAM_TypeDef; - -typedef struct /* Acceptance Filter Registers */ -{ - ///Offset: 0x00000000 - Acceptance Filter Register - __IO uint32_t AFMR; - - ///Offset: 0x00000004 - Standard Frame Individual Start Address Register - __IO uint32_t SFF_sa; - - ///Offset: 0x00000008 - Standard Frame Group Start Address Register - __IO uint32_t SFF_GRP_sa; - - ///Offset: 0x0000000C - Extended Frame Start Address Register - __IO uint32_t EFF_sa; - - ///Offset: 0x00000010 - Extended Frame Group Start Address Register - __IO uint32_t EFF_GRP_sa; - - ///Offset: 0x00000014 - End of AF Tables register - __IO uint32_t ENDofTable; - - ///Offset: 0x00000018 - LUT Error Address register - __I uint32_t LUTerrAd; - - ///Offset: 0x0000001C - LUT Error Register - __I uint32_t LUTerr; - - ///Offset: 0x00000020 - CAN Central Transmit Status Register - __IO uint32_t FCANIE; - - ///Offset: 0x00000024 - FullCAN Interrupt and Capture registers 0 - __IO uint32_t FCANIC0; - - ///Offset: 0x00000028 - FullCAN Interrupt and Capture registers 1 - __IO uint32_t FCANIC1; -} LPC_CANAF_TypeDef; - -typedef struct /* Central Registers */ -{ - __I uint32_t TxSR; - __I uint32_t RxSR; - __I uint32_t MSR; -} LPC_CANCR_TypeDef; - -typedef struct /* Controller Registers */ -{ - ///Offset: 0x00000000 - Controls the operating mode of the CAN Controller - __IO uint32_t MOD; - - ///Offset: 0x00000004 - Command bits that affect the state - __O uint32_t CMR; - - ///Offset: 0x00000008 - Global Controller Status and Error Counters - __IO uint32_t GSR; - - ///Offset: 0x0000000C - Interrupt status, Arbitration Lost Capture, Error Code Capture - __I uint32_t ICR; - - ///Offset: 0x00000010 - Interrupt Enable Register - __IO uint32_t IER; - - ///Offset: 0x00000014 - Bus Timing Register - __IO uint32_t BTR; - - ///Offset: 0x00000018 - Error Warning Limit - __IO uint32_t EWL; - - ///Offset: 0x0000001C - Status Register - __I uint32_t SR; - - ///Offset: 0x00000020 - Receive frame status - __IO uint32_t RFS; - - ///Offset: 0x00000024 - Received Identifier - __IO uint32_t RID; - - ///Offset: 0x00000028 - Received data bytes 1-4 - __IO uint32_t RDA; - - ///Offset: 0x0000002C - Received data bytes 5-8 - __IO uint32_t RDB; - - ///Offset: 0x00000030 - Transmit frame info (Tx Buffer 1) - __IO uint32_t TFI1; - - ///Offset: 0x00000034 - Transmit Identifier (Tx Buffer 1) - __IO uint32_t TID1; - - ///Offset: 0x00000038 - Transmit data bytes 1-4 (Tx Buffer 1) - __IO uint32_t TDA1; - - ///Offset: 0x0000003C - Transmit data bytes 5-8 (Tx Buffer 1) - __IO uint32_t TDB1; - - ///Offset: 0x00000040 - Transmit frame info (Tx Buffer 2) - __IO uint32_t TFI2; - - ///Offset: 0x00000044 - Transmit Identifier (Tx Buffer 2) - __IO uint32_t TID2; - - ///Offset: 0x00000048 - Transmit data bytes 1-4 (Tx Buffer 2) - __IO uint32_t TDA2; - - ///Offset: 0x0000004C - Transmit data bytes 5-8 (Tx Buffer 2) - __IO uint32_t TDB2; - - ///Offset: 0x00000050 - Transmit frame info (Tx Buffer 3) - __IO uint32_t TFI3; - - ///Offset: 0x00000054 - Transmit Identifier (Tx Buffer 3) - __IO uint32_t TID3; - - ///Offset: 0x00000058 - Transmit data bytes 1-4 (Tx Buffer 3) - __IO uint32_t TDA3; - - ///Offset: 0x0000005C - Transmit data bytes 5-8 (Tx Buffer 3) - __IO uint32_t TDB3; -} LPC_CAN_TypeDef; - -/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ -typedef struct /* Common Registers */ -{ - __I uint32_t IntStat; - __I uint32_t IntTCStat; - __O uint32_t IntTCClear; - __I uint32_t IntErrStat; - __O uint32_t IntErrClr; - __I uint32_t RawIntTCStat; - __I uint32_t RawIntErrStat; - __I uint32_t EnbldChns; - __IO uint32_t SoftBReq; - __IO uint32_t SoftSReq; - __IO uint32_t SoftLBReq; - __IO uint32_t SoftLSReq; - __IO uint32_t Config; - __IO uint32_t Sync; -} LPC_GPDMA_TypeDef; - -typedef struct /* Channel Registers */ -{ - __IO uint32_t CSrcAddr; - __IO uint32_t CDestAddr; - __IO uint32_t CLLI; - __IO uint32_t CControl; - __IO uint32_t CConfig; -} LPC_GPDMACH_TypeDef; - -/*------------- Universal Serial Bus (USB) -----------------------------------*/ -typedef struct -{ - __I uint32_t Revision; /* USB Host Registers */ - __IO uint32_t Control; - __IO uint32_t CommandStatus; - __IO uint32_t InterruptStatus; - __IO uint32_t InterruptEnable; - __IO uint32_t InterruptDisable; - __IO uint32_t HCCA; - __I uint32_t PeriodCurrentED; - __IO uint32_t ControlHeadED; - __IO uint32_t ControlCurrentED; - __IO uint32_t BulkHeadED; - __IO uint32_t BulkCurrentED; - __I uint32_t DoneHead; - __IO uint32_t FmInterval; - __I uint32_t FmRemaining; - __I uint32_t FmNumber; - __IO uint32_t PeriodicStart; - __IO uint32_t LSTreshold; - __IO uint32_t RhDescriptorA; - __IO uint32_t RhDescriptorB; - __IO uint32_t RhStatus; - __IO uint32_t RhPortStatus1; - __IO uint32_t RhPortStatus2; - uint32_t RESERVED0[40]; - __I uint32_t Module_ID; - - __I uint32_t IntSt; /* USB On-The-Go Registers */ - __IO uint32_t IntEn; - __O uint32_t IntSet; - __O uint32_t IntClr; - __IO uint32_t StCtrl; - __IO uint32_t Tmr; - uint32_t RESERVED1[58]; - - __I uint32_t DevIntSt; /* USB Device Interrupt Registers */ - __IO uint32_t DevIntEn; - __O uint32_t DevIntClr; - __O uint32_t DevIntSet; - - __O uint32_t CmdCode; /* USB Device SIE Command Registers */ - __I uint32_t CmdData; - - __I uint32_t RxData; /* USB Device Transfer Registers */ - __O uint32_t TxData; - __I uint32_t RxPLen; - __O uint32_t TxPLen; - __IO uint32_t Ctrl; - __O uint32_t DevIntPri; - - __I uint32_t EpIntSt; /* USB Device Endpoint Interrupt Regs */ - __IO uint32_t EpIntEn; - __O uint32_t EpIntClr; - __O uint32_t EpIntSet; - __O uint32_t EpIntPri; - - __IO uint32_t ReEp; /* USB Device Endpoint Realization Reg*/ - __O uint32_t EpInd; - __IO uint32_t MaxPSize; - - __I uint32_t DMARSt; /* USB Device DMA Registers */ - __O uint32_t DMARClr; - __O uint32_t DMARSet; - uint32_t RESERVED2[9]; - __IO uint32_t UDCAH; - __I uint32_t EpDMASt; - __O uint32_t EpDMAEn; - __O uint32_t EpDMADis; - __I uint32_t DMAIntSt; - __IO uint32_t DMAIntEn; - uint32_t RESERVED3[2]; - __I uint32_t EoTIntSt; - __O uint32_t EoTIntClr; - __O uint32_t EoTIntSet; - __I uint32_t NDDRIntSt; - __O uint32_t NDDRIntClr; - __O uint32_t NDDRIntSet; - __I uint32_t SysErrIntSt; - __O uint32_t SysErrIntClr; - __O uint32_t SysErrIntSet; - uint32_t RESERVED4[15]; - - union { - __I uint32_t I2C_RX; /* USB OTG I2C Registers */ - __O uint32_t I2C_TX; - }; - __IO uint32_t I2C_STS; - __IO uint32_t I2C_CTL; - __IO uint32_t I2C_CLKHI; - __O uint32_t I2C_CLKLO; - uint32_t RESERVED5[824]; - - union { - __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ - __IO uint32_t OTGClkCtrl; - }; - union { - __I uint32_t USBClkSt; - __I uint32_t OTGClkSt; - }; -} LPC_USB_TypeDef; - -/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ -typedef struct -{ - __IO uint32_t MAC1; /* MAC Registers */ - __IO uint32_t MAC2; - __IO uint32_t IPGT; - __IO uint32_t IPGR; - __IO uint32_t CLRT; - __IO uint32_t MAXF; - __IO uint32_t SUPP; - __IO uint32_t TEST; - __IO uint32_t MCFG; - __IO uint32_t MCMD; - __IO uint32_t MADR; - __O uint32_t MWTD; - __I uint32_t MRDD; - __I uint32_t MIND; - uint32_t RESERVED0[2]; - __IO uint32_t SA0; - __IO uint32_t SA1; - __IO uint32_t SA2; - uint32_t RESERVED1[45]; - __IO uint32_t Command; /* Control Registers */ - __I uint32_t Status; - __IO uint32_t RxDescriptor; - __IO uint32_t RxStatus; - __IO uint32_t RxDescriptorNumber; - __I uint32_t RxProduceIndex; - __IO uint32_t RxConsumeIndex; - __IO uint32_t TxDescriptor; - __IO uint32_t TxStatus; - __IO uint32_t TxDescriptorNumber; - __IO uint32_t TxProduceIndex; - __I uint32_t TxConsumeIndex; - uint32_t RESERVED2[10]; - __I uint32_t TSV0; - __I uint32_t TSV1; - __I uint32_t RSV; - uint32_t RESERVED3[3]; - __IO uint32_t FlowControlCounter; - __I uint32_t FlowControlStatus; - uint32_t RESERVED4[34]; - __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ - __I uint32_t RxFilterWoLStatus; - __O uint32_t RxFilterWoLClear; - uint32_t RESERVED5; - __IO uint32_t HashFilterL; - __IO uint32_t HashFilterH; - uint32_t RESERVED6[882]; - __I uint32_t IntStatus; /* Module Control Registers */ - __IO uint32_t IntEnable; - __O uint32_t IntClear; - __O uint32_t IntSet; - uint32_t RESERVED7; - __IO uint32_t PowerDown; - uint32_t RESERVED8; - __IO uint32_t Module_ID; -} LPC_EMAC_TypeDef; - -/*------------- LCD controller (LCD) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t TIMH; /* LCD Registers */ - __IO uint32_t TIMV; - __IO uint32_t POL; - __IO uint32_t LE; - __IO uint32_t UPBASE; - __IO uint32_t LPBASE; - __IO uint32_t CTRL; - __IO uint32_t INTMSK; - __I uint32_t INTRAW; - __I uint32_t INTSTAT; - __O uint32_t INTCLR; - __I uint32_t UPCURR; - __I uint32_t LPCURR; - uint32_t RESERVED0[115]; - __IO uint32_t PAL[128]; - uint32_t RESERVED1[256]; - __IO uint32_t CRSR_IMG[256]; - __IO uint32_t CRSR_CTRL; - __IO uint32_t CRSR_CFG; - __IO uint32_t CRSR_PAL0; - __IO uint32_t CRSR_PAL1; - __IO uint32_t CRSR_XY; - __IO uint32_t CRSR_CLIP; - uint32_t RESERVED2[2]; - __IO uint32_t CRSR_INTMSK; - __O uint32_t CRSR_INTCLR; - __I uint32_t CRSR_INTRAW; - __I uint32_t CRSR_INTSTAT; -} LPC_LCD_TypeDef; - -/*------------- External Memory Controller (EMC) -----------------------------*/ -typedef struct -{ - __IO uint32_t Control; - __I uint32_t Status; - __IO uint32_t Config; - uint32_t RESERVED0[5]; - __IO uint32_t DynamicControl; - __IO uint32_t DynamicRefresh; - __IO uint32_t DynamicReadConfig; - uint32_t RESERVED1[1]; - __IO uint32_t DynamicRP; - __IO uint32_t DynamicRAS; - __IO uint32_t DynamicSREX; - __IO uint32_t DynamicAPR; - __IO uint32_t DynamicDAL; - __IO uint32_t DynamicWR; - __IO uint32_t DynamicRC; - __IO uint32_t DynamicRFC; - __IO uint32_t DynamicXSR; - __IO uint32_t DynamicRRD; - __IO uint32_t DynamicMRD; - uint32_t RESERVED2[9]; - __IO uint32_t StaticExtendedWait; - uint32_t RESERVED3[31]; - __IO uint32_t DynamicConfig0; - __IO uint32_t DynamicRasCas0; - uint32_t RESERVED4[6]; - __IO uint32_t DynamicConfig1; - __IO uint32_t DynamicRasCas1; - uint32_t RESERVED5[6]; - __IO uint32_t DynamicConfig2; - __IO uint32_t DynamicRasCas2; - uint32_t RESERVED6[6]; - __IO uint32_t DynamicConfig3; - __IO uint32_t DynamicRasCas3; - uint32_t RESERVED7[38]; - __IO uint32_t StaticConfig0; - __IO uint32_t StaticWaitWen0; - __IO uint32_t StaticWaitOen0; - __IO uint32_t StaticWaitRd0; - __IO uint32_t StaticWaitPage0; - __IO uint32_t StaticWaitWr0; - __IO uint32_t StaticWaitTurn0; - uint32_t RESERVED8[1]; - __IO uint32_t StaticConfig1; - __IO uint32_t StaticWaitWen1; - __IO uint32_t StaticWaitOen1; - __IO uint32_t StaticWaitRd1; - __IO uint32_t StaticWaitPage1; - __IO uint32_t StaticWaitWr1; - __IO uint32_t StaticWaitTurn1; - uint32_t RESERVED9[1]; - __IO uint32_t StaticConfig2; - __IO uint32_t StaticWaitWen2; - __IO uint32_t StaticWaitOen2; - __IO uint32_t StaticWaitRd2; - __IO uint32_t StaticWaitPage2; - __IO uint32_t StaticWaitWr2; - __IO uint32_t StaticWaitTurn2; - uint32_t RESERVED10[1]; - __IO uint32_t StaticConfig3; - __IO uint32_t StaticWaitWen3; - __IO uint32_t StaticWaitOen3; - __IO uint32_t StaticWaitRd3; - __IO uint32_t StaticWaitPage3; - __IO uint32_t StaticWaitWr3; - __IO uint32_t StaticWaitTurn3; -} LPC_EMC_TypeDef; - -/*------------- CRC Engine (CRC) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t MODE; - __IO uint32_t SEED; - union { - __I uint32_t SUM; - __O uint32_t WR_DATA_DWORD; - __O uint16_t WR_DATA_WORD; - uint16_t RESERVED_WORD; - __O uint8_t WR_DATA_BYTE; - uint8_t RESERVED_BYTE[3]; - }; -} LPC_CRC_TypeDef; - -/*------------- EEPROM Controller (EEPROM) -----------------------------------*/ -typedef struct -{ - __IO uint32_t CMD; /* 0x0080 */ - __IO uint32_t ADDR; - __IO uint32_t WDATA; - __IO uint32_t RDATA; - __IO uint32_t WSTATE; /* 0x0090 */ - __IO uint32_t CLKDIV; - __IO uint32_t PWRDWN; /* 0x0098 */ - uint32_t RESERVED0[975]; - __IO uint32_t INT_CLR_ENABLE; /* 0x0FD8 */ - __IO uint32_t INT_SET_ENABLE; - __IO uint32_t INT_STATUS; /* 0x0FE0 */ - __IO uint32_t INT_ENABLE; - __IO uint32_t INT_CLR_STATUS; - __IO uint32_t INT_SET_STATUS; -} LPC_EEPROM_TypeDef; - -#if defined ( __CC_ARM ) -#pragma no_anon_unions -#endif - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -/* Base addresses */ -#define LPC_FLASH_BASE (0x00000000UL) -#define LPC_RAM_BASE (0x10000000UL) -#define LPC_PERI_RAM_BASE (0x20000000UL) -#define LPC_APB0_BASE (0x40000000UL) -#define LPC_APB1_BASE (0x40080000UL) -#define LPC_AHBRAM1_BASE (0x20004000UL) -#define LPC_AHB_BASE (0x20080000UL) -#define LPC_CM3_BASE (0xE0000000UL) - -/* APB0 peripherals */ -#define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000) -#define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000) -#define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000) -#define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000) -#define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000) -#define LPC_PWM0_BASE (LPC_APB0_BASE + 0x14000) -#define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000) -#define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000) -#define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000) -#define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080) -#define LPC_IOCON_BASE (LPC_APB0_BASE + 0x2C000) -#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000) -#define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000) -#define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000) -#define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000) -#define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000) -#define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000) -#define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000) -#define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000) - -/* APB1 peripherals */ -#define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000) -#define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000) -#define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000) -#define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000) -#define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000) -#define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000) -#define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000) -#define LPC_UART4_BASE (LPC_APB1_BASE + 0x24000) -#define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000) -#define LPC_SSP2_BASE (LPC_APB1_BASE + 0x2C000) -#define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000) -#define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000) -#define LPC_MCI_BASE (LPC_APB1_BASE + 0x40000) -#define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000) - -/* AHB peripherals */ -#define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x00000) -#define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x00100) -#define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x00120) -#define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x00140) -#define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x00160) -#define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x00180) -#define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x001A0) -#define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x001C0) -#define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x001E0) -#define LPC_EMAC_BASE (LPC_AHB_BASE + 0x04000) -#define LPC_LCD_BASE (LPC_AHB_BASE + 0x08000) -#define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000) -#define LPC_CRC_BASE (LPC_AHB_BASE + 0x10000) -#define LPC_GPIO0_BASE (LPC_AHB_BASE + 0x18000) -#define LPC_GPIO1_BASE (LPC_AHB_BASE + 0x18020) -#define LPC_GPIO2_BASE (LPC_AHB_BASE + 0x18040) -#define LPC_GPIO3_BASE (LPC_AHB_BASE + 0x18060) -#define LPC_GPIO4_BASE (LPC_AHB_BASE + 0x18080) -#define LPC_GPIO5_BASE (LPC_AHB_BASE + 0x180A0) -#define LPC_EMC_BASE (LPC_AHB_BASE + 0x1C000) - -#define LPC_EEPROM_BASE (LPC_FLASH_BASE+ 0x200080) - - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ -#define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE ) -#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE ) -#define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE ) -#define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE ) -#define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE ) -#define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE ) -#define LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE ) -#define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE ) -#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE ) -#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE ) -#define LPC_UART4 ((LPC_UART4_TypeDef *) LPC_UART4_BASE ) -#define LPC_PWM0 ((LPC_PWM_TypeDef *) LPC_PWM0_BASE ) -#define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE ) -#define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE ) -#define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE ) -#define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE ) -#define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE ) -#define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE ) -#define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE ) -#define LPC_IOCON ((LPC_IOCON_TypeDef *) LPC_IOCON_BASE ) -#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE ) -#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE ) -#define LPC_SSP2 ((LPC_SSP_TypeDef *) LPC_SSP2_BASE ) -#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE ) -#define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE ) -#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE) -#define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE ) -#define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE ) -#define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE ) -#define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE ) -#define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE ) -#define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE ) -#define LPC_MCI ((LPC_MCI_TypeDef *) LPC_MCI_BASE ) -#define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE ) -#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE ) -#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE ) -#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE ) -#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE ) -#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE ) -#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE ) -#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE ) -#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE ) -#define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE ) -#define LPC_LCD ((LPC_LCD_TypeDef *) LPC_LCD_BASE ) -#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE ) -#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) -#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) -#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) -#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE ) -#define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE ) -#define LPC_GPIO5 ((LPC_GPIO_TypeDef *) LPC_GPIO5_BASE ) -#define LPC_EMC ((LPC_EMC_TypeDef *) LPC_EMC_BASE ) -#define LPC_CRC ((LPC_CRC_TypeDef *) LPC_CRC_BASE ) -#define LPC_EEPROM ((LPC_EEPROM_TypeDef *) LPC_EEPROM_BASE ) - -#endif // __LPC177x_8x_H__ DELETED firmware/lib/lpc17xx/LPC177x_8x_bits.h Index: firmware/lib/lpc17xx/LPC177x_8x_bits.h ================================================================== --- firmware/lib/lpc17xx/LPC177x_8x_bits.h +++ /dev/null @@ -1,212 +0,0 @@ -#ifndef LPC17XX_BITS_H -#define LPC17XX_BITS_H - -#define PCONP_PCLCD (1 << 0) -#define PCONP_PCTIM0 (1 << 1) -#define PCONP_PCTIM1 (1 << 2) -#define PCONP_PCUART0 (1 << 3) -#define PCONP_PCUART1 (1 << 4) -#define PCONP_PCRTC (1 << 9) -#define PCONP_PCSSP1 (1 << 10) -#define PCONP_PCEMC (1 << 11) -#define PCONP_PCGPIO (1 << 15) -#define PCONP_PCSSP0 (1 << 21) -#define PCONP_PCTIM2 (1 << 22) -#define PCONP_PCSDC (1 << 28) -#define PCONP_PCGPDMA (1 << 29) -#define PCONP_PCENET (1 << 30) -#define PCONP_PCUSB (1 << 31) - -#define PLLCON_PLLE (1 << 0) - -#define PLLSTAT_PLLE (1 << 8) -#define PLLSTAT_PLOCK (1 << 10) - -#define LPC_IOCON_FUNC_MASK (0x07 << 0) -#define LPC_IOCON_MODE_MASK (0x03 << 3) -#define LPC_IOCON_FILTER_MASK (1 << 8) - -#define LPC_IOCON_FUNC_GPIO 0 - -#define LPC_IOCON_FUNC(val) ((val) << 0) -#define LPC_IOCON_FUNC_SET(pin, val) {LPC_IOCON->pin &= ~LPC_IOCON_FUNC_MASK; LPC_IOCON->pin |= val;} - -#define LPC_IOCON_MODE_NO_PULLUP_NO_PULLDOWN(pin) {LPC_IOCON->pin &= ~LPC_IOCON_MODE_MASK; LPC_IOCON->pin |= (0x00 << 3);} -#define LPC_IOCON_MODE_PULLDOWN(pin) {LPC_IOCON->pin &= ~LPC_IOCON_MODE_MASK; LPC_IOCON->pin |= (0x01 << 3);} -#define LPC_IOCON_MODE_PULLUP(pin) {LPC_IOCON->pin &= ~LPC_IOCON_MODE_MASK; LPC_IOCON->pin |= (0x02 << 3);} -#define LPC_IOCON_MODE_REPEATER(pin) {LPC_IOCON->pin &= ~LPC_IOCON_MODE_MASK; LPC_IOCON->pin |= (0x03 << 3);} - -/* only for type A and W pins */ -#define LPC_IOCON_MODE_FILTER_ON(pin) {LPC_IOCON->pin &= ~LPC_IOCON_FILTER_MASK} -#define LPC_IOCON_MODE_FILTER_OFF(pin) {LPC_IOCON->pin |= LPC_IOCON_FILTER_MASK} - -#define LPC_IOCON_P0_7_SSP1_SCK 2 -#define LPC_IOCON_P0_8_SSP1_MISO 2 -#define LPC_IOCON_P0_9_SSP1_MOSI 2 - -#define LPC_IOCON_P0_12_SSP1_MISO 2 -#define LPC_IOCON_P0_13_SSP1_MOSI 2 -#define LPC_IOCON_P0_14_USB_CONNECT2 3 -#define LPC_IOCON_P0_29_EINT0 2 -#define LPC_IOCON_P0_31_USB_DP2 1 - -#define LPC_IOCON_P1_20_SSP0_SCK 5 -#define LPC_IOCON_P1_23_SSP0_MISO 5 -#define LPC_IOCON_P1_24_SSP0_MOSI 5 - -#define LPC_IOCON_P1_2_SD_CLK 2 -#define LPC_IOCON_P1_3_SD_CMD 2 -#define LPC_IOCON_P1_6_SD_DAT0 2 -#define LPC_IOCON_P1_7_SD_DAT1 2 -#define LPC_IOCON_P1_11_SD_DAT2 2 -#define LPC_IOCON_P1_12_SD_DAT3 2 -#define LPC_IOCON_P1_19_SSP1_SCK 5 -#define LPC_IOCON_P1_30_USB_PWRD2 1 -#define LPC_IOCON_P1_30_USB_VBUS 2 -#define LPC_IOCON_P1_31_SSP1_SCK 2 - -#define LPC_IOCON_P2_23_SSP0_SSEL 2 -#define LPC_IOCON_P2_22_SSP0_SCK 2 -#define LPC_IOCON_P2_26_SSP0_MISO 2 -#define LPC_IOCON_P2_27_SSP0_MOSI 2 - -#define LPC_IOCON_P4_20_SSP1_SCK 3 -#define LPC_IOCON_P4_22_SSP1_MISO 3 -#define LPC_IOCON_P4_23_SSP1_MOSI 3 - -/**************************** - * UART - ****************************/ -#define UART_LCR_DLAB (1 << 7) - -#define UART_IER_RBR (1 << 0) -#define UART_IER_THRE (1 << 1) -#define UART_IER_RLS (1 << 2) - -#define UART_INTID_RLS 0x03 -#define UART_INTID_RDA 0x02 -#define UART_INTID_CTI 0x06 -#define UART_INTID_THRE 0x01 -#define UART_LSR_TEMT (1 << 6) - -#define UART_LSR_RDR (1 << 0) -#define UART_LSR_THRE (1 << 5) - -#define TCR_ENABLE (1 << 0) -#define TCR_RESET (1 << 1) - -/**************************** - * SSP - ****************************/ -#define SSP_CR0_DSS_4BIT (3 << 0) /* data size select */ -#define SSP_CR0_DSS_5BIT (4 << 0) /* data size select */ -#define SSP_CR0_DSS_6BIT (5 << 0) /* data size select */ -#define SSP_CR0_DSS_7BIT (6 << 0) /* data size select */ -#define SSP_CR0_DSS_8BIT (7 << 0) /* data size select */ -#define SSP_CR0_DSS_9BIT (8 << 0) /* data size select */ -#define SSP_CR0_DSS_10BIT (9 << 0) /* data size select */ -#define SSP_CR0_DSS_11BIT (10 << 0) /* data size select */ -#define SSP_CR0_DSS_12BIT (11 << 0) /* data size select */ -#define SSP_CR0_DSS_13BIT (13 << 0) /* data size select */ -#define SSP_CR0_DSS_14BIT (14 << 0) /* data size select */ -#define SSP_CR0_DSS_15BIT (15 << 0) /* data size select */ -#define SSP_CR0_DSS_16BIT (16 << 0) /* data size select */ -#define SSP_CR0_FRF_SPI (0 << 4) /* SPI frame format */ -#define SSP_CR0_FRF_TI (1 << 4) /* TI frame format */ -#define SSP_CR0_FRF_MICROWIRE (2 << 4) /* Microwire frame format */ -#define SSP_CR0_CPOL (1 << 6) /* */ -#define SSP_CR0_CPHA (1 << 7) /* */ -#define SSP_CR0_SCR(val) (((val) & 0xff) << 8) - -#define SSP_CR1_LBM (1 << 0) -#define SSP_CR1_SSE (1 << 1) -#define SSP_CR1_MS_MASTER (0 << 2) -#define SSP_CR1_MS_SLAVE (1 << 2) -#define SSP_CR1_SOD (1 << 3) /* slave output disable */ - -#define SSP_CPSR_CPSDVSR(val) ((val) & 0xff) - -#define SSP_SR_TFE (1 << 0) /* transmit FIFO empty */ -#define SSP_SR_TNF (1 << 1) /* transmit FIFO not full */ -#define SSP_SR_RNE (1 << 2) /* receive FIFO not empty */ -#define SSP_SR_RFF (1 << 3) /* receive FIFO full */ -#define SSP_SR_BSY (1 << 4) /* busy */ -/* Interrupt Mask Set/Clear Register */ -#define SSP_IMSC_RORIM (1 << 0) /* receive overrun */ -#define SSP_IMSC_RTIM (1 << 1) /* receive timeout */ -#define SSP_IMSC_RXIM (1 << 2) /* RX FIFO half full */ -#define SSP_IMSC_TXIM (1 << 3) /* TX FIFO half empty */ -/* Raw Interrupt Status Register */ -#define SSP_RIS_RORRIS (1 << 0) /* receive overrun */ -#define SSP_RIS_RTRIS (1 << 1) /* receive timeout */ -#define SSP_RIS_RXRIS (1 << 2) /* RX FIFO half full */ -#define SSP_RIS_TXRIS (1 << 3) /* TX FIFO half empty */ -/* Interrupt Clear Register */ -#define SSP_ICR_RORIC (1 << 0) /* receive overrun */ -#define SSP_ICR_RTIC (1 << 1) /* receive timeout */ -/* Masked Interrupt Status Register */ -#define SSP_MIS_RORMIS (1 << 0) /* receive overrun */ -#define SSP_MIS_RTMIS (1 << 1) /* receive timeout */ -#define SSP_MIS_RXMIS (1 << 2) /* RX FIFO half full */ -#define SSP_MIS_TXMIS (1 << 3) /* TX FIFO half empty */ - -#endif - -//#define PCONP_PCPWM1 (1 << 6) -//#define PCONP_SSP1 (1 << 10) -//#define PCONP_PCMCPWM (1 << 17) -//#define PCONP_SSP0 (1 << 21) -//#define PCONP_PCENET (1 << 30) -//#define PCONP_PCUSB (1 << 31) -// -///* -// * TIM0/1/2/3 bits -// */ -// -///* -// * PWM, MCPWM bits -// */ -//#define PWM1_TCR_COUNTERENABLE (1 << 0) -//#define PWM1_TCR_COUNTERRESET (1 << 1) -//#define PWM1_TCR_PWMENABLE (1 << 3) -// -//#define PWM1_MCR_MR0I (1 << 0) -//#define PWM1_MCR_MR0R (1 << 1) -//#define PWM1_MCR_MR0S (1 << 2) -//#define PWM1_MCR_MR3I (1 << 9) -//#define PWM1_MCR_MR3R (1 << 10) -//#define PWM1_MCR_MR3S (1 << 11) -// -//#define PWM1_PCR_SEL2 (1 << 2) -//#define PWM1_PCR_SEL3 (1 << 3) -//#define PWM1_PCR_SEL4 (1 << 4) -//#define PWM1_PCR_SEL5 (1 << 5) -//#define PWM1_PCR_SEL6 (1 << 6) -// -//#define PWM1_PCR_ENA1 (1 << 9) -//#define PWM1_PCR_ENA2 (1 << 10) -//#define PWM1_PCR_ENA3 (1 << 11) -//#define PWM1_PCR_ENA4 (1 << 12) -//#define PWM1_PCR_ENA5 (1 << 13) -//#define PWM1_PCR_ENA6 (1 << 14) -// -//#define PWM1_LER_LATCH0 (1 << 0) -//#define PWM1_LER_LATCH1 (1 << 1) -//#define PWM1_LER_LATCH2 (1 << 2) -//#define PWM1_LER_LATCH3 (1 << 3) -//#define PWM1_LER_LATCH4 (1 << 4) -//#define PWM1_LER_LATCH5 (1 << 5) -//#define PWM1_LER_LATCH6 (1 << 6) -// -//#define MCPWM_MCCON_RUN0 (1 << 0) -//#define MCPWM_MCCON_POLA0 (1 << 2) -//#define MCPWM_MCCON_RUN1 (1 << 8) -//#define MCPWM_MCCON_POLA1 (1 << 10) -//#define MCPWM_MCCON_RUN2 (1 << 16) -//#define MCPWM_MCCON_CENTER2 (1 << 17) -//#define MCPWM_MCCON_POLA2 (1 << 18) -//#define MCPWM_MCCON_DTE2 (1 << 19) -//#define MCPWM_MCCON_DISUP2 (1 << 20) -// - - DELETED firmware/lib/lpc17xx/clk_cfg.h Index: firmware/lib/lpc17xx/clk_cfg.h ================================================================== --- firmware/lib/lpc17xx/clk_cfg.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef CLOCK_CONFIG_H -#define CLOCK_CONFIG_H - -/* - * PLL_OUT = M * PLL_IN = Fcco / (2 * P) - * - * Fcco = PLL_OUT * 2 * P = PLL_IN * M * 2 * P - * - */ -#define CLK_PLL_IN ( 12 * 1000000) -#define CLK_PLL_OUT ( 96 * 1000000) - -#if (CLK_PLL_OUT % CLK_PLL_IN) - #error "CLK_PLL_OUT should me multiple of CLK_PLL_IN" -#endif - -#define CLK_M (CLK_PLL_OUT / CLK_PLL_IN) /* 1..32 */ -#define CLK_P 1 /* 1, 2, 4, 8 */ -#define CLK_FCCO (CLK_PLL_IN * CLK_M * 2 * CLK_P) - -#if (CLK_M < 1) || (CLK_M > 32) - #error "CLK_M should be in range 1..32" -#endif - -#if (CLK_FCCO < (156 * 1000000)) || (CLK_FCCO > (320 * 1000000)) -#error "check CLK_M and CLK_P for FCCO" -#endif - -#define CLK_CCLKDIV 1 /* 1..31 */ -#define CLK_PCLKDIV 4 /* 0..31 */ -#define CLK_EMCDIV 1 /* 1, 2 */ - -#define CLK_CCLK (CLK_PLL_OUT / CLK_CCLKDIV) -#define CLK_PCLK (CLK_CCLK / CLK_PCLKDIV) -#define CLK_EMC (CLK_CCLK / CLK_EMCDIV) - -#if (CLK_CCLK > 120000000) - #error "check CPU clock multiplier" -#endif - -/* - * PLL1 and USB clocks - */ -#define CLK_PLL1_OUT (48 * 1000000) -/* XXX M should be ceil */ -#define CLK_PLL1_M (CLK_PLL1_OUT / CLK_PLL_IN) /* 1..32 */ -#define CLK_PLL1_P 2 /* 1, 2, 4, 8 */ -#define CLK_PLL1_FCCO (CLK_PLL_IN * CLK_PLL1_M * 2 * CLK_PLL1_P) - -#if (CLK_PLL1_FCCO < (156 * 1000000)) || (CLK_PLL1_FCCO > (320 * 1000000)) -#error "check M and P for FCCO of PLL1" -#endif - -#define CLK_USBDIV 1 /* 1, 2 or 3 */ - -#define CLK_USB (CLK_PLL1_OUT / CLK_USBDIV) - -#if (CLK_USB != (48 * 1000000)) -#error "USB clock != 48 MHz" -#endif - -#endif - DELETED firmware/lib/lpc17xx/cm3.h Index: firmware/lib/lpc17xx/cm3.h ================================================================== --- firmware/lib/lpc17xx/cm3.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef CM3_WRAP_H -#define CM3_WRAP_H - -#include - -#endif - DELETED firmware/lib/lpc17xx/core_cm3.h Index: firmware/lib/lpc17xx/core_cm3.h ================================================================== --- firmware/lib/lpc17xx/core_cm3.h +++ /dev/null @@ -1,1847 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V1.30 - * @date 30. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup CMSIS_CM3_core_LintCinfiguration CMSIS CM3 Core Lint Configuration - * - * List of Lint messages which will be suppressed and not shown: - * - Error 10: \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' - * . - * - Error 530: \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized - * . - * - Error 550: \n - * __regBasePri = (basePri & 0x1ff); \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed - * . - * - Error 754: \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced - * . - * - Error 750: \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced - * . - * - Error 528: \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced - * . - * - Error 751: \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced - * . - * Note: To re-enable a Message, insert a space before 'lint' * - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -/** @addtogroup CMSIS_CM3_core_definitions CMSIS CM3 Core Definitions - This file defines all structures and symbols for CMSIS core: - - CMSIS version number - - Cortex-M core registers and bitfields - - Cortex-M core peripheral base address - @{ - */ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus - #define __I volatile /*!< defines 'read only' permissions */ -#else - #define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ -/** @addtogroup CMSIS_CM3_core_register CMSIS CM3 Core Register - @{ -*/ - - -/** @addtogroup CMSIS_CM3_NVIC CMSIS CM3 NVIC - memory mapped structure for Nested Vectored Interrupt Controller (NVIC) - @{ - */ -/** @brief Nested Vectored Interrupt Controller (NVIC) register structure definition */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Offset: 0x000 Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Offset: 0x080 Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Offset: 0x100 Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Offset: 0x180 Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Offset: 0x200 Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Offset: 0x300 Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Offset: 0xE00 Software Trigger Interrupt Register */ -} NVIC_Type; -/*@}*/ /* end of group CMSIS_CM3_NVIC */ - - -/** @addtogroup CMSIS_CM3_SCB CMSIS CM3 SCB - memory mapped structure for System Control Block (SCB) - @{ - */ -/** @brief System Control Block (SCB) register structure definition */ -typedef struct -{ - __I uint32_t CPUID; /*!< Offset: 0x00 CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Offset: 0x04 Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Offset: 0x08 Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Offset: 0x0C Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< Offset: 0x10 System Control Register */ - __IO uint32_t CCR; /*!< Offset: 0x14 Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< Offset: 0x18 System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< Offset: 0x24 System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Offset: 0x28 Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Offset: 0x2C Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Offset: 0x30 Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Offset: 0x34 Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Offset: 0x38 Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Offset: 0x3C Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Offset: 0x40 Processor Feature Register */ - __I uint32_t DFR; /*!< Offset: 0x48 Debug Feature Register */ - __I uint32_t ADR; /*!< Offset: 0x4C Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Offset: 0x50 Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< Offset: 0x60 ISA Feature Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Registers Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Registers Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */ -/*@}*/ /* end of group CMSIS_CM3_SCB */ - - -/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick - memory mapped structure for SysTick - @{ - */ -/** @brief System Tick Timer (SysTick) register structure definition */ -typedef struct -{ - __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */ - __IO uint32_t RELOAD; /*!< Offset: 0x04 SysTick Reload Value Register */ - __IO uint32_t CURR; /*!< Offset: 0x08 SysTick Current Value Register */ - __IO uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */ -/*@}*/ /* end of group CMSIS_CM3_SysTick */ - - -/** @addtogroup CMSIS_CM3_ITM CMSIS CM3 ITM - memory mapped structure for Instrumentation Trace Macrocell (ITM) - @{ - */ -/** @brief Instrumentation Trace Macrocell (ITM) register structure definition */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< Offset: ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< Offset: ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< Offset: ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< Offset: 0x00 ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< Offset: ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< Offset: ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< Offset: ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< Offset: ITM Integration Write Register */ - __IO uint32_t IRR; /*!< Offset: ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< Offset: ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< Offset: ITM Lock Access Register */ - __IO uint32_t LSR; /*!< Offset: ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< Offset: ITM Peripheral Identification Register #4 */ - __I uint32_t PID5; /*!< Offset: ITM Peripheral Identification Register #5 */ - __I uint32_t PID6; /*!< Offset: ITM Peripheral Identification Register #6 */ - __I uint32_t PID7; /*!< Offset: ITM Peripheral Identification Register #7 */ - __I uint32_t PID0; /*!< Offset: ITM Peripheral Identification Register #0 */ - __I uint32_t PID1; /*!< Offset: ITM Peripheral Identification Register #1 */ - __I uint32_t PID2; /*!< Offset: ITM Peripheral Identification Register #2 */ - __I uint32_t PID3; /*!< Offset: ITM Peripheral Identification Register #3 */ - __I uint32_t CID0; /*!< Offset: ITM Component Identification Register #0 */ - __I uint32_t CID1; /*!< Offset: ITM Component Identification Register #1 */ - __I uint32_t CID2; /*!< Offset: ITM Component Identification Register #2 */ - __I uint32_t CID3; /*!< Offset: ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_ATBID_Pos 16 /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */ -/*@}*/ /* end of group CMSIS_CM3_ITM */ - - -/** @addtogroup CMSIS_CM3_InterruptType CMSIS CM3 Interrupt Type - memory mapped structure for Interrupt Type - @{ - */ -/** @brief Instrumentation Trace Macrocell (ITM) register structure definition */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Offset: 0x04 Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Offset: 0x08 Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - -/* Interrupt Controller Type Register Definitions */ -#define InterruptType_ICTR_INTLINESNUM_Pos 0 /*!< InterruptType ICTR: INTLINESNUM Position */ -#define InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos) /*!< InterruptType ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define InterruptType_ACTLR_DISFOLD_Pos 2 /*!< InterruptType ACTLR: DISFOLD Position */ -#define InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos) /*!< InterruptType ACTLR: DISFOLD Mask */ - -#define InterruptType_ACTLR_DISDEFWBUF_Pos 1 /*!< InterruptType ACTLR: DISDEFWBUF Position */ -#define InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos) /*!< InterruptType ACTLR: DISDEFWBUF Mask */ - -#define InterruptType_ACTLR_DISMCYCINT_Pos 0 /*!< InterruptType ACTLR: DISMCYCINT Position */ -#define InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos) /*!< InterruptType ACTLR: DISMCYCINT Mask */ -/*@}*/ /* end of group CMSIS_CM3_InterruptType */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -/** @addtogroup CMSIS_CM3_MPU CMSIS CM3 MPU - memory mapped structure for Memory Protection Unit (MPU) - @{ - */ -/** @brief Memory Protection Unit (MPU) register structure definition */ -typedef struct -{ - __I uint32_t TYPE; /*!< Offset: 0x00 MPU Type Register */ - __IO uint32_t CTRL; /*!< Offset: 0x04 MPU Control Register */ - __IO uint32_t RNR; /*!< Offset: 0x08 MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< Offset: 0x0C MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< Offset: 0x10 MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< Offset: 0x14 MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< Offset: 0x18 MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< Offset: 0x1C MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< Offset: 0x20 MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< Offset: 0x24 MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< Offset: 0x28 MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register */ -#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFul << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFul << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1ul << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register */ -#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1ul << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1ul << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1ul << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register */ -#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFul << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register */ -#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFul << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1ul << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFul << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register */ -#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: XN Position */ -#define MPU_RASR_XN_Msk (1ul << MPU_RASR_XN_Pos) /*!< MPU RASR: XN Mask */ - -#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: AP Position */ -#define MPU_RASR_AP_Msk (7ul << MPU_RASR_AP_Pos) /*!< MPU RASR: AP Mask */ - -#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: TEX Position */ -#define MPU_RASR_TEX_Msk (7ul << MPU_RASR_TEX_Pos) /*!< MPU RASR: TEX Mask */ - -#define MPU_RASR_S_Pos 18 /*!< MPU RASR: Shareable bit Position */ -#define MPU_RASR_S_Msk (1ul << MPU_RASR_S_Pos) /*!< MPU RASR: Shareable bit Mask */ - -#define MPU_RASR_C_Pos 17 /*!< MPU RASR: Cacheable bit Position */ -#define MPU_RASR_C_Msk (1ul << MPU_RASR_C_Pos) /*!< MPU RASR: Cacheable bit Mask */ - -#define MPU_RASR_B_Pos 16 /*!< MPU RASR: Bufferable bit Position */ -#define MPU_RASR_B_Msk (1ul << MPU_RASR_B_Pos) /*!< MPU RASR: Bufferable bit Mask */ - -#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFul << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1Ful << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENA_Pos 0 /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENA_Msk (0x1Ful << MPU_RASR_ENA_Pos) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@}*/ /* end of group CMSIS_CM3_MPU */ -#endif - - -/** @addtogroup CMSIS_CM3_CoreDebug CMSIS CM3 Core Debug - memory mapped structure for Core Debug Register - @{ - */ -/** @brief Core Debug register structure definition */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Offset: 0x00 Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Offset: 0x04 Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Offset: 0x08 Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Offset: 0x0C Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register */ -#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register */ -#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ -/*@}*/ /* end of group CMSIS_CM3_CoreDebug */ - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_register */ - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xff); -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit values) - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit value - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - -/** @addtogroup CMSIS_CM3_Core_FunctionInterface CMSIS CM3 Core Function Interface - Core Function Interface containing: - - Core NVIC Functions - - Core SysTick Functions - - Core Reset Functions -*/ -/*@{*/ - - -/* ########################## NVIC functions #################################### */ - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param PriorityGroup is priority grouping field - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ - reg_value = (reg_value | - (0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @return priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn The positive number of the external interrupt to enable - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn The positive number of the external interrupt to disable - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn The number of the device specifc interrupt - * @return 1 = interrupt pending, 0 = interrupt not pending - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for set pending - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for clear pending - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn The number of the interrupt for read active bit - * @return 1 = interrupt active, 0 = interrupt not active - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn The number of the interrupt for set priority - * @param priority The priority to set - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/* XXX */ -static __INLINE void NVIC_SetPriorityRaw(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - /* set Priority for Cortex-M3 System Interrupts */ - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = priority; - } - else { - /* set Priority for device specific Interrupts */ - NVIC->IP[(uint32_t)(IRQn)] = priority; - } -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn The number of the interrupt for get priority - * @return The priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param PriorityGroup The used priority group - * @param PreemptPriority The preemptive priority value (starting from 0) - * @param SubPriority The sub priority value (starting from 0) - * @return The encoded priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param Priority The priority for the interrupt - * @param PriorityGroup The used priority group - * @param pPreemptPriority The preemptive priority value (starting from 0) - * @param pSubPriority The sub priority value (starting from 0) - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param ticks number of ticks between two interrupts - * @return 1 = failed, 0 = successful - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */ - - SysTick->RELOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->CURR = 0; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0); /* Function successful */ -} - -#endif - - - - -/* ################################## Reset function ############################################ */ - -/** - * @brief Initiate a system reset request. - * - * Initiate a system reset request to reset the MCU - */ -static __INLINE void NVIC_SystemReset(void) -{ - SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - while(1); /* wait until reset */ -} - -/*@}*/ /* end of group CMSIS_CM3_Core_FunctionInterface */ - - - -/* ##################################### Debug In/Output function ########################################### */ - -/** @addtogroup CMSIS_CM3_CoreDebugInterface CMSIS CM3 Core Debug Interface - Core Debug Interface containing: - - Core Debug Receive / Transmit Functions - - Core Debug Defines - - Core Debug Variables -*/ -/*@{*/ - -extern volatile int ITM_RxBuffer; /*!< variable to receive characters */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */ - - -/** - * @brief Outputs a character via the ITM channel 0 - * - * @param ch character to output - * @return character to output - * - * The function outputs a character via the ITM channel 0. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */ - (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ - (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - - -/** - * @brief Inputs a character via variable ITM_RxBuffer - * - * @return received character, -1 = no character received - * - * The function inputs a character via variable ITM_RxBuffer. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE int ITM_ReceiveChar (void) { - int ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - * @brief Check if a character via variable ITM_RxBuffer is available - * - * @return 1 = character available, 0 = no character available - * - * The function checks variable ITM_RxBuffer whether a character is available or not. - * The function returns '1' if a character is available and '0' if no character is available. - */ -static __INLINE int ITM_CheckChar (void) { - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { - return (0); /* no character available */ - } else { - return (1); /* character available */ - } -} - -/*@}*/ /* end of group CMSIS_CM3_core_DebugInterface */ - - -#ifdef __cplusplus -} -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_definitions */ - -#endif /* __CM3_CORE_H__ */ - - /** - * @} - */ - -/*lint -restore */ DELETED firmware/lib/lpc17xx/system_LPC177x_8x.h Index: firmware/lib/lpc17xx/system_LPC177x_8x.h ================================================================== --- firmware/lib/lpc17xx/system_LPC177x_8x.h +++ /dev/null @@ -1,251 +0,0 @@ -/****************************************************************************** - * @file: system_LPC177x_8x.h - * @purpose: CMSIS Cortex-M3 Device Peripheral Access Layer Header File - * for the NXP LPC177x_8x Device Series - * @version: V1.10 - * @date: 24. September 2010 - *---------------------------------------------------------------------------- - * - * @note - * Copyright (C) 2010 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __SYSTEM_LPC177x_8x_H -#define __SYSTEM_LPC177x_8x_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemCoreClock variable. - */ -extern void SystemInit (void); - -/** - * Update SystemCoreClock variable - * - * @param none - * @return none - * - * @brief Updates the SystemCoreClock with current core Clock - * retrieved from cpu registers. - */ -extern void SystemCoreClockUpdate (void); - -/* -//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -*/ -/*--------------------- Clock Configuration ---------------------------------- -// -// Clock Configuration -// System Controls and Status Register (SCS) -// EMC_SHIFT: EMC Shift enable -// <0=> Static CS addresses match bus width; AD[1] = 0 for 32 bit, AD[0] = 0 for 16+32 bit -// <1=> Static CS addresses start at LSB 0 regardless of memory width -// EMC_RESET: EMC Reset disable -// <0=> EMC will be reset by any chip reset -// <1=> Portions of EMC will only be reset by POR or BOR -// EMC_BURST: EMC Burst disable -// MCIPWR_LEVEL: SD card interface signal SD_PWR Active Level selection -// <0=> SD_PWR is active low -// <1=> SD_PWR is active high -// OSCRANGE: Main Oscillator Range Select -// <0=> 1 MHz to 20 MHz -// <1=> 15 MHz to 25 MHz -// OSCEN: Main Oscillator enable -// -// -// Clock Source Select Register (CLKSRCSEL) -// CLKSRC: sysclk and PLL0 clock source selection -// <0=> Internal RC oscillator -// <1=> Main oscillator -// -// -// PLL0 Configuration (Main PLL) -// PLL0 Configuration Register (PLL0CFG) -// PLL out clock = (F_cco / (2 * P)) -// F_cco = (F_in * M * 2 * P) -// F_in must be in the range of 1 MHz to 25 MHz -// F_cco must be in the range of 9.75 MHz to 160 MHz -// M: PLL Multiplier Selection -// M Value -// <1-32><#-1> -// P: PLL Divider Selection -// P Value -// <0=> 1 -// <1=> 2 -// <2=> 4 -// <3=> 8 -// -// -// -// PLL1 Configuration (Alt PLL) -// PLL1 Configuration Register (PLL1CFG) -// PLL out clock = (F_cco / (2 * P)) -// F_cco = (F_in * M * 2 * P) -// F_in must be in the range of 1 MHz to 25 MHz -// F_cco must be in the range of 9.75 MHz to 160 MHz -// M: PLL Multiplier Selection -// M Value -// <1-32><#-1> -// P: PLL Divider Selection -// P Value -// <0=> 1 -// <1=> 2 -// <2=> 4 -// <3=> 8 -// -// -// -// CPU Clock Selection Register (CCLKSEL) -// CCLKDIV: CPU clock (CCLK) divider -// 0: The divider is turned off. No clock will be provided to the CPU -// n: The input clock is divided by n to produce the CPU clock -// <0-31> -// CCLKSEL: CPU clock divider input clock selection -// <0=> sysclk clock -// <1=> PLL0 clock -// -// -// USB Clock Selection Register (USBCLKSEL) -// USBDIV: USB clock (source PLL0) divider selection -// <0=> USB clock off -// <4=> PLL0 / 4 (PLL0 must be 192Mhz) -// <6=> PLL0 / 6 (PLL0 must be 288Mhz) -// USBSEL: USB clock divider input clock selection -// When CPU clock is selected, the USB can be accessed -// by software but cannot perform USB functions -// <0=> CPU clock -// <1=> PLL0 clock -// <2=> PLL1 clock -// -// -// EMC Clock Selection Register (EMCCLKSEL) -// EMCDIV: EMC clock selection -// <0=> CPU clock -// <1=> CPU clock / 2 -// -// -// Peripheral Clock Selection Register (PCLKSEL) -// PCLKDIV: APB Peripheral clock divider -// 0: The divider is turned off. No clock will be provided to APB peripherals -// n: The input clock is divided by n to produce the APB peripheral clock -// <0-31> -// -// -// Power Control for Peripherals Register (PCONP) -// PCLCD: LCD controller power/clock enable -// PCTIM0: Timer/Counter 0 power/clock enable -// PCTIM1: Timer/Counter 1 power/clock enable -// PCUART0: UART 0 power/clock enable -// PCUART1: UART 1 power/clock enable -// PCPWM0: PWM0 power/clock enable -// PCPWM1: PWM1 power/clock enable -// PCI2C0: I2C 0 interface power/clock enable -// PCUART4: UART 4 power/clock enable -// PCRTC: RTC and Event Recorder power/clock enable -// PCSSP1: SSP 1 interface power/clock enable -// PCEMC: External Memory Controller power/clock enable -// PCADC: A/D converter power/clock enable -// PCCAN1: CAN controller 1 power/clock enable -// PCCAN2: CAN controller 2 power/clock enable -// PCGPIO: IOCON, GPIO, and GPIO interrupts power/clock enable -// PCSPIFI: SPI Flash Interface power/clock enable -// PCMCPWM: Motor Control PWM power/clock enable -// PCQEI: Quadrature encoder interface power/clock enable -// PCI2C1: I2C 1 interface power/clock enable -// PCSSP2: SSP 2 interface power/clock enable -// PCSSP0: SSP 0 interface power/clock enable -// PCTIM2: Timer 2 power/clock enable -// PCTIM3: Timer 3 power/clock enable -// PCUART2: UART 2 power/clock enable -// PCUART3: UART 3 power/clock enable -// PCI2C2: I2C 2 interface power/clock enable -// PCI2S: I2S interface power/clock enable -// PCSDC: SD Card interface power/clock enable -// PCGPDMA: GPDMA function power/clock enable -// PCENET: Ethernet block power/clock enable -// PCUSB: USB interface power/clock enable -// -// -// Clock Output Configuration Register (CLKOUTCFG) -// CLKOUTSEL: Clock Source for CLKOUT Selection -// <0=> CPU clock -// <1=> Main Oscillator -// <2=> Internal RC Oscillator -// <3=> USB clock -// <4=> RTC Oscillator -// <5=> SPIFI clock -// <6=> Watchdog Oscillator -// CLKOUTDIV: Output Clock Divider -// <1-16><#-1> -// CLKOUT_EN: CLKOUT enable -// -// -// -*/ -#define CLOCK_SETUP 1 -#define SCS_Val 0x00000021 -#define CLKSRCSEL_Val 0x00000001 -#define PLL0_SETUP 1 -#define PLL0CFG_Val 0x00000009 -#define PLL1_SETUP 1 -#define PLL1CFG_Val 0x00000023 -#define CCLKSEL_Val 0x00000101 -#define USBCLKSEL_Val 0x00000200 -#define EMCCLKSEL_Val 0x00000001 -#define PCLKSEL_Val 0x00000002 -#define PCONP_Val 0x04288FDE -#define CLKOUTCFG_Val 0x00000000 - - -/*--------------------- Flash Accelerator Configuration ---------------------- -// -// Flash Accelerator Configuration -// FLASHTIM: Flash Access Time -// <0=> 1 CPU clock (for CPU clock up to 20 MHz) -// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) -// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) -// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) -// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) -// <5=> 6 CPU clocks (for any CPU clock) -// -*/ -#define FLASH_SETUP 1 -#define FLASHCFG_Val 0x00005000 - -/* -//-------- <<< end of configuration section >>> ------------------------------ -*/ - -#ifdef __cplusplus -} -#endif - -#endif /* __SYSTEM_LPC177x_8x_H */ DELETED firmware/lib/lpc17xx/types.h Index: firmware/lib/lpc17xx/types.h ================================================================== --- firmware/lib/lpc17xx/types.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef TYPES_H -#define TYPES_H - -typedef unsigned char uint8; -typedef signed char int8; -typedef unsigned short uint16; -typedef signed short int16; -typedef unsigned int uint32; -typedef signed int int32; -typedef unsigned long long int uint64; -typedef signed long long int int64; - -#define BASE_TYPE int32 - -#define BASE_TYPE_MAX 0xffffffff - -#define MIN_INT16 (-32768) -#define MAX_INT16 (32767) - -#define TRUE 1 -#define FALSE 0 - -#ifndef NULL -#define NULL ((void*)0) -#endif - -#endif - DELETED firmware/lib/misc/Makefile Index: firmware/lib/misc/Makefile ================================================================== --- firmware/lib/misc/Makefile +++ /dev/null @@ -1,70 +0,0 @@ -################################################################################ -# -# Generic library for LPC177x and LPC178x based devices -# -################################################################################ -ROOT_DIR = ../.. - -################################# -# -# Tools config -# -################################# -SCRIPTS_PATH = $(ROOT_DIR)/$(UTIL_PATH) - -include $(ROOT_DIR)/tcl.mk - -################################# -# -# Compiller flags -# -################################# -CFLAGS += -O2 -CFLAGS += -I$(ROOT_DIR)/lib/lpc17xx - -################################# -# -# Objects to build -# -################################# -TARGET = libmisc.a - -DEPFILE = depfile.mk - -SRC_DIR = src - -C_FILES += $(SRC_DIR)/util.c -C_FILES += $(SRC_DIR)/debug.c -C_FILES += $(SRC_DIR)/crc32.c -C_FILES += $(SRC_DIR)/crc16.c -C_FILES += $(SRC_DIR)/crc8.c -C_FILES += $(SRC_DIR)/crc7.c -C_FILES += $(SRC_DIR)/pearson.c - -C_OBJS = $(foreach obj,$(C_FILES),$(patsubst %c,%o, $(obj))) -AS_OBJS = $(foreach obj,$(AS_FILES),$(patsubst %s,%o, $(obj))) -OBJS += $(AS_OBJS) -OBJS += $(C_OBJS) - -################################# -# -# Build rules -# -################################# - -.PHONY: all -all: $(TARGET) - --include $(DEPFILE) - -depend: $(C_FILES) - $(CC) $(CFLAGS) -M $(C_FILES) > $(DEPFILE) - $(TCL_SHELL) $(SCRIPTS_PATH)/depdir.tcl $(DEPFILE) $(C_OBJS) - -$(TARGET): $(OBJS) - $(AR) r $@ $^ - -.PHONY: clean -clean: - $(RM) $(OBJS) $(TARGET) - DELETED firmware/lib/misc/src/crc.h Index: firmware/lib/misc/src/crc.h ================================================================== --- firmware/lib/misc/src/crc.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef CRC_HEADER_FILE -#define CRC_HEADER_FILE - -#include - -#include "crc7.h" -#include "crc8.h" -#include "crc16.h" -#include "crc32.h" - -#endif - DELETED firmware/lib/misc/src/crc16.c Index: firmware/lib/misc/src/crc16.c ================================================================== --- firmware/lib/misc/src/crc16.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - --------------------------------------------------------------------------- - Copyright (c) 2003, Dominik Reichl , Germany. - All rights reserved. - - Distributed under the terms of the GNU General Public License v2. - - This software is provided 'as is' with no explicit or implied warranties - in respect of its properties, including, but not limited to, correctness - and/or fitness for purpose. - --------------------------------------------------------------------------- - */ - -#include "crc16.h" - -static const unsigned short crc16tab[] = /* CRC lookup table */ -{ - 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, - 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, - 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, - 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, - 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, - 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, - 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, - 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, - 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, - 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441, - 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, - 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840, - 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, - 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40, - 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640, - 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041, - 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240, - 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441, - 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, - 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840, - 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, - 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40, - 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640, - 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041, - 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241, - 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440, - 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40, - 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841, - 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, - 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41, - 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, - 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 -}; - -void crc16_init(unsigned short *uCrc16) -{ - *uCrc16 = 0xFFFF; -} - -void crc16_update(unsigned short *uCrc16, unsigned char *pBuffer, unsigned long uBufSize) -{ - unsigned long i = 0; - - for(i = 0; i < uBufSize; i++) - *uCrc16 = (*uCrc16 >> 8) ^ crc16tab[(*uCrc16 ^ *pBuffer++) & 0xFF]; -} - -void crc16_final(unsigned short *uCrc16) -{ - *uCrc16 = ~(*uCrc16); -} - -void crc16ccitt_init(unsigned short *uCcitt16) -{ - *uCcitt16 = 0xFFFF; -} - -void crc16ccitt_update(unsigned short *uCcitt16, unsigned char *pBuffer, unsigned long uBufSize) -{ - unsigned int i = 0; - - for(i = 0; i < uBufSize; i++) - { - *uCcitt16 = (*uCcitt16 >> 8) | (*uCcitt16 << 8); - *uCcitt16 ^= pBuffer[i]; - *uCcitt16 ^= (*uCcitt16 & 0xFF) >> 4; - *uCcitt16 ^= (*uCcitt16 << 8) << 4; - *uCcitt16 ^= ((*uCcitt16 & 0xFF) << 4) << 1; - } -} - -void crc16ccitt_final(unsigned short *uCcitt16) -{ - *uCcitt16 = ~(*uCcitt16); -} DELETED firmware/lib/misc/src/crc16.h Index: firmware/lib/misc/src/crc16.h ================================================================== --- firmware/lib/misc/src/crc16.h +++ /dev/null @@ -1,26 +0,0 @@ -/* ---------------------------------------------------------------------------- -Copyright (c) 2003, Dominik Reichl , Germany. -All rights reserved. - -Distributed under the terms of the GNU General Public License v2. - -This software is provided 'as is' with no explicit or implied warranties -in respect of its properties, including, but not limited to, correctness -and/or fitness for purpose. ---------------------------------------------------------------------------- -*/ - -#ifndef ___CRC16_H___ -#define ___CRC16_H___ - -void crc16_init(unsigned short *uCrc16); -void crc16_update(unsigned short *uCrc16, unsigned char *pBuffer, unsigned long uBufSize); -void crc16_final(unsigned short *uCrc16); - -void crc16ccitt_init(unsigned short *uCcitt16); -void crc16ccitt_update(unsigned short *uCcitt16, unsigned char *pBuffer, unsigned long uBufSize); -void crc16ccitt_final(unsigned short *uCcitt16); - -#endif // ___CRC16_H___ - DELETED firmware/lib/misc/src/crc32.c Index: firmware/lib/misc/src/crc32.c ================================================================== --- firmware/lib/misc/src/crc32.c +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or - * code or tables extracted from it, as desired without restriction. - * - * First, the polynomial itself and its table of feedback terms. The - * polynomial is - * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 - * - * Note that we take it "backwards" and put the highest-order term in - * the lowest-order bit. The X^32 term is "implied"; the LSB is the - * X^31 term, etc. The X^0 term (usually shown as "+1") results in - * the MSB being 1 - * - * Note that the usual hardware shift register implementation, which - * is what we're using (we're merely optimizing it by doing eight-bit - * chunks at a time) shifts bits into the lowest-order term. In our - * implementation, that means shifting towards the right. Why do we - * do it this way? Because the calculated CRC must be transmitted in - * order from highest-order term to lowest-order term. UARTs transmit - * characters in order from LSB to MSB. By storing the CRC this way - * we hand it to the UART in the order low-byte to high-byte; the UART - * sends each low-bit to hight-bit; and the result is transmission bit - * by bit from highest- to lowest-order term without requiring any bit - * shuffling on our part. Reception works similarly - * - * The feedback terms table consists of 256, 32-bit entries. Notes - * - * The table can be generated at runtime if desired; code to do so - * is shown later. It might not be obvious, but the feedback - * terms simply represent the results of eight shift/xor opera - * tions for all combinations of data and CRC register values - * - * The values must be right-shifted by eight bits by the "updcrc - * logic; the shift must be unsigned (bring in zeroes). On some - * hardware you could probably optimize the shift in assembler by - * using byte-swap instructions - * polynomial $edb88320 - * - * - * CRC32 code derived from work by Gary S. Brown. - */ -#include - -static uint32 crc32_tab[] = { - 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, - 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, - 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2, - 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, - 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, - 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, - 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, - 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, - 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, - 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, - 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106, - 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, - 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, - 0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, - 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, - 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, - 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, - 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, - 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, - 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, - 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, - 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, - 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84, - 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, - 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, - 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, - 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e, - 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, - 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, - 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, - 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, - 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, - 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, - 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, - 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, - 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, - 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, - 0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, - 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, - 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, - 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, - 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, - 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d -}; - -/* - * - */ -uint32 crc32(uint32 crc, uint8 *buf, uint32 size) -{ - uint8 *p; - - p = buf; - crc ^= 0xffffffff; - - while (size--) - crc = crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8); - - return (crc ^ 0xffffffff); -} - DELETED firmware/lib/misc/src/crc32.h Index: firmware/lib/misc/src/crc32.h ================================================================== --- firmware/lib/misc/src/crc32.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef CRC32_H -#define CRC32_H - -uint32 crc32(uint32 crc, uint8 *buf, uint32 size); - -#endif - DELETED firmware/lib/misc/src/crc7.c Index: firmware/lib/misc/src/crc7.c ================================================================== --- firmware/lib/misc/src/crc7.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * crc8.c - * - * Computes a 8-bit CRC - * - */ - -static const unsigned char crc7_table[] = { - /* - * x^7 + x^3 + 1 - */ - 0x00, 0x09, 0x12, 0x1B, 0x24, 0x2D, 0x36, 0x3F, - 0x48, 0x41, 0x5A, 0x53, 0x6C, 0x65, 0x7E, 0x77, - 0x19, 0x10, 0x0B, 0x02, 0x3D, 0x34, 0x2F, 0x26, - 0x51, 0x58, 0x43, 0x4A, 0x75, 0x7C, 0x67, 0x6E, - 0x32, 0x3B, 0x20, 0x29, 0x16, 0x1F, 0x04, 0x0D, - 0x7A, 0x73, 0x68, 0x61, 0x5E, 0x57, 0x4C, 0x45, - 0x2B, 0x22, 0x39, 0x30, 0x0F, 0x06, 0x1D, 0x14, - 0x63, 0x6A, 0x71, 0x78, 0x47, 0x4E, 0x55, 0x5C, - 0x64, 0x6D, 0x76, 0x7F, 0x40, 0x49, 0x52, 0x5B, - 0x2C, 0x25, 0x3E, 0x37, 0x08, 0x01, 0x1A, 0x13, - 0x7D, 0x74, 0x6F, 0x66, 0x59, 0x50, 0x4B, 0x42, - 0x35, 0x3C, 0x27, 0x2E, 0x11, 0x18, 0x03, 0x0A, - 0x56, 0x5F, 0x44, 0x4D, 0x72, 0x7B, 0x60, 0x69, - 0x1E, 0x17, 0x0C, 0x05, 0x3A, 0x33, 0x28, 0x21, - 0x4F, 0x46, 0x5D, 0x54, 0x6B, 0x62, 0x79, 0x70, - 0x07, 0x0E, 0x15, 0x1C, 0x23, 0x2A, 0x31, 0x38, - 0x41, 0x48, 0x53, 0x5A, 0x65, 0x6C, 0x77, 0x7E, - 0x09, 0x00, 0x1B, 0x12, 0x2D, 0x24, 0x3F, 0x36, - 0x58, 0x51, 0x4A, 0x43, 0x7C, 0x75, 0x6E, 0x67, - 0x10, 0x19, 0x02, 0x0B, 0x34, 0x3D, 0x26, 0x2F, - 0x73, 0x7A, 0x61, 0x68, 0x57, 0x5E, 0x45, 0x4C, - 0x3B, 0x32, 0x29, 0x20, 0x1F, 0x16, 0x0D, 0x04, - 0x6A, 0x63, 0x78, 0x71, 0x4E, 0x47, 0x5C, 0x55, - 0x22, 0x2B, 0x30, 0x39, 0x06, 0x0F, 0x14, 0x1D, - 0x25, 0x2C, 0x37, 0x3E, 0x01, 0x08, 0x13, 0x1A, - 0x6D, 0x64, 0x7F, 0x76, 0x49, 0x40, 0x5B, 0x52, - 0x3C, 0x35, 0x2E, 0x27, 0x18, 0x11, 0x0A, 0x03, - 0x74, 0x7D, 0x66, 0x6F, 0x50, 0x59, 0x42, 0x4B, - 0x17, 0x1E, 0x05, 0x0C, 0x33, 0x3A, 0x21, 0x28, - 0x5F, 0x56, 0x4D, 0x44, 0x7B, 0x72, 0x69, 0x60, - 0x0E, 0x07, 0x1C, 0x15, 0x2A, 0x23, 0x38, 0x31, - 0x46, 0x4F, 0x54, 0x5D, 0x62, 0x6B, 0x70, 0x79, -}; - -/* - * - */ -void crc7_init(unsigned char *crc) -{ - *crc = 0xff; -} - -/* - * - */ -void crc7_update(unsigned char *crc, unsigned char *buf, int len) -{ - while (len--) - *crc = crc7_table[(*crc << 1) ^ *buf++]; -} - -/* - * - */ -void crc7_final(unsigned char *crc) -{ - *crc ^= 0xff; -} - DELETED firmware/lib/misc/src/crc7.h Index: firmware/lib/misc/src/crc7.h ================================================================== --- firmware/lib/misc/src/crc7.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _CRC_7_H -#define _CRC_7_H - -void crc7_update(unsigned char *crc, unsigned char *buf, int len); - -#endif /* !_CRC_7_H */ - DELETED firmware/lib/misc/src/crc8.c Index: firmware/lib/misc/src/crc8.c ================================================================== --- firmware/lib/misc/src/crc8.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * crc8.c - * - * Computes a 8-bit CRC - * - */ - -static const unsigned char crc8_table[] = { - /* - * x^8 + x^2 + x^1 + 1 , MSB bit first - * - * 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f - */ - 0x00, 0x31, 0x62, 0x53, 0xC4, 0xF5, 0xA6, 0x97, 0xB9, 0x88, 0xDB, 0xEA, 0x7D, 0x4C, 0x1F, 0x2E, /* 00 */ - 0x43, 0x72, 0x21, 0x10, 0x87, 0xB6, 0xE5, 0xD4, 0xFA, 0xCB, 0x98, 0xA9, 0x3E, 0x0F, 0x5C, 0x6D, /* 10 */ - 0x86, 0xB7, 0xE4, 0xD5, 0x42, 0x73, 0x20, 0x11, 0x3F, 0x0E, 0x5D, 0x6C, 0xFB, 0xCA, 0x99, 0xA8, /* 20 */ - 0xC5, 0xF4, 0xA7, 0x96, 0x01, 0x30, 0x63, 0x52, 0x7C, 0x4D, 0x1E, 0x2F, 0xB8, 0x89, 0xDA, 0xEB, /* 30 */ - 0x3D, 0x0C, 0x5F, 0x6E, 0xF9, 0xC8, 0x9B, 0xAA, 0x84, 0xB5, 0xE6, 0xD7, 0x40, 0x71, 0x22, 0x13, /* 40 */ - 0x7E, 0x4F, 0x1C, 0x2D, 0xBA, 0x8B, 0xD8, 0xE9, 0xC7, 0xF6, 0xA5, 0x94, 0x03, 0x32, 0x61, 0x50, /* 50 */ - 0xBB, 0x8A, 0xD9, 0xE8, 0x7F, 0x4E, 0x1D, 0x2C, 0x02, 0x33, 0x60, 0x51, 0xC6, 0xF7, 0xA4, 0x95, /* 60 */ - 0xF8, 0xC9, 0x9A, 0xAB, 0x3C, 0x0D, 0x5E, 0x6F, 0x41, 0x70, 0x23, 0x12, 0x85, 0xB4, 0xE7, 0xD6, /* 70 */ - 0x7A, 0x4B, 0x18, 0x29, 0xBE, 0x8F, 0xDC, 0xED, 0xC3, 0xF2, 0xA1, 0x90, 0x07, 0x36, 0x65, 0x54, /* 80 */ - 0x39, 0x08, 0x5B, 0x6A, 0xFD, 0xCC, 0x9F, 0xAE, 0x80, 0xB1, 0xE2, 0xD3, 0x44, 0x75, 0x26, 0x17, /* 90 */ - 0xFC, 0xCD, 0x9E, 0xAF, 0x38, 0x09, 0x5A, 0x6B, 0x45, 0x74, 0x27, 0x16, 0x81, 0xB0, 0xE3, 0xD2, /* a0 */ - 0xBF, 0x8E, 0xDD, 0xEC, 0x7B, 0x4A, 0x19, 0x28, 0x06, 0x37, 0x64, 0x55, 0xC2, 0xF3, 0xA0, 0x91, /* b0 */ - 0x47, 0x76, 0x25, 0x14, 0x83, 0xB2, 0xE1, 0xD0, 0xFE, 0xCF, 0x9C, 0xAD, 0x3A, 0x0B, 0x58, 0x69, /* c0 */ - 0x04, 0x35, 0x66, 0x57, 0xC0, 0xF1, 0xA2, 0x93, 0xBD, 0x8C, 0xDF, 0xEE, 0x79, 0x48, 0x1B, 0x2A, /* d0 */ - 0xC1, 0xF0, 0xA3, 0x92, 0x05, 0x34, 0x67, 0x56, 0x78, 0x49, 0x1A, 0x2B, 0xBC, 0x8D, 0xDE, 0xEF, /* e0 */ - 0x82, 0xB3, 0xE0, 0xD1, 0x46, 0x77, 0x24, 0x15, 0x3B, 0x0A, 0x59, 0x68, 0xFF, 0xCE, 0x9D, 0xAC, /* f0 */ - - /* - * x^8 + x^2 + x^1 + 1 , LSB bit first - * - * 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f - */ -// 0x00, 0x5E, 0xBC, 0xE2, 0x61, 0x3F, 0xDD, 0x83, 0xC2, 0x9C, 0x7E, 0x20, 0xA3, 0xFD, 0x1F, 0x41, /* 00 */ -// 0x9D, 0xC3, 0x21, 0x7F, 0xFC, 0xA2, 0x40, 0x1E, 0x5F, 0x01, 0xE3, 0xBD, 0x3E, 0x60, 0x82, 0xDC, /* 10 */ -// 0x23, 0x7D, 0x9F, 0xC1, 0x42, 0x1C, 0xFE, 0xA0, 0xE1, 0xBF, 0x5D, 0x03, 0x80, 0xDE, 0x3C, 0x62, /* 20 */ -// 0xBE, 0xE0, 0x02, 0x5C, 0xDF, 0x81, 0x63, 0x3D, 0x7C, 0x22, 0xC0, 0x9E, 0x1D, 0x43, 0xA1, 0xFF, /* 30 */ -// 0x46, 0x18, 0xFA, 0xA4, 0x27, 0x79, 0x9B, 0xC5, 0x84, 0xDA, 0x38, 0x66, 0xE5, 0xBB, 0x59, 0x07, /* 40 */ -// 0xDB, 0x85, 0x67, 0x39, 0xBA, 0xE4, 0x06, 0x58, 0x19, 0x47, 0xA5, 0xFB, 0x78, 0x26, 0xC4, 0x9A, /* 50 */ -// 0x65, 0x3B, 0xD9, 0x87, 0x04, 0x5A, 0xB8, 0xE6, 0xA7, 0xF9, 0x1B, 0x45, 0xC6, 0x98, 0x7A, 0x24, /* 60 */ -// 0xF8, 0xA6, 0x44, 0x1A, 0x99, 0xC7, 0x25, 0x7B, 0x3A, 0x64, 0x86, 0xD8, 0x5B, 0x05, 0xE7, 0xB9, /* 70 */ -// 0x8C, 0xD2, 0x30, 0x6E, 0xED, 0xB3, 0x51, 0x0F, 0x4E, 0x10, 0xF2, 0xAC, 0x2F, 0x71, 0x93, 0xCD, /* 80 */ -// 0x11, 0x4F, 0xAD, 0xF3, 0x70, 0x2E, 0xCC, 0x92, 0xD3, 0x8D, 0x6F, 0x31, 0xB2, 0xEC, 0x0E, 0x50, /* 90 */ -// 0xAF, 0xF1, 0x13, 0x4D, 0xCE, 0x90, 0x72, 0x2C, 0x6D, 0x33, 0xD1, 0x8F, 0x0C, 0x52, 0xB0, 0xEE, /* a0 */ -// 0x32, 0x6C, 0x8E, 0xD0, 0x53, 0x0D, 0xEF, 0xB1, 0xF0, 0xAE, 0x4C, 0x12, 0x91, 0xCF, 0x2D, 0x73, /* b0 */ -// 0xCA, 0x94, 0x76, 0x28, 0xAB, 0xF5, 0x17, 0x49, 0x08, 0x56, 0xB4, 0xEA, 0x69, 0x37, 0xD5, 0x8B, /* c0 */ -// 0x57, 0x09, 0xEB, 0xB5, 0x36, 0x68, 0x8A, 0xD4, 0x95, 0xCB, 0x29, 0x77, 0xF4, 0xAA, 0x48, 0x16, /* d0 */ -// 0xE9, 0xB7, 0x55, 0x0B, 0x88, 0xD6, 0x34, 0x6A, 0x2B, 0x75, 0x97, 0xC9, 0x4A, 0x14, 0xF6, 0xA8, /* e0 */ -// 0x74, 0x2A, 0xC8, 0x96, 0x15, 0x4B, 0xA9, 0xF7, 0xB6, 0xE8, 0x0A, 0x54, 0xD7, 0x89, 0x6B, 0x35 /* f0 */ -}; - -/* - * - */ -void crc8_init(unsigned char *crc) -{ - *crc = 0xff; -} - -/* - * - */ -void crc8_update(unsigned char *crc, unsigned char *buf, int len) -{ - while (len--) - *crc = crc8_table[(*crc) ^ *buf++]; -} - -/* - * - */ -void crc8_final(unsigned char *crc) -{ - *crc ^= 0xff; -} - DELETED firmware/lib/misc/src/crc8.h Index: firmware/lib/misc/src/crc8.h ================================================================== --- firmware/lib/misc/src/crc8.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _CRC8_H_ -#define _CRC8_H_ - -void crc8_init(unsigned char *crc); -void crc8_update(unsigned char *crc, unsigned char *buf, int len); -void crc8_final(unsigned char *crc); - -#endif - DELETED firmware/lib/misc/src/debug.c Index: firmware/lib/misc/src/debug.c ================================================================== --- firmware/lib/misc/src/debug.c +++ /dev/null @@ -1,388 +0,0 @@ -/* - * Tiny alternative to printf - */ -#include -#include -#include -#include "debug.h" - -extern int putChar(int); - -#define NEW_LINE "\r\n" -#define TAB_STR " " - -/* - * RETURN - * if "dst" not NULL, return "dst + 1" - */ -char* udebug_char(char *dst, int ch) -{ - if (dst) - { - *dst = ch; - return (dst + 1); - } - - putChar(ch); - return NULL; -} - -/* - * - */ -char *udebug_str(char *dst, char *str) -{ - while (str != NULL && *str) - dst = udebug_char(dst, *str++); - - return dst; -} - -/* - * NOTE result string not null terminated - */ -char *udebug_hex(char *dst, void *p, uint32 size) -{ - int32 i; - uint8 *pdata; - uint8 data; - - pdata = (uint8*)p; - - for (i = size-1; i >= 0; i--) - { - data = pdata[i] >> 4; - - if (data >= 10) - dst = udebug_char(dst, data + 'A' - 10); - else - dst = udebug_char(dst, data + '0'); - - data = pdata[i] & 0x0f; - - if (data >= 10) - dst = udebug_char(dst, data + 'A' - 10); - else - dst = udebug_char(dst, data + '0'); - } - - return dst; -} - -/* - * - */ -char *udebug_bin(char *dst, void *p, uint32 size) -{ - int32 i, j; - uint8 *pdata; - uint8 data; - - pdata = (uint8*)p; - - for (i = size-1; i >= 0; i--) - { - data = pdata[i]; - for (j = 7; j >= 0; j--) - { - if (data & (1 << j)) - dst = udebug_char(dst, '1'); - else - dst = udebug_char(dst, '0'); - } - if (i != 0) - dst = udebug_char(dst, '.'); - } - - return dst; -} - -/* - * - */ -char *udebug_dec(char *dst, void *p, uint32 size, int *slen) -{ - int c; - uint32 start; - uint32 num; - uint8 n, nn; - - if (size == 4) { - start = 1000000000; - num = *((uint32*)p); - } else if (size == 2) { - start = 10000; - num = *((uint16*)p); - } else if (size == 1) { - start = 100; - num = *((uint8*)p); - } else - return dst; - - nn = 0; - c = 0; - while (start > 1) - { - n = num / start; - if (n > 0 || nn) - { - nn = 1; - dst = udebug_char(dst, n + '0'); - c++; - } - - num = num % start; - start /= 10; - } - n = num % 10; - dst = udebug_char(dst, n + '0'); - c++; - - if (slen) - *slen = c; - return dst; -} - -/* - * - */ -static char *udebug_phead(char *dst, int size) -{ - int i; - /* print header */ - { - dst = udebug_str(dst, NEW_LINE); - if (size < 0x100) - dst = udebug_str(dst, ".."); - else if (size < 0x10000) - dst = udebug_str(dst, "...."); - else if (size < 0xffffffff) - dst = udebug_str(dst, "........."); - - dst = udebug_str(dst, ".."); - for (i = 0; i < 16; i++) - { - if (i && ((i % 8) == 0)) - dst = udebug_char(dst, '.'); - dst = udebug_hex(dst, &i, 1); - dst = udebug_char(dst, '.'); - } - } - - return dst; -} - -/* - * - */ -int vudprint(char *dst, char *fmt, va_list ap) -{ - char *sdst; - int flen; - int c; - char *s; - void *p; - int num, wasnum; - unsigned int dec; - int direct, direct2; - int pad; - - sdst = dst; - -#define DEFAULT_FLEN 4 - flen = DEFAULT_FLEN; - num = 0; - dec = 0; - direct = 0; - direct2 = 0; - pad = 0; - while (*fmt) - { - wasnum = 0; - if (*fmt != '<' && *fmt != '>' && (direct || direct2)) - { - direct = 0; - dst = udebug_char(dst, *fmt++); - continue; - } - - switch (*fmt) - { - case '*': - direct = 1; - break; - case '<': - direct2 = 1; - break; - case '>': - direct2 = 0; - break; - case 'c': - c = va_arg(ap, int); - dst = udebug_char(dst, c); - break; - case 'p': - p = va_arg(ap, void*); - if (p) - dst = udebug_hex(dst, p, flen); - flen = DEFAULT_FLEN; - break; - case 'l': - case 'g': - pad = va_arg(ap, int); - break; - case 'b': - { - int i; - uint8 *buf; - uint32 offset; - - buf = va_arg(ap, void*); - offset = 0; - for (i = 0; i < pad; i++) - { - if ((i % 256) == 0) - dst = udebug_phead(dst, pad); - if ((i % 16) == 0) - { - dst = udebug_str(dst, "."NEW_LINE); - if (pad < 0x100) - dst = udebug_hex(dst, &offset, 1); - else if (pad < 0x10000) - dst = udebug_hex(dst, &offset, 2); - else if (pad < 0xffffffff) - dst = udebug_hex(dst, &offset, 4); - dst = udebug_str(dst, " "); - offset += 16; - } else { - if ((i % 8) == 0) - dst = udebug_char(dst, ' '); - } - - dst = udebug_hex(dst, buf++, 1); - dst = udebug_char(dst, ' '); - } - dst = udebug_str(dst, NEW_LINE); - pad = 0; - } - break; - case 'x': - case 'd': - case 'D': - if (*fmt == 'x') - { - dec = va_arg(ap, int); - dst = udebug_hex(dst, &dec, flen); - } else { - dec = va_arg(ap, int); - if (*fmt == 'D') - { - flen = 4; - pad = 0; - if (dec & (1 << 31)) - { - dst = udebug_char(dst, '-'); - dec = ~dec + 1; - } - } - - dst = udebug_dec(dst, &dec, flen, &num); /* NOTE spoil "num" variable */ - if (pad) - { - int i; - - if (pad > num) - pad -= num; - else - pad = 0; - for (i = 0; i < pad; i++) - dst = udebug_char(dst, ' '); - pad = 0; - } - } - flen = DEFAULT_FLEN; - break; - case 's': - s = va_arg(ap, char*); - dst = udebug_str(dst, s); - if (pad) - { - int i; - - dec = strlen(s); /* NOTE spoil variable */ - if (pad > dec) - pad -= dec; - else - pad = 0; - for (i = 0; i < pad; i++) - dst = udebug_char(dst, ' '); - pad = 0; - } - break; - case 'n': - dst = udebug_str(dst, NEW_LINE); - break; - case '_': - dst = udebug_char(dst, ' '); - break; - case 't': - dst = udebug_str(dst, TAB_STR); - break; - default: - /* assume format is number or unknown */ - if (*fmt >= '0' && *fmt <= '9') - { - flen = (flen * ((num++) * 10) + (*fmt - '0')); - wasnum = 1; - } - } - if (!wasnum) - num = 0; - fmt++; - } - - if (dst) - { - *dst = 0; /* NOTE null-terminate */ - return ((int)(dst - sdst)); /* XXX should strlen be used instead? */ - } else { - return 0; - } -} - -/* - * - * FORMAT - * s output string - * n output newline (CR + LF) - * c output symbol - * Np output value of pointer (N 1 to infinity) - * Nx output number in hex format (N is optional count of bytes - * in number in range from 1 to 4) - * Nd output number in decimal format - * D output number in signed decimal format (4 bytes only) - * l length for buffer to output - * g size of padding of string or decimal number - * b output buffer (length specified with previous 'l' argument) - * ' ' do nothing - * _ output space - * t output tab - * * treat following character as symbol (output directly) - * < switch direct output on - * > switch direct output off - * - * NOTE if "dst" not NULL, result string null terminated - * - */ -int udprint(char *dst, char *fmt, ...) -{ - va_list va; - int ret; - - va_start(va, fmt); - ret = vudprint(dst, fmt, va); - va_end(va); - - return ret; -} - DELETED firmware/lib/misc/src/debug.h Index: firmware/lib/misc/src/debug.h ================================================================== --- firmware/lib/misc/src/debug.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _DEBUG_H_ -#define _DEBUG_H_ - -#include -#include -#include - -#define ERR_PREFIX "(E) " -#define WARN_PREFIX "(W) " - -int vudprint(char *dst, char *fmt, va_list va); -int udprint(char *dst, char *fmt, ...); - -#ifdef USE_DEBUG - #define dprint(fmt, ...) udprint(NULL, fmt, __VA_ARGS__) -#else - #define dprint(fmt, ...) -#endif - -#define sdprint(dst, fmt, ...) udprint(dst, fmt, __VA_ARGS__) - -#define DEBUG_IMSG(msg) \ - DPRINT("s*:_sn", __FUNCTION__, msg) -#define DEBUG_IMSGF(msg, fmt, ...) \ - do \ - { \ - DPRINT("s*:_s_", __FUNCTION__, msg); \ - DPRINT(fmt, __VA_ARGS__); \ - } while (0) - -#define DEBUG_WMSG(msg) \ - DPRINT("ss*:_sn", WARN_PREFIX, __FUNCTION__, msg) -#define DEBUG_WMSGF(msg, fmt, ...) \ - do \ - { \ - DPRINT("ss*:_s_", WARN_PREFIX, __FUNCTION__, msg); \ - DPRINT(fmt, __VA_ARGS__); \ - } while (0) - -#define DEBUG_EMSG(msg) \ - DPRINT("ss*:_sn", ERR_PREFIX, __FUNCTION__, msg) -#define DEBUG_EMSGF(msg, fmt, ...) \ - do \ - { \ - DPRINT("ss*:_s_", ERR_PREFIX, __FUNCTION__, msg); \ - DPRINT(fmt, __VA_ARGS__); \ - } while (0) - -#define debug_emsg(msg) \ - dprint("ss*:_sn", ERR_PREFIX, __FUNCTION__, msg) -#define debug_emsgf(msg, fmt, ...) \ - do \ - { \ - dprint("ss*:_s_", ERR_PREFIX, __FUNCTION__, msg); \ - dprint(fmt, __VA_ARGS__); \ - } while (0) - -#endif /* !_DEBUG_H_ */ - DELETED firmware/lib/misc/src/pearson.c Index: firmware/lib/misc/src/pearson.c ================================================================== --- firmware/lib/misc/src/pearson.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Pearson hash algorithm (http://en.wikipedia.org/wiki/Pearson_hashing). - * - * h := 0 - * for each c in C loop - * index := h xor c - * h := T[index] - * end loop - * return h - * - * For a given string or chunk of data, Pearson's original algorithm produces - * only an 8 bit byte or integer, 0-255. But the algorithm makes it extremely - * easy to generate whatever length of hash is desired. The scheme used above - * is a very straightforward implementation of the algorithm. As Pearson noted - * a change to any bit in the string causes his algorithm to create a completely - * different hash (0-255). In the code below, following every completion of - * the inner loop, the first byte of the string is incremented by one. x[0]=x[0]+1. - * - * Every time that simple change to the first byte of the data is made, a different - * Pearson hash, h, is generated. xPear16 builds a 16 hex byte hash by concatenating - * a series of 8-bit Pearson (h) hashes. Instead of producing a value from 0 - * to 255, it generates a value from 0 to 18,446,744,073,709,551,615. - * - * Pearson's algorithm can be made to generate hashes of any desired length - * simply by adding 1 to the first byte of the string, re-computing h for the - * string, and concatenating the results. Thus the same core logic can be made - * to generate 32-bit or 128-bit hashes. - * - * - */ - -#include - -uint8 T[256] = { - 0x62, 0x06, 0x55, 0x96, 0x24, 0x17, 0x70, 0xa4, 0x87, 0xcf, 0xa9, 0x05, 0x1a, 0x40, 0xa5, 0xdb, // 0x00 - 0x3d, 0x14, 0x44, 0x59, 0x82, 0x3f, 0x34, 0x66, 0x18, 0xe5, 0x84, 0xf5, 0x50, 0xd8, 0xc3, 0x73, // 0x01 - 0x5a, 0xa8, 0x9c, 0xcb, 0xb1, 0x78, 0x02, 0xbe, 0xbc, 0x07, 0x64, 0xb9, 0xae, 0xf3, 0xa2, 0x0a, // 0x02 - 0xed, 0x12, 0xfd, 0xe1, 0x08, 0xd0, 0xac, 0xf4, 0xff, 0x7e, 0x65, 0x4f, 0x91, 0xeb, 0xe4, 0x79, // 0x03 - 0x7b, 0xfb, 0x43, 0xfa, 0xa1, 0x00, 0x6b, 0x61, 0xf1, 0x6f, 0xb5, 0x52, 0xf9, 0x21, 0x45, 0x37, // 0x04 - 0x3b, 0x99, 0x1d, 0x09, 0xd5, 0xa7, 0x54, 0x5d, 0x1e, 0x2e, 0x5e, 0x4b, 0x97, 0x72, 0x49, 0xde, // 0x05 - 0xc5, 0x60, 0xd2, 0x2d, 0x10, 0xe3, 0xf8, 0xca, 0x33, 0x98, 0xfc, 0x7d, 0x51, 0xce, 0xd7, 0xba, // 0x06 - 0x27, 0x9e, 0xb2, 0xbb, 0x83, 0x88, 0x01, 0x31, 0x32, 0x11, 0x8d, 0x5b, 0x2f, 0x81, 0x3c, 0x63, // 0x07 - 0x9a, 0x23, 0x56, 0xab, 0x69, 0x22, 0x26, 0xc8, 0x93, 0x3a, 0x4d, 0x76, 0xad, 0xf6, 0x4c, 0xfe, // 0x08 - 0x85, 0xe8, 0xc4, 0x90, 0xc6, 0x7c, 0x35, 0x04, 0x6c, 0x4a, 0xdf, 0xea, 0x86, 0xe6, 0x9d, 0x8b, // 0x09 - 0xbd, 0xcd, 0xc7, 0x80, 0xb0, 0x13, 0xd3, 0xec, 0x7f, 0xc0, 0xe7, 0x46, 0xe9, 0x58, 0x92, 0x2c, // 0x0a - 0xb7, 0xc9, 0x16, 0x53, 0x0d, 0xd6, 0x74, 0x6d, 0x9f, 0x20, 0x5f, 0xe2, 0x8c, 0xdc, 0x39, 0x0c, // 0x0b - 0xdd, 0x1f, 0xd1, 0xb6, 0x8f, 0x5c, 0x95, 0xb8, 0x94, 0x3e, 0x71, 0x41, 0x25, 0x1b, 0x6a, 0xa6, // 0x0c - 0x03, 0x0e, 0xcc, 0x48, 0x15, 0x29, 0x38, 0x42, 0x1c, 0xc1, 0x28, 0xd9, 0x19, 0x36, 0xb3, 0x75, // 0x0d - 0xee, 0x57, 0xf0, 0x9b, 0xb4, 0xaa, 0xf2, 0xd4, 0xbf, 0xa3, 0x4e, 0xda, 0x89, 0xc2, 0xaf, 0x6e, // 0x0e - 0x2b, 0x77, 0xe0, 0x47, 0x7a, 0x8e, 0x2a, 0xa0, 0x68, 0x30, 0xf7, 0x67, 0x0f, 0x0b, 0x8a, 0xef // 0x0f - }; - - - -/* - * - */ -uint32 pearson(uint8 *x, int len, int wide) -{ - int i, j; -#define MAX_HASH_LEN 4 - uint8 hh[MAX_HASH_LEN]; - uint8 ch; - uint8 h; - - if (wide > MAX_HASH_LEN) - return 0; - - ch = x[0]; /* save first byte */ - for (j = 0; j < wide; j++) - { - /* standard Pearson hash (output is h) */ - h = 0; - for (i = 0; i < len; i++) - { - h = T[h ^ x[i]]; - } - hh[j] = h; /* store result */ - x[0] = x[0] + 1; /* increment first data byte by 1 */ - } - x[0] = ch; /* restore first byte */ - - return (hh[0] | (hh[1] << 8) | (hh[2] << 16) | (hh[3] << 24)); -} - DELETED firmware/lib/misc/src/pearson.h Index: firmware/lib/misc/src/pearson.h ================================================================== --- firmware/lib/misc/src/pearson.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef PEARSON_HASH_H -#define PEARSON_HASH_H - -#include - -uint32 pearson(uint8 *x, int len, int wide); -#define pear32(buf, len) pearson(buf, len, 4) -#define pear16(buf, len) (pearson(buf, len, 2) & 0xffff) - -#endif - DELETED firmware/lib/misc/src/util.c Index: firmware/lib/misc/src/util.c ================================================================== --- firmware/lib/misc/src/util.c +++ /dev/null @@ -1,50 +0,0 @@ -#include "util.h" - -static uint32 next; - -/* - * simple delay - * NOTE optimization should be disabled - */ -void __attribute__((optimize("O0"))) util_sdelay(uint32 v) -{ - while (v) v--; -} - -/* - * RAND_MAX assumed to be 32767 - */ -uint32 util_rand() { - next = next * 1103515245 + 12345; - return((unsigned)(next/65536) % 32768); -} - -/* - * - */ -void util_rand_seed(uint32 seed) { - next = seed; -} - -/* - * swap bits in byte - */ -uint8 util_swapb(uint8 b) -{ - b = ((b & 0xaa) >> 1) | ((b & 0x55) << 1); - b = ((b & 0xcc) >> 2) | ((b & 0x33) << 2); - return (((b >> 4) & 0x0f) | ((b << 4) & 0xf0)); -} - - -/* - * convert decimal number to BCD representation - * - * NOTE max number is 99 - */ -uint8 util_dec2bcd(uint8 dec) -{ - return ((dec / 10 * 16) | (dec % 10)); -} - - DELETED firmware/lib/misc/src/util.h Index: firmware/lib/misc/src/util.h ================================================================== --- firmware/lib/misc/src/util.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef UTILS_H -#define UTILS_H - -#include - -void util_sdelay(uint32 v); -uint32 util_rand(); -void util_rand_seed(uint32 seed); -uint8 util_swapb(uint8 b); -uint8 util_dec2bcd(uint8 dec); - -#define UTIL_RAND_MAX 32767 - -#define BITMASK_CLEAR(bitset, bitmask) (bitset &= ~(bitmask)) -#define BITMASK_SET(bitset, bitmask) (bitset |= (bitmask)) - -#define BIT_CLEAR(bitset, bit) (bitset &= ~(1 << bit)) -#define BIT_SET(bitset, bit) (bitset |= (1 << bit)) - -#define MABS(value) (value > 0 ? value : ((-1) * value)) - -#endif - DELETED firmware/lib/mlpc17xx/Makefile Index: firmware/lib/mlpc17xx/Makefile ================================================================== --- firmware/lib/mlpc17xx/Makefile +++ /dev/null @@ -1,69 +0,0 @@ -################################################################################ -# -# Generic library for LPC177x and LPC178x based devices -# -################################################################################ -ROOT_DIR = ../.. - -################################# -# -# Tools config -# -################################# -SCRIPTS_PATH = $(ROOT_DIR)/$(UTIL_PATH) - -include $(ROOT_DIR)/tcl.mk - -################################# -# -# Compiller flags -# -################################# -CFLAGS += -O2 -CFLAGS += -I$(ROOT_DIR)/lib/lpc17xx -CFLAGS += -I$(ROOT_DIR)/lib/misc/src - -################################# -# -# Objects to build -# -################################# -TARGET = libmlpc17xx.a - -DEPFILE = depfile.mk - -SRC_DIR = src - -C_FILES += $(SRC_DIR)/uart.c -C_FILES += $(SRC_DIR)/stimer.c -C_FILES += $(SRC_DIR)/hwcrc.c -C_FILES += $(SRC_DIR)/gpio.c -C_FILES += $(SRC_DIR)/ssp.c - -C_OBJS = $(foreach obj,$(C_FILES),$(patsubst %c,%o, $(obj))) -AS_OBJS = $(foreach obj,$(AS_FILES),$(patsubst %s,%o, $(obj))) -OBJS += $(AS_OBJS) -OBJS += $(C_OBJS) - -################################# -# -# Build rules -# -################################# - -.PHONY: all -all: $(TARGET) - --include $(DEPFILE) - -depend: $(C_FILES) - $(CC) $(CFLAGS) -MM $(C_FILES) > $(DEPFILE) - $(TCL_SHELL) $(SCRIPTS_PATH)/depdir.tcl $(DEPFILE) $(C_OBJS) - -$(TARGET): $(OBJS) - $(AR) r $@ $^ - -.PHONY: clean -clean: - $(RM) $(OBJS) $(TARGET) - DELETED firmware/lib/mlpc17xx/src/gpio.c Index: firmware/lib/mlpc17xx/src/gpio.c ================================================================== --- firmware/lib/mlpc17xx/src/gpio.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * TODO PINSEL and PINMODE select function - */ -#include -#include "gpio.h" - -#define PCONP_PCGPIO (1 << 15) - - -void gpio_init() -{ - LPC_SC->PCONP |= PCONP_PCGPIO; - - LPC_GPIO0->MASK = 0; - LPC_GPIO1->MASK = 0; - LPC_GPIO2->MASK = 0; - LPC_GPIO3->MASK = 0; - LPC_GPIO4->MASK = 0; - LPC_GPIO5->MASK = 0; -} - -/* - * set gpio direciton - */ -void gpio_setdir(const struct gpio_t *pg, uint8 dir) -{ - if (dir == GPIO_DIR_OUTPUT) - pg->pm->DIR |= pg->mask; - else - pg->pm->DIR &= ~(pg->mask); -} - -/* - * turn on/off gpio dependant of 'state' value - */ -void gpio_drive(const struct gpio_t *pg, uint8 state) -{ - if (state) - pg->pm->SET = pg->mask; - else - pg->pm->CLR = pg->mask; -} - -/* - * read GPIO state - * - * RETURN - * 0 if GPIO is low - * >0 if GPIO is high - */ -uint8 gpio_read(const struct gpio_t *pg) -{ - if (pg->pm->PIN & pg->mask) - return 1; - return 0; -} - -/* - * switch GPIO state - */ -void gpio_switch(const struct gpio_t *pg) -{ - if (pg->pm->PIN & pg->mask) - pg->pm->CLR = pg->mask; - else - pg->pm->SET = pg->mask; -} - DELETED firmware/lib/mlpc17xx/src/gpio.h Index: firmware/lib/mlpc17xx/src/gpio.h ================================================================== --- firmware/lib/mlpc17xx/src/gpio.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef GPIO_H -#define GPIO_H - -#include -#include "gpio.h" - -#define GPIO_DIR_OUTPUT 0x01 -#define GPIO_DIR_INPUT 0x00 - -struct gpio_t { - LPC_GPIO_TypeDef *pm; - uint32 mask; -}; - -void gpio_init(); -void gpio_drive(const struct gpio_t *pg, uint8 state); -void gpio_setdir(const struct gpio_t *pg, uint8 dir); -uint8 gpio_read(const struct gpio_t *pg); -void gpio_switch(const struct gpio_t *pg); - -//#define led_on(pg) gpio_drive(pg, 1) -//#define led_off(pg) gpio_drive(pg, 0) - -#endif - DELETED firmware/lib/mlpc17xx/src/hwcrc.c Index: firmware/lib/mlpc17xx/src/hwcrc.c ================================================================== --- firmware/lib/mlpc17xx/src/hwcrc.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * NOTE this functions should be used atomically, be care in OS invironment - * - * CCITT: x^16 + x^15 + x^5 + 1 - * CRC16: x^16 + x^15 + x^2 + 1 - * CRC32: x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + + x ^2 + x + 1 - */ -#include -#include "hwcrc.h" - -/* - * - */ -void hwcrc_ccitt_init(uint16 *crc) -{ - *crc = 0xffff; - - LPC_CRC->MODE = 0x00000000; - LPC_CRC->SEED = 0xffff; -} - -/* - * - */ -void hwcrc_ccitt(uint16 *crc, uint8* buf, int len) -{ - while (len--) - LPC_CRC->WR_DATA_BYTE = *buf++; - - *crc = LPC_CRC->SUM & 0xffff; -} - -/* - * - */ -void hwcrc_16_init(uint16 *crc) -{ - *crc = 0x0000; - - LPC_CRC->MODE = 0x00000015; - LPC_CRC->SEED = 0x0000; -} - -/* - * - */ -void hwcrc_16(uint16 *crc, uint8* buf, int len) -{ - while (len--) - LPC_CRC->WR_DATA_BYTE = *buf++; - - *crc = LPC_CRC->SUM & 0xffff; -} - -/* - * - */ -void hwcrc_32_init(uint32 *crc) -{ - *crc = 0xffffffff; - - LPC_CRC->MODE = 0x00000036; - LPC_CRC->SEED = 0xffffffff; -} - -/* - * - */ -void hwcrc_32(uint32 *crc, uint8* buf, int len) -{ - while (len--) - LPC_CRC->WR_DATA_BYTE = *buf++; - - *crc = LPC_CRC->SUM; -} - DELETED firmware/lib/mlpc17xx/src/hwcrc.h Index: firmware/lib/mlpc17xx/src/hwcrc.h ================================================================== --- firmware/lib/mlpc17xx/src/hwcrc.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef HWCRC_LPC17XX_H -#define HWCRC_LPC17XX_H - -#include - -void hwcrc_ccitt_init(uint16 *crc); -void hwcrc_ccitt(uint16 *crc, uint8* buf, int len); -void hwcrc_16_init(uint16 *crc); -void hwcrc_16(uint16 *crc, uint8* buf, int len); -void hwcrc_32_init(uint32 *crc); -void hwcrc_32(uint32 *crc, uint8* buf, int len); - -#endif - DELETED firmware/lib/mlpc17xx/src/ssp.c Index: firmware/lib/mlpc17xx/src/ssp.c ================================================================== --- firmware/lib/mlpc17xx/src/ssp.c +++ /dev/null @@ -1,173 +0,0 @@ -#include -#include -#include "ssp.h" - -#define DEBUGSSP - -#ifdef DEBUGSSP - #define DPRINT(fmt, ...) dprint(fmt, __VA_ARGS__) -#else - #define DPRINT(fmt, ...) -#endif - - -#define SSP_CR1_SSE (1 << 1) - -#define SSP_SR_TFE (1 << 0) -#define SSP_SR_RNE (1 << 2) -#define SSP_SR_RFF (1 << 3) -#define SSP_SR_BSY (1 << 4) - -struct ssp_t ssp[SSP_COUNT]; - -/* - * - */ -void ssp_setup(struct ssp_t *sspif, uint32 speed, uint32 mode) -{ - if (sspif == SSP0) - { - sspif->pm = LPC_SSP0; - - LPC_SC->PCONP |= PCONP_PCSSP0; - - /* - * P1.20/SCK - * P1.23/MISO - * P1.24/MOSI - */ - LPC_IOCON_FUNC_SET(P1_20, LPC_IOCON_P1_20_SSP0_SCK); - LPC_IOCON_FUNC_SET(P1_23, LPC_IOCON_P1_23_SSP0_MISO); - LPC_IOCON_FUNC_SET(P1_24, LPC_IOCON_P1_24_SSP0_MOSI); - } else if (sspif == SSP1) { - sspif->pm = LPC_SSP1; - - LPC_SC->PCONP |= PCONP_PCSSP1; - - /* - * P0.7/SCK - * P0.8/MISO - * P0.9/MOSI - */ - LPC_IOCON_FUNC_SET(P0_7, LPC_IOCON_P0_7_SSP1_SCK); - LPC_IOCON_FUNC_SET(P0_8, LPC_IOCON_P0_8_SSP1_MISO); - LPC_IOCON_FUNC_SET(P0_9, LPC_IOCON_P0_9_SSP1_MOSI); - } else { - /* NOTREACHED */ - DEBUG_EMSG("unknown SSP interface"); - return; - } - - sspif->pm->CR1 &= ~SSP_CR1_SSE; - - /* - * 8-bit transfer, SPI frame format - */ - sspif->pm->CR0 = 0x07; - - ssp_setspeed(sspif, speed); - ssp_setmode(sspif, mode); - - /* enable SSP NOTE not necessary (look at setmode function) */ - sspif->pm->CR1 |= SSP_CR1_SSE; - - /* read out all bytes from receive FIFO */ - while ((sspif->pm->SR & SSP_SR_RNE) && !(sspif->pm->SR & SSP_SR_TFE)) - sspif->pm->DR; -} - -/* - * - */ -void ssp_setmode(struct ssp_t *sspif, uint32 mode) -{ - /* disable SSP */ - sspif->pm->CR1 &= ~SSP_CR1_SSE; - - sspif->pm->CR0 &= ~(0x03 << 6); - sspif->pm->CR0 |= (mode << 6); - - /* enable SSP */ - sspif->pm->CR1 |= SSP_CR1_SSE; - - /* save mode value */ - sspif->mode = mode; -} - -/* - * - */ -void ssp_setspeed(struct ssp_t *sspif, uint32 speed) -{ - /* disable SSP */ - sspif->pm->CR1 &= ~SSP_CR1_SSE; - - sspif->pm->CPSR &= ~0xff; - sspif->pm->CPSR |= speed & 0x00ff; - - sspif->pm->CR0 &= ~(0xff << 8); - sspif->pm->CR0 |= speed & 0xff00; - - /* enable SSP */ - sspif->pm->CR1 |= SSP_CR1_SSE; - - /* save speed value */ - sspif->speed = speed; -} - -/* - * read/write SPI frame - * - * ARGS - * sspif pointer to SSP interface - * tx pointer to transfer buffer, NULL if should not care - * rx pointer to receive buffer, NULL if should not care - * len bytes to write (or read) - */ -void ssp_wr(struct ssp_t *sspif, uint8 *tx, uint8 *rx, uint32 len) -{ - /* sanity check */ - if (len == 0) - return; - - while (len--) - { - if (tx != NULL) - sspif->pm->DR = *tx++; - else - sspif->pm->DR = 0xff; - - while ((sspif->pm->SR & (SSP_SR_RNE | SSP_SR_BSY)) != SSP_SR_RNE) - ; - - if (rx != NULL) - *rx++ = sspif->pm->DR; - else - sspif->pm->DR; - } -} - -/* - * - */ -void ssp_disable(struct ssp_t *sspif) -{ - /* disable SSP */ - sspif->pm->CR1 &= ~SSP_CR1_SSE; - - if (sspif == SSP0) - { - LPC_IOCON_FUNC_SET(P1_20, 0); - LPC_IOCON_FUNC_SET(P1_23, 0); - LPC_IOCON_FUNC_SET(P1_24, 0); - } else if (sspif == SSP1) { - LPC_IOCON_FUNC_SET(P0_7, 0); - LPC_IOCON_FUNC_SET(P0_8, 0); - LPC_IOCON_FUNC_SET(P0_9, 0); - } else { - /* NOTREACHED */ - debug_emsg("unknown SSP interface"); - return; - } -} - DELETED firmware/lib/mlpc17xx/src/ssp.h Index: firmware/lib/mlpc17xx/src/ssp.h ================================================================== --- firmware/lib/mlpc17xx/src/ssp.h +++ /dev/null @@ -1,65 +0,0 @@ -#ifndef LPC17XX_SSP_H -#define LPC17XX_SSP_H - -#include -#include -#include - -struct ssp_t { - LPC_SSP_TypeDef *pm; - - uint32 speed; - uint32 mode; -}; - -#define SSP_COUNT 2 - -extern struct ssp_t ssp[SSP_COUNT]; - -#define SSP0 (&ssp[0]) -#define SSP1 (&ssp[1]) - -/* - * Freq = PCLK / (CPSDVSR * (SCR + 1)) - * - * speed bits: - * 0..7 CPSDVSR (even values between 2 and 254) - * 8..15 SCR - */ -#define SSP_SPEED_100KHZ_24MHZ (80 | (2 << 8)) -#define SSP_SPEED_6MHZ_24MHZ (2 | (1 << 8)) -#define SSP_SPEED_12MHZ_24MHZ (2 | (0 << 8)) - -#define SSP_SPEED_5MHZ_20MHZ (2 | (1 << 8)) -#define SSP_SPEED_10MHZ_20MHZ (2 | (0 << 8)) - -#if CLK_PCLK == (24 * 1000000) - #define SSP_SPEED_100KHZ SSP_SPEED_100KHZ_24MHZ - #define SSP_SPEED_6MHZ SSP_SPEED_6MHZ_24MHZ - #define SSP_SPEED_12MHZ SSP_SPEED_12MHZ_24MHZ -#elif CLK_PCLK == (20 * 1000000) - #define SSP_SPEED_5MHZ SSP_SPEED_5MHZ_20MHZ - #define SSP_SPEED_10MHZ SSP_SPEED_10MHZ_20MHZ -#else - #error Unknown PCLK frequency -#endif - - - -/* - * bit 0 CPHA - * bit 1 CPOL - */ -#define SSP_MODE_CPOL1_CPHA1 0x03 -#define SSP_MODE_CPOL0_CPHA1 0x01 -#define SSP_MODE_CPOL1_CPHA0 0x02 -#define SSP_MODE_CPOL0_CPHA0 0x00 - -void ssp_setup(struct ssp_t *sspif, uint32 speed, uint32 mode); -void ssp_setmode(struct ssp_t *sspif, uint32 mode); -void ssp_setspeed(struct ssp_t *sspif, uint32 speed); -void ssp_wr(struct ssp_t *sspif, uint8 *tx, uint8 *rx, uint32 len); -void ssp_disable(struct ssp_t *sspif); - -#endif - DELETED firmware/lib/mlpc17xx/src/stimer.c Index: firmware/lib/mlpc17xx/src/stimer.c ================================================================== --- firmware/lib/mlpc17xx/src/stimer.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * NOTE TIM0 is used, NOT Cortext M3 system tick timer - */ -#include -#include -#include "clk_cfg.h" -#include "stimer.h" - -/* - * initialize TIMER0 - */ -void stimer_init() -{ - /* - * setup TIM0 as 1ms interval timer - */ - LPC_SC->PCONP |= PCONP_PCTIM0; - - LPC_TIM0->TCR = TCR_RESET; - LPC_TIM0->CTCR = 0; /* timer mode */ - - /* - * for 1ms interval - * - * PR = 1e-3/(1/PCLK) - * - */ - LPC_TIM0->PR = CLK_PCLK/1000 - 1; - LPC_TIM0->TCR = TCR_ENABLE; - - /* - * setup TIM2 as 1us interval timer - */ - LPC_SC->PCONP |= PCONP_PCTIM2; - - LPC_TIM2->TCR = TCR_RESET; - LPC_TIM2->CTCR = 0; /* timer mode */ - - /* - * for 1us interval - * - * PR = 1e-6/(1/(PCLK)) - * - */ - LPC_TIM2->PR = CLK_PCLK/1000000 - 1; - LPC_TIM2->TCR = TCR_ENABLE; -} - -/* - * initialize time value with jiffies - */ -void stimer_settime(uint32 *val) -{ - *val = LPC_TIM0->TC; -} - -/* - * return difference between current TIMER0 value and old time value - */ -uint32 stimer_deltatime(uint32 time) -{ - uint32 j; - - j = LPC_TIM0->TC; - - return (j >= time ? (j - time) : (0xffffffff - time + j)); -} - -/* - * wait for specific time - * - * NOTE watchdog timeout can occure - */ -void stimer_wait(uint32 time) -{ - uint32 t; - - stimer_settime(&t); - while (stimer_deltatime(t) < time) - asm volatile ("nop"); -} - -/* - * initialize time value with jiffies - */ -void stimer_settime_us(uint32 *val) -{ - *val = LPC_TIM2->TC; -} - -/* - * return difference between current TIMER0 value and old time value - */ -uint32 stimer_deltatime_us(uint32 time) -{ - uint32 j; - - j = LPC_TIM2->TC; - - return (j >= time ? (j - time) : (0xffffffff - time + j)); -} - -/* - * wait for specific time - * - * NOTE watchdog timeout can occure - */ -void stimer_wait_us(uint32 time) -{ - uint32 t; - - stimer_settime_us(&t); - while (stimer_deltatime_us(t) < time) - asm volatile ("nop"); -} - DELETED firmware/lib/mlpc17xx/src/stimer.h Index: firmware/lib/mlpc17xx/src/stimer.h ================================================================== --- firmware/lib/mlpc17xx/src/stimer.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef STIMER_LPC17XX_H -#define STIMER_LPC17XX_H - -#include - -void stimer_init(); -void stimer_settime(uint32 *val); -uint32 stimer_deltatime(uint32 time); -void stimer_wait(uint32 time); - -void stimer_settime_us(uint32 *val); -uint32 stimer_deltatime_us(uint32 time); -void stimer_wait_us(uint32 time); - -#endif - DELETED firmware/lib/mlpc17xx/src/uart.c Index: firmware/lib/mlpc17xx/src/uart.c ================================================================== --- firmware/lib/mlpc17xx/src/uart.c +++ /dev/null @@ -1,375 +0,0 @@ -/* - * generic uart functions - */ -#include -#include "uart.h" -#include -#include "debug.h" - -struct uart_t uart[UART_COUNT]; -static void uart_defaultisr(void *u); - -/* - * setup uart with specific parameters - * and fill uart_t structure - * - * ARGS - * - * RETURN - * zero on success, error code otherwise - * - */ -uint32 uart_setup(struct uart_t *pu, uint32 speed, struct uart_cb_t *cb) -{ - pu->isr = uart_defaultisr; - if (cb) - { - pu->cb.rxchar = cb->rxchar; - pu->cb.txend = cb->txend; - } - - if (pu == &uart[0]) - { - LPC_SC->PCONP |= PCONP_PCUART0; - - pu->pm = (LPC_UART1_TypeDef*)LPC_UART0; - - /* P0.2 (TXD0), P0.3 (RXD0) */ - LPC_IOCON->P0_2 &= ~LPC_IOCON_FUNC_MASK; - LPC_IOCON->P0_2 |= LPC_IOCON_FUNC(1); - LPC_IOCON->P0_3 &= ~LPC_IOCON_FUNC_MASK; - LPC_IOCON->P0_3 |= LPC_IOCON_FUNC(1); - } else if (pu == &uart[1]) { - LPC_SC->PCONP |= PCONP_PCUART1; - - pu->pm = (LPC_UART1_TypeDef*)LPC_UART1; - - /* P0.15 (TXD1), P0.16 (RXD1) */ - LPC_IOCON->P0_15 &= ~LPC_IOCON_FUNC_MASK; - LPC_IOCON->P0_15 |= LPC_IOCON_FUNC(1); - LPC_IOCON->P0_16 &= ~LPC_IOCON_FUNC_MASK; - LPC_IOCON->P0_16 |= LPC_IOCON_FUNC(1); - } else if (pu == &uart[2]) { - /* TODO */ - } else if (pu == &uart[3]) { - /* TODO */ - } else { - /* NOTREACHED */ - return 1; - } - - pu->pm->LCR = UART_LCR_DLAB; - - /* - * PCLK - * BAUD = ---------------------------------------- - * (16 * (256 * DLM + DLL) * (1 + DIV/MUL)) - * - * - */ - - /* - * bits of speed argument: - * - * 0..7 bits DLM - * 8..15 bits DLL - * 16..23 bits DIV - * 24..31 bits MUL - */ - { - uint8 dlm; - uint8 dll; - uint8 div; - uint8 mul; - - dlm = (speed >> 0) & 0xff; - dll = (speed >> 8) & 0xff; - div = (speed >> 16) & 0xff; - mul = (speed >> 24) & 0xff; - - pu->pm->DLM = dlm; - pu->pm->DLL = dll; - pu->pm->FDR = (div << 0) | (mul << 4); - pu->pm->LCR = (3 << 0); - } - - /* enable receive and line status interrupts */ - if (pu != DEBUG_UART) /* XXX */ - pu->pm->IER = UART_IER_RBR | UART_IER_RLS; - - /* UART0 - debug port */ - if (pu == &uart[0]) - { - /* Reset RX, TX FIFO's, activate FIFO's, 0 characters for CTI interrupt */ - pu->pm->FCR = (1 << 2) | (1 << 1) | (1 << 0) | (0 << 6); - } else { - /* Reset RX, TX FIFO's, activate FIFO's, 14 characters for CTI interrupt */ - pu->pm->FCR = (1 << 2) | (1 << 1) | (1 << 0) | (3 << 6); - } - - if (pu == &uart[0]) - { - /* UART0 - debug port, set highest priority */ -// NVIC_SetPriority(UART0_IRQn, 0); - -// NVIC_EnableIRQ(UART0_IRQn); -//#ifdef UART_USE_IRQ_PRIORITY -// NVIC_SetPriority(UART0_IRQn, UART0_IRQ_PRIORITY); -//#endif - } else if (pu == &uart[1]) { - NVIC_EnableIRQ(UART1_IRQn); -//#ifdef UART_USE_IRQ_PRIORITY -// NVIC_SetPriority(UART1_IRQn, UART1_IRQ_PRIORITY); -//#endif - } else if (pu == &uart[2]) { - NVIC_EnableIRQ(UART2_IRQn); -//#ifdef UART_USE_IRQ_PRIORITY -// NVIC_SetPriority(UART2_IRQn, UART2_IRQ_PRIORITY); -//#endif - } else if (pu == &uart[3]) { - NVIC_EnableIRQ(UART3_IRQn); -//#ifdef UART_USE_IRQ_PRIORITY -// NVIC_SetPriority(UART3_IRQn, UART3_IRQ_PRIORITY); -//#endif - } else { - /* NOTREACHED */ - return 3; - } - - return 0; -} - -/* - * - */ -void uart_disable(struct uart_t *pu) -{ - pu->pm->IER = 0; - - if (pu == &uart[0]) - { - NVIC_DisableIRQ(UART0_IRQn); - } else if (pu == &uart[1]) { - NVIC_DisableIRQ(UART1_IRQn); - } else if (pu == &uart[2]) { - NVIC_DisableIRQ(UART2_IRQn); - } else if (pu == &uart[3]) { - NVIC_DisableIRQ(UART3_IRQn); - } -} - -/* - * default uart IRQ handler - */ -static void uart_defaultisr(void *u) -{ - uint32 IIR, LSR; - uint32 intid; - struct uart_t *pu; - - pu = (struct uart_t *)u; - - IIR = pu->pm->IIR; - LSR = pu->pm->LSR; - intid = (IIR >> 1) & 0x07; - - if (intid == UART_INTID_RLS) - { - if (LSR & UART_LSR_RDR) - { - if (pu->rxbuf.c >= UARTBUF_SIZE) - { - pu->rxbuf.c = 0; - dprint("sn", "overbuffer!"); - } - pu->rxbuf.buf[pu->rxbuf.c++] = pu->pm->RBR; - } - } else if (intid == UART_INTID_RDA || intid == UART_INTID_CTI) { - if (LSR & UART_LSR_RDR) - { - if (pu->rxbuf.c >= UARTBUF_SIZE) /* overbuffer ! */ - { - pu->rxbuf.c = 0; - dprint("sn", "overbuffer!"); - } else { - pu->rxbuf.buf[pu->rxbuf.c++] = pu->pm->RBR; - if (pu->cb.rxchar) - (*pu->cb.rxchar)(pu); - } - } - } else if (intid == UART_INTID_THRE) { - if (pu->txbuf.c > 0) - { - pu->pm->THR = pu->txbuf.buf[pu->txbuf.p++]; - pu->txbuf.c--; - } else { - if (pu->cb.txend) - (*pu->cb.txend)(pu); - pu->pm->IER &= ~UART_IER_THRE; - } - } -} - -/* - * for printf - */ -int putChar(int c) -{ - while (!(DEBUG_UART->pm->LSR & UART_LSR_THRE)) - ; - DEBUG_UART->pm->THR = c; - - return c; -} - -///* -// * check if transmission already in progress -// * -// * RETURN -// * zero if uart is free, >0 ozerwise -// * -// * XXX -// * Try to use bariers and readback interrupt enable bit to -// * disable THRE interrupt. -// * -// */ -//uint8 uart_istx(struct uart_t *pu) -//{ -// uint8 ret; -//// uint32 IER; -// -// __disable_irq(); -// if (pu->txbuf.c) -// ret = 1; -// else -// ret = 0; -// __enable_irq(); -// -//// IER = pu->pm->IER; -//// if (IER & UART_IER_THRE) -//// return 1; -// -// return ret; -//} -// -///* -// * initiate uart transmission -// * no check of transmission in progress -// */ -//void uart_send(struct uart_t *pu) -//{ -// if (pu->txbuf.c > 0 && pu->txbuf.c <= UARTBUF_SIZE) -// { -// pu->txbuf.p = 0; -// pu->pm->THR = pu->txbuf.buf[0]; -// -// pu->txbuf.c--; -// pu->txbuf.p++; -// pu->pm->IER |= UART_IER_THRE; -// } else { -// /* NOTREACHED */ -// debug_str("uart_send, wrong count\r\n"); -// } -//} -// -///* -// * send buffer to uart -// */ -//void uart_sendbuf(struct uart_t *pu, uint8 *buf, uint32 c) -//{ -// if (c <= UARTBUF_SIZE) -// { -// memcpy(pu->txbuf.buf, buf, c); -// uart_settxc(pu, c); -// uart_send(pu); -// } else -// debug_str("uart_sendbuf, too long\r\n"); -//} -// -/* - * - */ -void UART0_Handler() -{ - struct uart_t *pu; - - pu = &uart[0]; - - if (pu != NULL) - { - (*pu->isr)(pu); - } else { - /* NOTREACHED */ -// debug_str("uart0, undef\r\n"); - } -} - -/* - * - */ -void UART1_Handler() -{ - struct uart_t *pu; - - pu = &uart[1]; - - if (pu != NULL) - { - (*pu->isr)(pu); - } else { - /* NOTREACHED */ -// debug_str("uart1, undef\r\n"); - } -} - -/* - * - */ -void UART2_Handler() -{ - struct uart_t *pu; - - pu = &uart[2]; - - if (pu != NULL) - { - (*pu->isr)(pu); - } else { - /* NOTREACHED */ -// debug_str("uart2, undef\r\n"); - } - -} - -/* - * - */ -void UART3_Handler() -{ - struct uart_t *pu; - - pu = &uart[3]; - - if (pu != NULL) - { - (*pu->isr)(pu); - } else { - /* NOTREACHED */ -// debug_str("uart3, undef\r\n"); - } -} - -///* -// * get count of bytes in receive buffer -// */ -//uint32 uart_rxc(struct uart_t *pu) -//{ -// uint32 ret; -// -// __disable_irq(); -// ret = pu->rxbuf.c; -// __enable_irq(); -// -// return ret; -//} -// DELETED firmware/lib/mlpc17xx/src/uart.h Index: firmware/lib/mlpc17xx/src/uart.h ================================================================== --- firmware/lib/mlpc17xx/src/uart.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef UART_H -#define UART_H - -#include -#include -#include - -#define UART_BAUD_MAX_25_MHZ ((0 << 0) | (1 << 8) | (0 << 16) | (1 << 24)) -#define UART_BAUD_1562500_25_MHZ UART_BAUD_MAX_25_MHZ -#define UART_BAUD_115200_25_MHZ ((0 << 0) | (9 << 8) | (1 << 16) | (2 << 24)) -#define UART_BAUD_48000_25_MHZ ((0 << 0) | (26 << 8) | (1 << 16) | (4 << 24)) -#define UART_BAUD_38400_25_MHZ ((0 << 0) | (29 << 8) | (2 << 16) | (5 << 24)) -#define UART_BAUD_9600_25_MHZ ((0 << 0) | (93 << 8) | (6 << 16) | (8 << 24)) -#define UART_BAUD_4800_25_MHZ ((0 << 0) | (186 << 8) | (6 << 16) | (8 << 24)) - -#define UART_BAUD_115200_22_11834_MHZ ((0 << 0) | (12 << 8) | (0 << 16) | (1 << 24)) -#define UART_BAUD_9600_22_11834_MHZ ((0 << 0) | (144 << 8) | (0 << 16) | (1 << 24)) - -#define UART_BAUD_38400_20_MHZ ((0 << 0) | (19 << 8) | (5 << 16) | (7 << 24)) -#define UART_BAUD_38400_24_MHZ ((0 << 0) | (23 << 8) | (7 << 16) | (10 << 24)) - -#define UART_BAUD_115200_20_MHZ ((0 << 0) | ( 8 << 8) | (5 << 16) | (14 << 24)) -#define UART_BAUD_115200_24_MHZ ((0 << 0) | ( 7 << 8) | (6 << 16) | ( 7 << 24)) -#define UART_BAUD_115200_36_MHZ ((0 << 0) | (13 << 8) | (1 << 16) | ( 2 << 24)) -#define UART_BAUD_115200_60_MHZ ((0 << 0) | (19 << 8) | (5 << 16) | ( 7 << 24)) - -#if CLK_PCLK == (36 * 1000000) - #define UART_BAUD_115200 UART_BAUD_115200_36_MHZ -#elif CLK_PCLK == (24 * 1000000) - #define UART_BAUD_38400 UART_BAUD_38400_24_MHZ - #define UART_BAUD_115200 UART_BAUD_115200_24_MHZ -#elif CLK_PCLK == (20 * 1000000) - #define UART_BAUD_38400 UART_BAUD_38400_20_MHZ - #define UART_BAUD_115200 UART_BAUD_115200_20_MHZ -#else - #error Unknown PCLK frequency -#endif - -#define UARTBUF_SIZE 128 - -typedef void (*uart_isr_f)(void *); - -struct uart_buf_t { - uint8 buf[UARTBUF_SIZE]; - uint32 p; - uint32 c; -}; - -struct uart_t { - LPC_UART1_TypeDef *pm; - uart_isr_f isr; - - /* miscellaneous callbacks */ - struct uart_cb_t { - void (*rxchar)(struct uart_t *); - void (*txend)(struct uart_t *); - } cb; - - struct uart_buf_t rxbuf; - struct uart_buf_t txbuf; -}; - -#define UART_COUNT 4 -extern struct uart_t uart[UART_COUNT]; - -#define DEBUG_UART (&uart[0]) - -int putChar(int c); -uint32 uart_setup(struct uart_t *pu, uint32 speed, struct uart_cb_t *cb); -//void uart_send(struct uart_t *pu); -//void uart_sendbuf(struct uart_t *pu, uint8 *buf, uint32 c); -//void uart_disable(struct uart_t *pu); -//uint32 uart_rxc(struct uart_t *pu); -//uint8 uart_istx(struct uart_t *pu); - -void UART0_Handler(); -void UART1_Handler(); -void UART2_Handler(); -void UART3_Handler(); - -//#define uart_reset_rx(pu) {__disable_irq(); (pu)->rxbuf.c = 0; __enable_irq();} -//#define uart_rxbuf(pu) ((pu)->rxbuf.buf) -//#define uart_txbuf(pu) ((pu)->txbuf.buf) -//#define uart_settxc(pu, txc) ((pu)->txbuf.c = (txc)) - -#endif - DELETED firmware/tcl.mk Index: firmware/tcl.mk ================================================================== --- firmware/tcl.mk +++ /dev/null @@ -1,13 +0,0 @@ - -ifeq ($(findstring Win,$(OS)), Win) - TCLKITSH = $(ROOT_DIR)/$(UTIL_PATH)/tclkitsh.exe -else - TCLKITSH = $(ROOT_DIR)/$(UTIL_PATH)/tclkitsh -endif - -ifeq ("$(wildcard $(TCLKITSH))", "") - export TCL_SHELL = tclsh -else - export TCL_SHELL = $(TCLKITSH) -endif - DELETED util/bin2c.lua Index: util/bin2c.lua ================================================================== --- util/bin2c.lua +++ /dev/null @@ -1,38 +0,0 @@ -#!/bin/env lua - -if #arg < 2 then - print("Usage:") - print("", arg[0] .. " ") - print() - print("DST_FILE can be '-' for standard output") - print() - - os.exit(1) -end - - -inf = io.open(arg[1], "rb") -if arg[2] == "-" then -else - outf = io.open(arg[2], "wb") - io.output(outf) -end - -bytes = inf:read("*a") - -io.write("static const char data[] = {\n ") - -for i = 1, #bytes do - io.write("0x" .. string.format("%02X", bytes:byte(i)) .. ", ") - if (i % 8) == 0 then - io.write("\n ") - end -end - -io.write("\n};\n\n") - -inf:close() -if outf then - outf:close() -end - DELETED util/depdir.tcl Index: util/depdir.tcl ================================================================== --- util/depdir.tcl +++ /dev/null @@ -1,43 +0,0 @@ -#!/bin/sh -#\ -exec tclsh "$0" "$@" - -if {$argc < 2} { - puts stderr [join [list [file tail [info script]] {: Not enough arguments}] {}] - exit 1 -} - -set FILE [lindex $argv 0] -set OBJECTS [lrange $argv 1 end] - -set fd [open $FILE r] -set data [split [read $fd] '\n'] -close $fd - -set nline [list] - -set fd [open $FILE w] - -foreach line $data { - set line [string trimright $line {\\ }] - if {[string length $line] == 0} { - continue - } - - if {[regexp {(^[^: ]+)(:.*$)} $line -> target prereq]} { - puts $fd {} - foreach object $OBJECTS { - if {[string match $target [file tail $object]]} { - puts -nonewline $fd [set object][set prereq] - break - } - } - } else { - puts -nonewline $fd $line - } -} - -puts $fd {} - -close $fd - DELETED util/dport/Makefile Index: util/dport/Makefile ================================================================== --- util/dport/Makefile +++ /dev/null @@ -1,69 +0,0 @@ -############################################ -# -# TODO dependencies -# -############################################ -TARGET = dport - -ROOT_DIR = ../.. -SRC_PATH = src -DARM_LIB_PATH = ./$(SRC_PATH)/darm -TCL_SHELL = tclsh - -DEPFILE = depfile.mk -UTIL_PATH = $(ROOT_DIR)/util -SCRIPTS_PATH = $(UTIL_PATH) - -############################################ -CC = gcc -LD = gcc - -############################################ -CFLAGS = -g -CFLAGS += -Wall -CFLAGS += -I$(SRC_PATH) -CFLAGS += -I$(DARM_LIB_PATH) - -LDFLAGS += -L./$(SRC_PATH)/darm - -############################################ -C_FILES += $(SRC_PATH)/dport.c -C_FILES += $(SRC_PATH)/debug.c -C_FILES += $(SRC_PATH)/comm.c -C_FILES += $(SRC_PATH)/commdev.c -C_FILES += $(SRC_PATH)/linenoise.c -C_FILES += $(SRC_PATH)/tcl_interface.c - -C_OBJS = $(foreach obj,$(C_FILES),$(patsubst %c,%o, $(obj))) -OBJS += $(C_OBJS) - - -DARM_LIB = $(DARM_LIB_PATH)/libdarm.so - -#VPATH += /usr/spkg/lib - -LIBS += -ltcl -#LIBS += -ldwarf -#LIBS += -lelf -LIBS += $(DARM_LIB) - -############################################ -$(TARGET): $(OBJS) $(LIBS) - $(LD) $(LDFLAGS) -o $(TARGET) $^ - -$(OBJS): $(DARM_LIB) - -$(DARM_LIB): - cd $(DARM_LIB_PATH) && make - --include $(DEPFILE) - -.PHONY: clean depend -depend: - $(CC) $(CFLAGS) -MM $(C_FILES) > $(DEPFILE) - $(TCL_SHELL) $(SCRIPTS_PATH)/depdir.tcl $(DEPFILE) $(C_OBJS) - -clean: - rm -f $(OBJS) $(TARGET) - cd $(DARM_LIB_PATH) && make clean - DELETED util/dport/dport.tcl Index: util/dport/dport.tcl ================================================================== --- util/dport/dport.tcl +++ /dev/null @@ -1,120 +0,0 @@ - -lappend auto_path [pwd] -package require dport - -namespace import ::dport::util::crc16_ccitt -namespace import ::dport::util::num2bin -namespace import ::dport::util::bin2num -namespace import ::dport::util::bin2list - -# -# reset device. -# -# -proc devreset {} { - # - # NOTE - # 500 ms timeout on device, so wait a little longer - # - reset - after 800 -} - -# -# reset device and stop device in bootloader (debug handler) -# -proc wboot {value} { - set RTC_GPREG 0x40024044 - - # write magic number to RTC memory - writemem $RTC_GPREG [num2bin $value 4] - - # reset device - devreset - - # check that we actualy in right point of program - set bkpt [bin2num [readmem [expr {[readreg PC] - 2}] 2] 0 2] - puts "bkpt = [format %04X $bkpt]" - if {$bkpt != 0xbeab} { - puts stderr "bkpt instruciton mismatch, load failed" - return 0 - } - - return 1 -} - -# -# write image to FLASH -# -proc wf {} { - set image main.bin - - if {![wboot 0x4444BEEF]} { - return - } - - # get length - set length [file size $image] - - # calculate crc - set fd [open $image r] - fconfigure $fd -translation binary - set crc [crc16_ccitt 0xffff [bin2list [read $fd]]] - close $fd - - puts "LENGTH [format %08X $length]" - puts "CRC [format %04X $crc]" - - writeflash 0x8000 [num2bin $length 4][num2bin $crc 2] - writeimage main.bin 0x9000 - - # continue execution - cont -} - -# -# write image to SDRAM -# -proc wr {} { - set image main.bin - set SDRAM_OFFSET 0xa0000000 - - if {![wboot 0x4444DEAD]} { - return - } - - # write file data to SDRAM - set fd [open $image r] - fconfigure $fd -translation binary - writemem $SDRAM_OFFSET [read $fd] - close $fd - -# puts "dump memory" -# -# set fd [open /dev/shm/mem.dat w] -# fconfigure $fd -translation binary -# puts -nonewline $fd [readmem $SDRAM_OFFSET [file size $image]] -# close $fd -# -# puts "done" - - # continue execution - cont -} - -# -# print tasks state -# -proc pt {} { - userf 0 -} - -# -# print tasks stack level -# -proc pl {} { - userf 1 -} - -#quit ; # exit from program - DELETED util/dport/dportlib.tcl Index: util/dport/dportlib.tcl ================================================================== --- util/dport/dportlib.tcl +++ /dev/null @@ -1,176 +0,0 @@ -# -# support package -# -package provide dport 0.1 - -namespace eval ::dport { - -} - -namespace eval ::dport::util { - # - # convert binary string to list of hex numbers - # - proc bin2list {bin} { - set ret [list] - - foreach ch [split $bin {}] { - if {[binary scan $ch H2 byte]} { - lappend ret 0x$byte - } else { - error "can't convert byte" - exit 1 - } - } - return $ret - } - - # - # convert list to binary string - # - proc list2bin {lst} { - set ret {} - foreach byte $lst { - append ret [binary format c $byte] - } - return $ret - } - - # - # convert list of hexnumbers (LSB first) to one big number - # - proc list2num {data} { - set ret 0 - set idx 0 - - if {[llength $data] == 0} { - error "empty list specified" - } - - foreach byte $data { - set ret [expr {$ret | ($byte << (8 * $idx))}] - incr idx - } - - return 0x[format %02X $ret] - } - - # - # convert one big number to list (LSB - first element of list) - # - proc num2list {num size} { - set ret [list] - for {set i 0} {$i < $size} {incr i} { - lappend ret 0x[format %02x [expr {($num >> (8*$i)) & 0xff}]] - } - return $ret - } - - # - # convert binary data to number - # - proc bin2num {bin offset len} { - set result 0 - - set idx 0 - while {$len} { - if {[binary scan [string range $bin $offset end] c byte]} { - set result [expr {$result | (($byte & 0xff) << (8 * $idx))}] - } else { - error "can't convert byte" - exit 1 - } - incr len -1 - incr offset - incr idx - } - - return $result - } - - # - # convert number to binary data - # - proc num2bin {num len} { - set result {} - - while {$len} { - append result [binary format c [expr {$num & 0xff}]] - set num [expr {$num >> 8}] - incr len -1 - } - - return $result - } - - # - # convert little endian number to big endian - # - proc le2be {num len} { - set res 0 - while {$len} { - set res [expr {$res | ($num & 0xff)}] - set num [expr {$num >> 8}] - - incr len -1 - if {$len} { - set res [expr {$res << 8}] - } - } - return $res - } - - variable crc16_ccitt_table { - 0x0000 0x1021 0x2042 0x3063 0x4084 0x50a5 0x60c6 0x70e7 - 0x8108 0x9129 0xa14a 0xb16b 0xc18c 0xd1ad 0xe1ce 0xf1ef - 0x1231 0x0210 0x3273 0x2252 0x52b5 0x4294 0x72f7 0x62d6 - 0x9339 0x8318 0xb37b 0xa35a 0xd3bd 0xc39c 0xf3ff 0xe3de - 0x2462 0x3443 0x0420 0x1401 0x64e6 0x74c7 0x44a4 0x5485 - 0xa56a 0xb54b 0x8528 0x9509 0xe5ee 0xf5cf 0xc5ac 0xd58d - 0x3653 0x2672 0x1611 0x0630 0x76d7 0x66f6 0x5695 0x46b4 - 0xb75b 0xa77a 0x9719 0x8738 0xf7df 0xe7fe 0xd79d 0xc7bc - 0x48c4 0x58e5 0x6886 0x78a7 0x0840 0x1861 0x2802 0x3823 - 0xc9cc 0xd9ed 0xe98e 0xf9af 0x8948 0x9969 0xa90a 0xb92b - 0x5af5 0x4ad4 0x7ab7 0x6a96 0x1a71 0x0a50 0x3a33 0x2a12 - 0xdbfd 0xcbdc 0xfbbf 0xeb9e 0x9b79 0x8b58 0xbb3b 0xab1a - 0x6ca6 0x7c87 0x4ce4 0x5cc5 0x2c22 0x3c03 0x0c60 0x1c41 - 0xedae 0xfd8f 0xcdec 0xddcd 0xad2a 0xbd0b 0x8d68 0x9d49 - 0x7e97 0x6eb6 0x5ed5 0x4ef4 0x3e13 0x2e32 0x1e51 0x0e70 - 0xff9f 0xefbe 0xdfdd 0xcffc 0xbf1b 0xaf3a 0x9f59 0x8f78 - 0x9188 0x81a9 0xb1ca 0xa1eb 0xd10c 0xc12d 0xf14e 0xe16f - 0x1080 0x00a1 0x30c2 0x20e3 0x5004 0x4025 0x7046 0x6067 - 0x83b9 0x9398 0xa3fb 0xb3da 0xc33d 0xd31c 0xe37f 0xf35e - 0x02b1 0x1290 0x22f3 0x32d2 0x4235 0x5214 0x6277 0x7256 - 0xb5ea 0xa5cb 0x95a8 0x8589 0xf56e 0xe54f 0xd52c 0xc50d - 0x34e2 0x24c3 0x14a0 0x0481 0x7466 0x6447 0x5424 0x4405 - 0xa7db 0xb7fa 0x8799 0x97b8 0xe75f 0xf77e 0xc71d 0xd73c - 0x26d3 0x36f2 0x0691 0x16b0 0x6657 0x7676 0x4615 0x5634 - 0xd94c 0xc96d 0xf90e 0xe92f 0x99c8 0x89e9 0xb98a 0xa9ab - 0x5844 0x4865 0x7806 0x6827 0x18c0 0x08e1 0x3882 0x28a3 - 0xcb7d 0xdb5c 0xeb3f 0xfb1e 0x8bf9 0x9bd8 0xabbb 0xbb9a - 0x4a75 0x5a54 0x6a37 0x7a16 0x0af1 0x1ad0 0x2ab3 0x3a92 - 0xfd2e 0xed0f 0xdd6c 0xcd4d 0xbdaa 0xad8b 0x9de8 0x8dc9 - 0x7c26 0x6c07 0x5c64 0x4c45 0x3ca2 0x2c83 0x1ce0 0x0cc1 - 0xef1f 0xff3e 0xcf5d 0xdf7c 0xaf9b 0xbfba 0x8fd9 0x9ff8 - 0x6e17 0x7e36 0x4e55 0x5e74 0x2e93 0x3eb2 0x0ed1 0x1ef0 - } - - # - # - # - proc crc16_ccitt {crc buf} { - foreach byte $buf { - set crc [expr { - (($crc << 8) & 0xffff) ^ [lindex [set [namespace current]::crc16_ccitt_table] [expr {(($crc >> 8) ^ $byte) & 0xff}]] - }] - } - - return $crc - } - - namespace export crc16_ccitt - namespace export bin2num - namespace export num2bin - namespace export bin2list -} - DELETED util/dport/pkgIndex.tcl Index: util/dport/pkgIndex.tcl ================================================================== --- util/dport/pkgIndex.tcl +++ /dev/null @@ -1,2 +0,0 @@ -package ifneeded dport 0.1 [list source [file join $dir dportlib.tcl]] - DELETED util/dport/serial.sh Index: util/dport/serial.sh ================================================================== --- util/dport/serial.sh +++ /dev/null @@ -1,17 +0,0 @@ -#!/bin/sh - -TTY=/dev/ttyUSB0 - -if [ $# -lt 2 ]; then - echo '' - echo 'Usage:' - echo " $0 tty image" - echo '' - exit 0 -fi - -TTY=$1 -IMAGE=$2 - -lpc21isp -bin $IMAGE $TTY 57600 12000 - DELETED util/dport/src/comm.c Index: util/dport/src/comm.c ================================================================== --- util/dport/src/comm.c +++ /dev/null @@ -1,353 +0,0 @@ -#include -#include -#include -#include -#include "errcode.h" -#include "comm.h" -#include "dport_proto.h" - -//#define DEBUG_COMM - -#define COMM_RETRY_COUNT 4 -#define COMM_SEND_TIMEOUT 100 -#define COMM_RECV_TIMEOUT 500 - -static uint16 comm_num2dup(uint8 num); -static uint8 comm_dup2num(uint16 dup); -static uint8 comm_cs(uint8 *cs, uint8 *data, int len); - -static int comm_recv(struct commdev_t *commdev, struct debug_t *debug); -static int comm_getpacket(struct commdev_t *commdev, struct debug_t *debug); -static int comm_checkpacket(struct debug_t *debug); - -/* - * - */ -void comm_mkreq(struct debug_buffer_t *buf, uint8 cmd, uint8 *payload, int len) -{ - uint16 *data; - uint8 cs; - int dlen; - - /* TODO length sanity check */ - dlen = len * 2; - if (dlen > (DEBUG_BUF_SIZE - DPORT_HEADTAIL_SIZE)) - { - fprintf(stderr, "(E) overbuffer, %s", __FUNCTION__); - exit(ERRCODE_OVERBUFFER); - } - - buf->buf[0] = DPORT_CMD_MARK; - buf->buf[1] = cmd; - data = (uint16*)&buf->buf[2]; - - cs = comm_cs(&buf->buf[1], NULL, 0); - if (payload) - { - while (len--) - { - cs = comm_cs(&cs, payload, 1); - *data++ = comm_num2dup(*payload++); - } - } - *data++ = comm_num2dup(cs); - - *data = (('\n' << 8) | '\r') & 0xffff; - - buf->c = dlen + DPORT_HEADTAIL_SIZE; -} - -/* - * ARGS - * commdev communication device structure - * debug debug structure - * - * RETURN - * 0 on success, -1 on error - * - */ -int comm_txrx(struct debug_t *debug) -{ - struct commdev_t *commdev; - int ntry; - - commdev = debug->commdev; - - /* XXX not all operation can be simply retried (memory write, flash write, etc) */ - ntry = COMM_RETRY_COUNT; - while (ntry--) - { -#ifdef DEBUG_COMM - { - int i; - - printf(">> "); - for (i = 0; i < debug->tx.c; i++) - printf("%c", debug->tx.buf[i]); - } -#endif - - if (commdev_send(commdev, - debug->tx.buf, debug->tx.c, COMM_SEND_TIMEOUT) < 0) - { - fprintf(stderr, "(E) txrx, send error/timeout\n"); - goto retry; - } - - if (comm_recv(commdev, debug) < 0) - { - fprintf(stderr, "(E) txrx, recv error\n"); - goto retry; - } - - /* XXX check command */ - if (debug->tx.buf[1] != debug->rx.buf[1]) - { - fprintf(stderr, "(E) recv command mismatch , tx \"%c\", rx \"%c\", %s\n", - debug->tx.buf[1], debug->rx.buf[1], __FUNCTION__); - goto retry; - } - return 0; -retry: - if (ntry) - fprintf(stderr, "(W) %u try remains for '%c' command\n", ntry, debug->tx.buf[1]); - } - fprintf(stderr, "(E) txrx error\n"); - return -1; -} - -/* - * receive, decode packet - * - * RETURN - * 0 on success, -1 on error - */ -static int comm_recv(struct commdev_t *commdev, struct debug_t *debug) -{ - if (comm_getpacket(commdev, debug) < 0) - return -1; - - return comm_checkpacket(debug); -} - -/* - * get packet (without check) - * - * RETURN - * 0 on success, -1 on error - */ -static int comm_getpacket(struct commdev_t *commdev, struct debug_t *debug) -{ - int rd, maxlen, rxc, n; - uint8 *rxbuf, *cbuf; - - rxbuf = debug->rx.buf; - maxlen = DEBUG_BUF_SIZE; - rxc = 0; - - while (1) - { - if (maxlen == 0) - { - fprintf(stderr, "(E) overbuffer, %s\n", __FUNCTION__); - return -1; - } - - rd = commdev_recv(commdev, rxbuf, maxlen, COMM_RECV_TIMEOUT); - if (rd <= 0) - { - fprintf(stderr, "(E) recv error/timeout, %s\n", __FUNCTION__); - return -1; - } - rxc += rd; - maxlen -= rd; - - /* check for mark */ - cbuf = debug->rx.buf; - rxbuf += rd; - while (*cbuf != DPORT_CMD_MARK && rxc) - { - rxc--; - maxlen++; - cbuf++; - rxbuf--; - } - if (cbuf != debug->rx.buf && rxc) - memmove(debug->rx.buf, cbuf, rxc); - - if (!rxc) - continue; - - /* check for \n */ - cbuf = &debug->rx.buf[1]; - n = 1; - while (*cbuf != '\n' && n < rxc) - { - cbuf++; - n++; - } - if (n >= rxc) - continue; - - if (*(cbuf - 1) != '\r') - { - fprintf(stderr, "(E) CR missed, %s\n", __FUNCTION__); - return -1; - } - - n++; /* NOTE */ - -#ifdef DEBUG_COMM - { - int k; - - printf("< "); - for (k = 0; k < n; k++) - printf("%c", debug->rx.buf[k]); - } -#endif - - debug->rx.c = n; - return 0; - } - - return -1; -} - -/* - * check packet - * - * RETURN - * 0 on success, -1 on error - */ -static int comm_checkpacket(struct debug_t *debug) -{ - int rxc, dlen; - uint8 *rxbuf; - uint8 cs; - - rxc = debug->rx.c; - rxbuf = debug->rx.buf; - - /* - * Command should have even number of symbols. - * And at least 6 symbols - one symbol for MARK, - * one symbol for command, two symbols for checksum; CR symbol, - * LF symbol. - */ - if ((rxc % 2) != 0) - { - fprintf(stderr, "(E) recv odd number of symbols, %s\n", __FUNCTION__); - return -1; - } - -#ifndef DEBUG_COMM - /* TODO XXX transfrom error to text? */ - if (rxbuf[1] == DPORT_CMD_RESP_ERRCUSTOM) - { - int i; - - printf("< "); - for (i = 0; i < rxc; i++) - printf("%c", rxbuf[i]); - } -#endif - - /* transform payload of command to binary */ - { - uint8 *in; - uint8 *out; - - in = &rxbuf[2]; - out = &rxbuf[2]; - /* length of hexadecimal data transformed to binary */ - dlen = (rxc - DPORT_HEADTAIL_SIZE) / 2; - while (*in != '\r') - { - *out = comm_dup2num(*((uint16*)in)); - in += 2; - out += 1; - } - } - - /* check CS */ - cs = comm_cs(&rxbuf[1], NULL, 0); - cs = comm_cs(&cs, &rxbuf[2], dlen); - if (cs != rxbuf[2 + dlen]) - { - fprintf(stderr, "(E) recv checksum mismatch, %s\n", __FUNCTION__); - return -1; - } - - return 0; -} - -/* - * - */ -static uint16 comm_num2dup(uint8 num) -{ - uint16 ret; - uint8 n; - - ret = 0; - n = num & 0x0f; - if (n < 10) - ret |= (n + '0'); - else - ret |= (n + 'A' - 10); - - n = num >> 4; - ret <<= 8; - if (n < 10) - ret |= (n + '0'); - else - ret |= (n + 'A' - 10); - - return ret; -} - -/* - * - */ -static uint8 comm_dup2num(uint16 dup) -{ - uint8 ret; - uint8 n; - - ret = 0; - n = dup & 0xff; - if (n < 'A') - ret |= (n - '0' ) & 0x0f; - else - ret |= (n - 'A' + 10) & 0x0f; - - ret <<= 4; - n = dup >> 8; - if (n < 'A') - ret |= (n - '0' ) & 0x0f; - else - ret |= (n - 'A' + 10) & 0x0f; - - return ret; -} - -/* - * - */ -static uint8 comm_cs(uint8 *cs, uint8 *data, int len) -{ - uint8 ret; - - ret = 0; - if (cs) - ret = *cs; - if (data) - { - while (len--) - ret += *data++; - } - - return ret & 0xff; -} - DELETED util/dport/src/comm.h Index: util/dport/src/comm.h ================================================================== --- util/dport/src/comm.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef DP_PROTOCOL_H -#define DP_PROTOCOL_H - -#include -#include "debug.h" -#include "commdev.h" - -int comm_txrx(struct debug_t *debug); -void comm_mkreq(struct debug_buffer_t *buf, uint8 cmd, uint8 *payload, int len); - -#endif - DELETED util/dport/src/commdev.c Index: util/dport/src/commdev.c ================================================================== --- util/dport/src/commdev.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "commdev.h" -#include "errcode.h" - -#define COMMDEV_DEBUG - -#ifdef COMMDEV_DEBUG - #define COMMDEV_DEBUGF(...) printf(__VA_ARGS__) -#else - #define COMMDEV_DEBUGF(...) -#endif - -#define BAUDRATE B115200 - -/* - * - */ -void commdev_init() -{ - return; -} - -/* - * open USB device - * - * ARGS - * commdev pointer to commdev_t structure - */ -void commdev_open(struct commdev_t *commdev, char *dev) -{ - struct termios tios; - - commdev->fd = open(dev, O_RDWR | O_NOCTTY | O_NONBLOCK); - if (commdev->fd < 0) - { - perror(dev); - exit(ERRCODE_DEV_OPEN); - } - - tcgetattr(commdev->fd, &tios); - - /* save old setting */ - memcpy(&commdev->otios, &tios, sizeof(struct termios)); - - /* - * termios_p->c_iflag &= ~(IGNBRK | BRKINT | PARMRK | ISTRIP - * | INLCR | IGNCR | ICRNL | IXON); - * termios_p->c_oflag &= ~OPOST; - * termios_p->c_lflag &= ~(ECHO | ECHONL | ICANON | ISIG | IEXTEN); - * termios_p->c_cflag &= ~(CSIZE | PARENB); - * termios_p->c_cflag |= CS8; - */ -// cfmakeraw(&tios); - - tios.c_iflag = IGNPAR | IGNBRK; - tios.c_oflag = 0; - tios.c_cflag = CLOCAL | CS8 | CREAD; - tios.c_lflag = 0; - tios.c_cc[VMIN] = 1; - tios.c_cc[VTIME] = 0; - - cfsetospeed(&tios, BAUDRATE); - cfsetispeed(&tios, BAUDRATE); - tcsetattr(commdev->fd, TCSAFLUSH, &tios); - tcflush(commdev->fd, TCIOFLUSH); -} - -/* - * - */ -void commdev_close(struct commdev_t *commdev) -{ - tcsetattr(commdev->fd, TCSAFLUSH, &commdev->otios); - close(commdev->fd); -} - -/* - * RETURN - * count of bytes sended - * - */ -int commdev_send(struct commdev_t *commdev, uint8 *buf, int len, int timeout) -{ - fd_set wset; - int n, wr, sl; - struct timeval tv; - - n = len; - while (len) - { - FD_ZERO(&wset); - FD_SET(commdev->fd, &wset); - tv.tv_sec = timeout / 1000; - tv.tv_usec = (timeout % 1000) * 1000; - - sl = select(commdev->fd + 1, NULL, &wset, NULL, &tv); - if (sl == 0) - return 0; - if (sl < 0) - { - if (errno == EINTR) - { - printf("select EINTR\n"); - return -1; - } - - perror(__FUNCTION__); - exit(ERRCODE_COMMDEV_SELECT_SEND); - } - - wr = write(commdev->fd, buf, len); - if (wr < 0) - { - perror(__FUNCTION__); - exit(ERRCODE_COMMDEV_SEND); - } - len -= wr; - buf += wr; - } - - return n; -} - -/* - * RETURN - * zero on timeout, count of bytes received on success, -1 on EINTR, exit from program - * on errors - */ -int commdev_recv(struct commdev_t *commdev, uint8 *buf, int len, int timeout) -{ - fd_set rset; - struct timeval tv; - int sl, rd; - - FD_ZERO(&rset); - FD_SET(commdev->fd, &rset); - tv.tv_sec = timeout / 1000; - tv.tv_usec = (timeout % 1000) * 1000; - - sl = select(commdev->fd + 1, &rset, NULL, NULL, &tv); - if (sl == 0) - return 0; - if (sl < 0) - { - if (errno == EINTR) - { - printf("select EINTR\n"); - return -1; - } - - perror(__FUNCTION__); - exit(ERRCODE_COMMDEV_SELECT_RECV); - } - - rd = read(commdev->fd, buf, len); - if (rd < 0) - { - if (errno == EINTR) - { - printf("EINTR\n"); - return -1; - } - perror(__FUNCTION__); - exit(ERRCODE_COMMDEV_RECV); - } - - return rd; -} - -/* - * - */ -void commdev_exit() -{ - return; -} - DELETED util/dport/src/commdev.h Index: util/dport/src/commdev.h ================================================================== --- util/dport/src/commdev.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef COMMDEV_H -#define COMMDEV_H - -#include -#include - -struct commdev_t { - int fd; - struct termios otios; -}; - -void commdev_init(); -void commdev_open(struct commdev_t *commdev, char *dev); -void commdev_close(struct commdev_t *commdev); -int commdev_send(struct commdev_t *commdev, uint8 *buf, int len, int timeout); -int commdev_recv(struct commdev_t *commdev, uint8 *buf, int len, int timeout); -void commdev_exit(); - -#endif - DELETED util/dport/src/darm/LICENSE.txt Index: util/dport/src/darm/LICENSE.txt ================================================================== --- util/dport/src/darm/LICENSE.txt +++ /dev/null @@ -1,26 +0,0 @@ -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. DELETED util/dport/src/darm/Makefile Index: util/dport/src/darm/Makefile ================================================================== --- util/dport/src/darm/Makefile +++ /dev/null @@ -1,57 +0,0 @@ -AR = ar -CC = gcc -CFLAGS = -std=c99 -Wall -O2 -Wextra -Wno-missing-field-initializers - -# on non-windows, add -fPIC -ifneq ($(OS),Windows_NT) - CFLAGS += -fPIC - BIN_EXT = - LIB_EXT = .so -endif - -ifeq ($(OS),Windows_NT) - BIN_EXT = .exe - LIB_EXT = .dll -endif - -# on non-macosx, add -s -ifneq ($(shell uname),Darwin) - CFLAGS += -s -endif - -SRC = $(wildcard *.c) -OBJ = $(SRC:.c=.o) - -GENCODESRC = darm-tbl.c darm-tbl.h armv7-tbl.c armv7-tbl.h \ - thumb-tbl.c thumb-tbl.h thumb2-tbl.c thumb2-tbl.h -GENCODEOBJ = darm-tbl.o armv7-tbl.o thumb-tbl.o thumb2-tbl.o - -# generated stuff -GENR = $(GENCODESRC) $(GENCODEOBJ) $(OBJ) -LIBS = libdarm.a libdarm$(LIB_EXT) -TOOLS = tests/tests$(BIN_EXT) tests/expand$(BIN_EXT) utils/elfdarm$(BIN_EXT) - -STUFF = $(GENR) $(LIBS) $(TOOLS) - -default: $(STUFF) - -$(GENCODESRC): darmgen.py darmtbl.py darmtbl2.py - python darmgen.py - -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $^ - -%$(BIN_EXT): %.c - $(CC) $(CFLAGS) -o $@ $^ libdarm.a -I. -Itests - -%$(LIB_EXT): $(OBJ) $(GENCODEOBJ) - $(CC) -shared $(CFLAGS) -o $@ $^ - -%.a: $(OBJ) $(GENCODEOBJ) - $(AR) cr $@ $^ - -test: $(STUFF) - ./tests/tests$(BIN_EXT) - -clean: - rm -f $(STUFF) DELETED util/dport/src/darm/README.md Index: util/dport/src/darm/README.md ================================================================== --- util/dport/src/darm/README.md +++ /dev/null @@ -1,71 +0,0 @@ -# darm - -A light-weight and efficient ARMv7/Thumb/Thumb2 disassembler written in C with -Python bindings. VFP/Neon/SIMD (it's all the same) support is upcoming! - -# Example code - -Using the *darm* library is fairly straightforward - just call the right -function with the right parameter and you're all set. Following is an example -of disassembling an ARMv7 instruction in C and printing its string -representation to stdout. - -```c -#include -#include "darm.h" - -int main() -{ - darm_t d; darm_str_t str; - - if(darm_armv7_disasm(&d, 0x42424242) == 0 && - darm_str2(&d, &str, 1) == 0) { - - printf("-> %s\n", str.total); - } -} -``` - -And the exact same program, but using the Python bindings. - -```python -import darm - -print str(darm.disasm_armv7(0x42424242)) -``` - -# License - -The darm library is released under the **BSD 3-Clause License**, also known -as **BSD Simplified**. - -# Support & Contact - -For support and contact, feel free to check out the -[official Darm website][website], the IRC channel, **#darm** at freenode, -or you can always reach me on my email: [jurriaanbremer@gmail.com][email]. - -[website]: http://darm.re/ -[email]: mailto:jurriaanbremer@gmail.com - -# Acknowledgement - -(See also the [Contributors][contributors] page on [darm.re][].) - -Many thanks to [Valentin Pistol][pistol] without whom this project would never -have seen the light of day. - -Thanks to [Peter Geissler][blasty], [Jay Little][computerality], -[Michael Laurenzano][mlaurenzano], [Jonathan Tetteroo][jtetteroo], -[Joshua Drake][jduck], and [rednovae][] for contributions, suggestions, -additional tests, etc. - -[contributors]: http://darm.re/contributors -[darm.re]: http://darm.re/ -[pistol]: https://github.com/pistol/ -[blasty]: https://github.com/blasty/ -[computerality]: https://github.com/computerality -[mlaurenzano]: https://github.com/mlaurenzano -[jtetteroo]: https://github.com/j-tetteroo -[jduck]: https://github.com/jduck -[rednovae]: https://github.com/endeav0r DELETED util/dport/src/darm/__init__.py Index: util/dport/src/darm/__init__.py ================================================================== --- util/dport/src/darm/__init__.py +++ /dev/null @@ -1,2 +0,0 @@ -"""Simple Python init script to allow inclusion of this entire directory.""" -from darm import Darm, disasm_armv7, disasm_thumb, disasm_thumb2 DELETED util/dport/src/darm/armv7.c Index: util/dport/src/darm/armv7.c ================================================================== --- util/dport/src/darm/armv7.c +++ /dev/null @@ -1,944 +0,0 @@ -/* -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include -#include -#include "darm.h" -#include "darm-internal.h" -#include "armv7-tbl.h" - -#define BITMSK_12 ((1 << 12) - 1) -#define BITMSK_16 ((1 << 16) - 1) -#define BITMSK_24 ((1 << 24) - 1) - -#define ROR(val, rotate) (((val) >> (rotate)) | ((val) << (32 - (rotate)))) - -// the upper four bits define the rotation value, but we have to multiply the -// rotation value by two, so instead of right shifting by eight, we do a -// right shift of seven, effectively avoiding the left shift of one -#define ARMExpandImm(imm12) ROR((imm12) & 0xff, ((imm12) >> 7) & b11110) - -static struct { - const char *mnemonic_extension; - const char *meaning_integer; - const char *meaning_fp; -} g_condition_codes[] = { - {"EQ", "Equal", "Equal"}, - {"NE", "Not equal", "Not equal, or unordered"}, - {"CS", "Carry Set", "Greater than, equal, or unordered"}, - {"CC", "Carry Clear", "Less than"}, - {"MI", "Minus, negative", "Less than"}, - {"PL", "Plus, positive or zero", "Greater than, equal, or unordered"}, - {"VS", "Overflow", "Unordered"}, - {"VC", "No overflow", "Not unordered"}, - {"HI", "Unsigned higher", "Greater than, unordered"}, - {"LS", "Unsigned lower or same", "Greater than, or unordered"}, - {"GE", "Signed greater than or equal", "Greater than, or unordered"}, - {"LT", "Signed less than", "Less than, or unordered"}, - {"GT", "Signed greater than", "Greater than"}, - {"LE", "Signed less than or equal", "Less than, equal, or unordered"}, - {"AL", "Always (unconditional)", "Always (unconditional)"}, - {"", "Unconditional", "Unconditional Instruction"}, - - // alias for CS - {"HS", "Carry Set", "Greater than, equal, or unordered"}, - // alias for CC - {"LO", "Carry Clear", "Less than"}, -}; - -static const char *shift_types[] = { - "LSL", "LSR", "ASR", "ROR", -}; - -int darm_immshift_decode(const darm_t *d, const char **type, - uint32_t *immediate) -{ - if(d->shift_type == S_INVLD) { - *type = NULL, *immediate = 0; - return -1; - } - else if(d->shift_type == S_ROR && d->Rs == R_INVLD && d->shift == 0) { - *type = "RRX", *immediate = 0; - } - else { - *type = darm_shift_type_name(d->shift_type); - *immediate = d->shift; - - // 32 is encoded as 0 for immediate shifts - if((d->shift_type == S_LSR || d->shift_type == S_ASR) && - d->Rs == R_INVLD && d->shift == 0) { - *immediate = 32; - } - } - return 0; -} - -static int armv7_disas_uncond(darm_t *d, uint32_t w) -{ - d->instr_type = T_ARM_UNCOND; - - // there are not a lot of unconditional instructions, so the following - // values are a bit hardcoded - switch ((w >> 25) & b111) { - case b000: - d->instr = I_SETEND; - d->E = (w >> 9) & 1; - return 0; - - case b010: - // if the 21th bit is set, then it's one of the CLREX, DMB, DSB or ISB - // instructions - if((w >> 21) & 1) { - d->instr = type_uncond2_instr_lookup[(w >> 4) & b111]; - if(d->instr != I_INVLD) { - // if the instruction is either DMB, DSB or ISB, then the last - // four bits represent an "option" - if(d->instr != I_CLREX) { - d->option = w & b1111; - } - return 0; - } - } - // otherwise, if the 21th bit is not set, it's either the PLD or the - // PLI instruction - // we fall-through here, as 0b011 also handles the PLD and PLI - // instructions - - case b011: - // if the 24th bit is set, then this is a PLD instruction, otherwise - // it's a PLI instruction - d->instr = (w >> 24) & 1 ? I_PLD : I_PLI; - - d->Rn = (w >> 16) & b1111; - d->U = (w >> 23) & 1; - - // if the 25th bit is set, then this instruction takes a shifted - // register as offset, otherwise, it takes an immediate as offset - if((w >> 25) & 1) { - d->Rm = w & b1111; - d->shift_type = (w >> 5) & b11; - d->shift = (w >> 7) & b11111; - } - else { - d->I = B_SET; - d->imm = w & BITMSK_12; - } - - // if this instruction is PLD and the 22th bit is not set, then this - // is in fact PLDW - if(d->instr == I_PLD && ((w >> 22) & 1) == 0) { - d->instr = I_PLDW; - } - return 0; - - case b101: - d->instr = I_BLX; - d->H = (w >> 24) & 1; - d->imm = w & BITMSK_24; - d->I = B_SET; - - // check if the highest bit of the imm24 is set, if so, we - // manually sign-extend the integer - if((d->imm >> 23) & 1) { - d->imm = (d->imm | 0xff000000) << 2; - } - else { - d->imm = d->imm << 2; - } - - // add the H bit - d->imm |= d->H << 1; - return 0; - - case b111: - d->CRn = (w >> 16) & b1111; - d->coproc = (w >> 8) & b1111; - d->opc2 = (w >> 5) & b111; - d->CRm = w & b1111; - - if(((w >> 4) & 1) == 0) { - d->instr = I_CDP2; - d->CRd = (w >> 12) & b1111; - d->opc1 = (w >> 20) & b1111; - } - else { - d->instr = (w >> 20) & 1 ? I_MRC2 : I_MCR2; - d->opc1 = (w >> 21) & b111; - d->Rt = (w >> 12) & b1111; - } - return 0; - } - return -1; -} - -static int armv7_disas_cond(darm_t *d, uint32_t w) -{ - // we first handle some exceptions for MUL, STR, and LDR-like - // instructions, which don't fit in the regular table (as they interfere - // with the other instructions) - - // we have to check two parts of the encoded instruction, namely bits - // 25..27 which should be zero, and bits 4..7, of which bit 4 and bit 7 - // should be one - const uint32_t mask = (b111 << 25) | (b1001 << 4); - if((w & mask) == (b1001 << 4)) { - - // all variants of the MUL instruction - if(((w >> 24) & 1) == 0 && ((w >> 4) & b1111) == b1001) { - - d->instr = type_mul_instr_lookup[(w >> 21) & b111]; - d->instr_type = T_ARM_MUL; - - // except for UMAAL and MLS, every variant takes the S bit - d->S = (w >> 20) & 1; - - // each variant takes Rm and Rn - d->Rm = (w >> 8) & b1111; - d->Rn = w & b1111; - - // if this is the UMAAL or MLS instruction *and* the S bit is set, - // then this is an invalid instruction - if((d->instr == I_UMAAL || d->instr == I_MLS) && d->S != 0) { - return -1; - } - - switch ((uint32_t) d->instr) { - case I_MLA: case I_MLS: - d->Ra = (w >> 12) & b1111; - // fall-through - - case I_MUL: - d->Rd = (w >> 16) & b1111; - break; - - case I_UMAAL: case I_UMULL: case I_UMLAL: case I_SMULL: - case I_SMLAL: - d->RdHi = (w >> 16) & b1111; - d->RdLo = (w >> 12) & b1111; - break; - } - return 0; - } - else if(((w >> 24) & 1) == 0 && ((w >> 5) & b11) != 0 && - (w >> 21) & 1) { - - // the high 2 bits are represented by the 5th and 6th bit, the - // lower bit is represented by the 20th bit - uint32_t index = ((w >> 4) & b110) | ((w >> 20) & 1); - d->instr = type_stack1_instr_lookup[index]; - if(d->instr == I_INVLD) return -1; - - d->instr_type = T_ARM_STACK1; - d->Rn = (w >> 16) & b1111; - d->Rt = (w >> 12) & b1111; - d->P = (w >> 24) & 1; - d->U = (w >> 23) & 1; - - // depending on the register form we either have to extract a - // register or an immediate - if(((w >> 22) & 1) == 0) { - d->Rm = w & b1111; - } - else { - // the four high bits start at bit 8, so we shift them right - // to their destination - d->imm = ((w >> 4) & b11110000) | (w & b1111); - d->I = B_SET; - } - return 0; - } - else if(((w >> 5) & b11) != 0 && ((w >> 20) & b10010) != b00010) { - - // the high 2 bits are represented by the 5th and 6th bit, the - // lower bit is represented by the 20th bit - uint32_t index = ((w >> 4) & b110) | ((w >> 20) & 1); - d->instr = type_stack2_instr_lookup[index]; - if(d->instr == I_INVLD) return -1; - - d->instr_type = T_ARM_STACK2; - d->Rn = (w >> 16) & b1111; - d->Rt = (w >> 12) & b1111; - d->P = (w >> 24) & 1; - d->U = (w >> 23) & 1; - d->W = (w >> 21) & 1; - - // depending on the register form we either have to extract a - // register or an immediate - if(((w >> 22) & 1) == 0) { - d->Rm = w & b1111; - } - else { - // the four high bits start at bit 8, so we shift them right - // to their destination - d->imm = ((w >> 4) & b11110000) | (w & b1111); - d->I = B_SET; - } - return 0; - } - // synchronization primitive instructions - else if(((w >> 24) & 1) == 1 && ((w >> 4) & b1111) == b1001) { - d->instr = type_sync_instr_lookup[(w >> 20) & b1111]; - d->instr_type = T_ARM_SYNC; - d->Rn = (w >> 16) & b1111; - switch ((uint32_t) d->instr) { - case I_SWP: case I_SWPB: - d->B = (w >> 22) & 1; - d->Rt = (w >> 12) & b1111; - d->Rt2 = w & b1111; - return 0; - - case I_LDREX: case I_LDREXD: case I_LDREXB: case I_LDREXH: - d->Rt = (w >> 12) & b1111; - return 0; - - case I_STREX: case I_STREXD: case I_STREXB: case I_STREXH: - d->Rd = (w >> 12) & b1111; - d->Rt = w & b1111; - return 0; - } - } - } - // handles the STR, STRT, LDR, LDRT, STRB, STRBT, LDRB, LDRBT stack - // instructions, and the media instructions - else if(((w >> 26) & b11) == b01) { - - // if both the 25th and the 4th bit are set, then this is a media - // instruction, which is handled in the big switch-case statement - const uint32_t media_mask = (1 << 25) | (1 << 4); - if((w & media_mask) != media_mask) { - d->instr = type_stack0_instr_lookup[(w >> 20) & b11111]; - d->instr_type = T_ARM_STACK0; - - d->Rn = (w >> 16) & b1111; - d->Rt = (w >> 12) & b1111; - - // extract some flags - d->P = (w >> 24) & 1; - d->U = (w >> 23) & 1; - d->W = (w >> 21) & 1; - - // if the 25th bit is not set, then this instruction takes an - // immediate, otherwise, it takes a shifted register - if(((w >> 25) & 1) == 0) { - d->imm = w & BITMSK_12; - d->I = B_SET; - } - else { - d->shift_type = (w >> 5) & b11; - d->shift = (w >> 7) & b11111; - d->Rm = w & b1111; - } - - // if Rn == SP and P = 1 and U = 0 and W = 1 and imm12 = 4 and - // this is a STR instruction, then this is a PUSH instruction - if(d->instr == I_STR && d->Rn == SP && d->P == 1 && d->U == 0 && - d->W == 1 && d->imm == 4) { - d->instr = I_PUSH; - } - // if Rn == SP and P = 0 and U = 1 and W = 0 and imm12 = 4 and - // this is a LDR instruction, then this is a POP instruction - else if(d->instr == I_LDR && d->Rn == SP && d->P == 0 && - d->U == 1 && d->W == 0 && d->imm == 4) { - d->instr = I_POP; - } - return 0; - } - } - // handle saturating addition and subtraction instructions, these - // instructions have various masks; of bits 20..27 bit 24 is set and bits - // 21..22 specify which instruction this is, furthermore, bits 4..7 - // represent the value 0b0101 - const uint32_t mask2 = (b11111001 << 20) | (b1111 << 4); - if((w & mask2) == ((1 << 24) | (b0101 << 4))) { - d->instr = type_sat_instr_lookup[(w >> 21) & b11]; - d->instr_type = T_ARM_SAT; - d->Rn = (w >> 16) & b1111; - d->Rd = (w >> 12) & b1111; - d->Rm = w & b1111; - return 0; - } - // handle packing, unpacking, saturation, and reversal instructions, these - // instructions have the 4th bit set and bits 23..27 represent 0b01101 - const uint32_t mask3 = (b11111 << 23) | (1 << 4); - if((w & mask3) == ((b01101 << 23) | (1 << 4))) { - // some instructions are already handled elsewhere (namely, PKH, SEL, - // REV, REV16, RBIT, and REVSH) - uint32_t op1 = (w >> 20) & b111; - uint32_t A = (w >> 16) & b1111; - uint32_t op2 = (w >> 5) & b111; - - d->instr_type = T_ARM_PUSR; - - // the (SX|UX)T(A)(B|H)(16) instructions - // op1 represents the upper three bits, and A = 0b1111 represents - if(op2 == b011) { - // the lower bit - d->instr = type_pusr_instr_lookup[(op1 << 1) | (A == b1111)]; - if(d->instr != I_INVLD) { - d->Rd = (w >> 12) & b1111; - d->Rm = w & b1111; - - // rotation is shifted to the left by three, so we do this - // directly in our shift as well - d->rotate = (w >> 7) & b11000; - - // if A is not 0b1111, then A represents the Rn operand - if(A != b1111) { - d->Rn = A; - } - return 0; - } - } - - // SSAT - if((op1 & b010) == b010 && (op2 & 1) == 0) { - // if the upper bit is set, then it's USAT, otherwise SSAT - d->instr = (op1 >> 2) ? I_USAT : I_SSAT; - d->imm = (w >> 16) & b11111; - d->I = B_SET; - // signed saturate adds one to the immediate - if(d->instr == I_SSAT) { - d->imm++; - } - d->Rd = (w >> 12) & b1111; - d->shift = (w >> 7) & b11111; - d->shift_type = (w >> 5) & b11; - d->Rn = w & b1111; - return 0; - } - - // SSAT16 and USAT16 - if((op1 == b010 || op1 == b110) && op2 == b001) { - d->instr = op1 == b010 ? I_SSAT16 : I_USAT16; - d->imm = (w >> 16) & b1111; - d->I = B_SET; - // signed saturate 16 adds one to the immediate - if(d->instr == I_SSAT16) { - d->imm++; - } - d->Rd = (w >> 12) & b1111; - d->Rn = w & b1111; - return 0; - } - } - - // the instruction label - d->instr = armv7_instr_labels[(w >> 20) & 0xff]; - d->instr_type = armv7_instr_types[(w >> 20) & 0xff]; - - // do a lookup for the type of instruction - switch ((uint32_t) d->instr_type) { - case T_ARM_ARITH_SHIFT: - d->S = (w >> 20) & 1; - d->Rd = (w >> 12) & b1111; - d->Rn = (w >> 16) & b1111; - d->Rm = w & b1111; - d->shift_type = (w >> 5) & b11; - - // type == 1, shift with the value of the lower bits of Rs - if(((w >> 4) & 1) == B_SET) { - d->Rs = (w >> 8) & b1111; - } - else { - d->shift = (w >> 7) & b11111; - } - return 0; - - case T_ARM_ARITH_IMM: - d->S = (w >> 20) & 1; - d->Rd = (w >> 12) & b1111; - d->Rn = (w >> 16) & b1111; - d->imm = ARMExpandImm(w & BITMSK_12); - d->I = B_SET; - - // check whether this instruction is in fact an ADR instruction - if((d->instr == I_ADD || d->instr == I_SUB) && - d->S == 0 && d->Rn == PC) { - d->instr = I_ADR, d->Rn = R_INVLD; - d->U = (w >> 23) & 1; - } - return 0; - - case T_ARM_BITS: - d->instr = type_bits_instr_lookup[(w >> 21) & b11]; - - d->instr_type = T_ARM_BITS; - d->Rd = (w >> 12) & b1111; - d->Rn = w & b1111; - d->lsb = (w >> 7) & b11111; - - // the bfi and bfc instructions specify the MSB, whereas the SBFX and - // UBFX instructions specify the width minus one - if(d->instr == I_BFI) { - d->width = ((w >> 16) & b11111) - d->lsb + 1; - - // if Rn is 0b1111, then this is in fact the BFC instruction - if(d->Rn == b1111) { - d->Rn = R_INVLD; - d->instr = I_BFC; - } - } - else { - d->width = ((w >> 16) & b11111) + 1; - } - return 0; - - case T_ARM_BRNCHSC: - d->imm = w & BITMSK_24; - d->I = B_SET; - - // if the instruction is B or BL, then we have to sign-extend it and - // multiply it with four - if(d->instr != I_SVC) { - // check if the highest bit of the imm24 is set, if so, we - // manually sign-extend the integer - if((d->imm >> 23) & 1) { - d->imm = (d->imm | 0xff000000) << 2; - } - else { - d->imm = d->imm << 2; - } - } - return 0; - - case T_ARM_BRNCHMISC: - // first get the real instruction label - d->instr = type_brnchmisc_instr_lookup[(w >> 4) & b1111]; - - // now we do a switch statement based on the instruction label, - // rather than some magic values - switch ((uint32_t) d->instr) { - case I_BKPT: - d->imm = (((w >> 8) & BITMSK_12) << 4) + (w & b1111); - d->I = B_SET; - return 0; - - case I_BX: case I_BXJ: case I_BLX: - d->Rm = w & b1111; - return 0; - - case I_MSR: - d->Rn = w & b1111; - d->imm = (w >> 18) & b11; - d->I = B_SET; - return 0; - - case I_QSUB: case I_SMLAW: case I_SMULW: default: - // returns -1 - break; - } - break; - - case T_ARM_MOV_IMM: - d->Rd = (w >> 12) & b1111; - d->imm = w & BITMSK_12; - d->I = B_SET; - - // the MOV and MVN instructions have an S bit - if(d->instr == I_MOV || d->instr == I_MVN) { - d->S = (w >> 20) & 1; - - // the immediate values of the MOV and MVN instructions have to - // be decoded - d->imm = ARMExpandImm(d->imm); - } - // the MOVW and the MOVT instructions take another 4 bits of immediate - else { - d->imm |= ((w >> 16) & b1111) << 12; - } - return 0; - - case T_ARM_CMP_OP: - d->Rn = (w >> 16) & b1111; - d->Rm = w & b1111; - d->shift_type = (w >> 5) & b11; - - // type == 1, shift with the value of the lower bits of Rs - if(((w >> 4) & 1) == B_SET) { - d->Rs = (w >> 8) & b1111; - } - else { - d->shift = (w >> 7) & b11111; - } - return 0; - - case T_ARM_CMP_IMM: - d->Rn = (w >> 16) & b1111; - d->imm = ARMExpandImm(w & BITMSK_12); - d->I = B_SET; - return 0; - - case T_ARM_OPLESS: - d->instr = type_opless_instr_lookup[w & b111]; - return d->instr == I_INVLD ? -1 : 0; - - case T_ARM_DST_SRC: - d->instr = type_shift_instr_lookup[(w >> 4) & b1111]; - if(d->instr == I_INVLD) return -1; - - d->S = (w >> 20) & 1; - d->Rd = (w >> 12) & b1111; - d->shift_type = (w >> 5) & b11; - if((w >> 4) & 1) { - d->Rm = (w >> 8) & b1111; - d->Rn = w & b1111; - } - else { - d->Rm = w & b1111; - d->shift = (w >> 7) & b11111; - - // if this is a LSL instruction with a zero shift, then it's - // actually a MOV instruction (there's no register-shifted LSL) - if(d->instr == I_LSL && d->shift_type == S_LSL && d->shift == 0) { - d->instr = I_MOV; - - // if Rd and Rm are zero, then this is a NOP instruction - if(d->Rd == 0 && d->Rm == 0) { - d->instr = I_NOP; - d->Rd = d->Rm = R_INVLD; - } - } - - // if this is a ROR instruction with a zero shift, then it's - // actually a RRX instruction (there's no register-shifted ROR) - else if(d->instr == I_ROR && d->shift_type == S_ROR && - d->shift == 0) { - d->instr = I_RRX; - } - } - - return 0; - - case T_ARM_LDSTREGS: - d->W = (w >> 21) & 1; - d->Rn = (w >> 16) & b1111; - d->reglist = w & BITMSK_16; - - // if this is the LDM instruction and W = 1 and Rn = SP then this is - // a POP instruction - if(d->instr == I_LDM && d->W == 1 && d->Rn == SP) { - d->instr = I_POP; - } - // if this is the STMDB instruction and W = 1 and Rn = SP then this is - // the PUSH instruction - else if(d->instr == I_STMDB && d->W == 1 && d->Rn == SP) { - d->instr = I_PUSH; - } - return 0; - - case T_ARM_BITREV: - d->Rd = (w >> 12) & b1111; - d->Rm = w & b1111; - - // if this is the REV16 instruction and bits 4..7 are 0b0011, then - // this is in fact the REV instruction - if(d->instr == I_REV16 && ((w >> 4) & b1111) == b0011) { - d->instr = I_REV; - } - // if this is the REVSH instruction and bits 4..7 are 0b0011, then - // this is in fact the RBIT instruction - else if(d->instr == I_REVSH && ((w >> 4) & b1111) == b0011) { - d->instr = I_RBIT; - } - return 0; - - case T_ARM_MISC: - switch ((uint32_t) d->instr) { - case I_MVN: - d->S = (w >> 20) & 1; - d->Rd = (w >> 12) & b1111; - d->shift_type = (w >> 5) & b11; - d->Rm = w & b1111; - if(((w >> 4) & 1) == B_UNSET) { - d->shift = (w >> 7) & b11111; - } - else { - d->Rs = (w >> 8) & b1111; - } - return 0; - - case I_DBG: - d->option = w & b1111; - return 0; - - case I_SMC: - switch ((w >> 4) & b1111) { - // if the 7th bit is 1 and the 4th bit 0, then this is - // the SMUL instruction - case b1000: case b1010: case b1100: case b1110: - d->instr = I_SMUL; - d->instr_type = T_ARM_SM; - d->Rd = (w >> 16) & b1111; - d->Rm = (w >> 8) & b1111; - d->M = (w >> 6) & 1; - d->N = (w >> 5) & 1; - d->Rn = w & b1111; - break; - - // smc - case b0111: - d->instr = I_SMC; - d->imm = w & b1111; - d->I = B_SET; - break; - - // clz - case b0001: - d->instr = I_CLZ; - d->Rm = w & b1111; - d->Rd = (w >> 12) & b1111; - break; - - default: - return -1; - } - return 0; - - case I_SEL: - d->Rd = (w >> 12) & b1111; - d->Rn = (w >> 16) & b1111; - d->Rm = w & b1111; - - // the SEL and PKH instructions share the same 8-bit identifier, - // if the 5th bit is set, then this is the SEL instruction, - // otherwise it's the PKH instruction - if(((w >> 5) & 1) == 0) { - d->instr = I_PKH; - d->shift_type = (w >> 5) & b10; - d->shift = (w >> 7) & b11111; - d->T = (w >> 6) & 1; - } - return 0; - } - - case T_ARM_SM: - switch ((uint32_t) d->instr) { - case I_SMMUL: - d->Rd = (w >> 16) & b1111; - d->Ra = (w >> 12) & b1111; - d->Rm = (w >> 8) & b1111; - d->R = (w >> 5) & 1; - d->Rn = w & b1111; - - // this can be either the SMMUL, the SMMLA, or the SMMLS - // instruction, depending on the 6th bit and Ra - if((w >> 6) & 1) { - d->instr = I_SMMLS; - } - // if it's SMMUL instruction, but Ra is not 0b1111, then this is - // the SMMLA instruction - else if(d->Ra != b1111) { - d->instr = I_SMMLA; - } - return 0; - - case I_SMUSD: - d->Rd = (w >> 16) & b1111; - d->Ra = (w >> 12) & b1111; - d->Rm = (w >> 8) & b1111; - d->M = (w >> 5) & 1; - d->Rn = w & b1111; - - // this can be either the SMLAD, the SMLSD, the SMUAD, or the - // SMUSD instruction, depending on the 6th bit and Ra - if((w >> 6) & 1 && d->Rn != b1111) { - d->instr = I_SMLSD; - } - else if(((w >> 6) & 1) == 0) { - d->instr = d->Ra == b1111 ? I_SMUAD : I_SMLAD; - } - return 0; - - case I_SMLSLD: - d->RdHi = (w >> 16) & b1111; - d->RdLo = (w >> 12) & b1111; - d->Rm = (w >> 8) & b1111; - d->M = (w >> 5) & 1; - d->Rn = w & b1111; - - // if the 6th bit is zero, then this is in fact the SMLALD - // instruction - if(((w >> 6) & 1) == 0) { - d->instr = I_SMLALD; - } - return 0; - - case I_SMLA: - d->Rd = (w >> 16) & b1111; - d->Ra = (w >> 12) & b1111; - d->Rm = (w >> 8) & b1111; - d->M = (w >> 6) & 1; - d->N = (w >> 5) & 1; - d->Rn = w & b1111; - return 0; - - case I_SMLAL: - d->RdHi = (w >> 16) & b1111; - d->RdLo = (w >> 12) & b1111; - d->Rm = (w >> 8) & b1111; - d->M = (w >> 6) & 1; - d->N = (w >> 5) & 1; - d->Rn = w & b1111; - return 0; - - case I_SMUL: - // SMUL overlaps with SMC, so we define SMUL in SMC.. - break; - } - - case T_ARM_PAS: - // we have a lookup table with size 64, for all parallel signed and - // unsigned addition and subtraction instructions - // the upper three bits are represented by bits 20..22, so we only - // right-shift those 17 bytes, the lower three bits are represented - // by bits 5..7 - d->instr = type_pas_instr_lookup[((w >> 17) & b111000) | - ((w >> 5) & b111)]; - if(d->instr == I_INVLD) return -1; - - d->Rn = (w >> 16) & b1111; - d->Rd = (w >> 12) & b1111; - d->Rm = w & b1111; - return 0; - - case T_ARM_MVCR: - d->CRn = (w >> 16) & b1111; - d->coproc = (w >> 8) & b1111; - d->opc2 = (w >> 5) & b111; - d->CRm = w & b1111; - - if(((w >> 4) & 1) == 0) { - d->instr = I_CDP; - d->opc1 = (w >> 20) & b1111; - d->CRd = (w >> 12) & b1111; - } - else { - d->opc1 = (w >> 21) & b111; - d->Rt = (w >> 12) & b1111; - } - return 0; - - case T_ARM_UDF: - d->I = B_SET; - d->imm = (w & b1111) | ((w >> 4) & (BITMSK_12 << 4)); - return 0; - } - return -1; -} - -int darm_armv7_disasm(darm_t *d, uint32_t w) -{ - int ret; - - darm_init(d); - d->w = w; - d->cond = (w >> 28) & b1111; - - if(d->cond == C_UNCOND) { - ret = armv7_disas_uncond(d, w); - } - else { - ret = armv7_disas_cond(d, w); - } - - // return error - if(ret < 0) return ret; - - // if the shift-type is set to S_LSL, but Rs is R_INVLD and shift is zero, - // then there's effectively no shift, so we set shift-type to S_INVLD - if(d->shift_type == S_LSL && d->Rs == R_INVLD && d->shift == 0) { - d->shift_type = S_INVLD; - } - - return 0; -} - -const char *darm_mnemonic_name(darm_instr_t instr) -{ - return instr < ARRAYSIZE(darm_mnemonics) ? - darm_mnemonics[instr] : NULL; -} - -const char *darm_enctype_name(darm_enctype_t enctype) -{ - return enctype < ARRAYSIZE(darm_enctypes) ? - darm_enctypes[enctype] : NULL; -} - -const char *darm_register_name(darm_reg_t reg) -{ - return reg != R_INVLD && reg < (int32_t) ARRAYSIZE(darm_registers) ? - darm_registers[reg] : NULL; -} - -const char *darm_shift_type_name(darm_shift_type_t shifttype) -{ - return - shifttype != S_INVLD && shifttype < (int32_t) ARRAYSIZE(shift_types) ? - shift_types[shifttype] : NULL; -} - -const char *darm_condition_name(darm_cond_t cond, int omit_always_execute) -{ - // we don't give the AL postfix, as almost every instruction would need - // one then - if(omit_always_execute != 0 && cond == C_AL) return ""; - - return cond != C_INVLD && cond < (int32_t) ARRAYSIZE(g_condition_codes) ? - g_condition_codes[cond].mnemonic_extension : NULL; -} - -const char *darm_condition_meaning_int(darm_cond_t cond) -{ - return cond != C_INVLD && cond < (int32_t) ARRAYSIZE(g_condition_codes) ? - g_condition_codes[cond].meaning_integer : NULL; -} - -const char *darm_condition_meaning_fp(darm_cond_t cond) -{ - return cond != C_INVLD && cond < (int32_t) ARRAYSIZE(g_condition_codes) ? - g_condition_codes[cond].meaning_fp : NULL; -} - -darm_cond_t darm_condition_index(const char *condition_code) -{ - if(condition_code == NULL) return -1; - - // the "AL" condition flag - if(condition_code[0] == 0) return C_AL; - - for (uint32_t i = 0; i < ARRAYSIZE(g_condition_codes); i++) { - if(!strcmp(condition_code, g_condition_codes[i].mnemonic_extension)) { - return i; - } - } - - return C_INVLD; -} DELETED util/dport/src/darm/darm-internal.h Index: util/dport/src/darm/darm-internal.h ================================================================== --- util/dport/src/darm/darm-internal.h +++ /dev/null @@ -1,408 +0,0 @@ -/* -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -*/ -#define b0 0 -#define b1 1 -#define b10 2 -#define b11 3 -#define b100 4 -#define b101 5 -#define b110 6 -#define b111 7 -#define b1000 8 -#define b1001 9 -#define b1010 10 -#define b1011 11 -#define b1100 12 -#define b1101 13 -#define b1110 14 -#define b1111 15 -#define b10000 16 -#define b10001 17 -#define b10010 18 -#define b10011 19 -#define b10100 20 -#define b10101 21 -#define b10110 22 -#define b10111 23 -#define b11000 24 -#define b11001 25 -#define b11010 26 -#define b11011 27 -#define b11100 28 -#define b11101 29 -#define b11110 30 -#define b11111 31 -#define b100000 32 -#define b100001 33 -#define b100010 34 -#define b100011 35 -#define b100100 36 -#define b100101 37 -#define b100110 38 -#define b100111 39 -#define b101000 40 -#define b101001 41 -#define b101010 42 -#define b101011 43 -#define b101100 44 -#define b101101 45 -#define b101110 46 -#define b101111 47 -#define b110000 48 -#define b110001 49 -#define b110010 50 -#define b110011 51 -#define b110100 52 -#define b110101 53 -#define b110110 54 -#define b110111 55 -#define b111000 56 -#define b111001 57 -#define b111010 58 -#define b111011 59 -#define b111100 60 -#define b111101 61 -#define b111110 62 -#define b111111 63 -#define b1000000 64 -#define b1000001 65 -#define b1000010 66 -#define b1000011 67 -#define b1000100 68 -#define b1000101 69 -#define b1000110 70 -#define b1000111 71 -#define b1001000 72 -#define b1001001 73 -#define b1001010 74 -#define b1001011 75 -#define b1001100 76 -#define b1001101 77 -#define b1001110 78 -#define b1001111 79 -#define b1010000 80 -#define b1010001 81 -#define b1010010 82 -#define b1010011 83 -#define b1010100 84 -#define b1010101 85 -#define b1010110 86 -#define b1010111 87 -#define b1011000 88 -#define b1011001 89 -#define b1011010 90 -#define b1011011 91 -#define b1011100 92 -#define b1011101 93 -#define b1011110 94 -#define b1011111 95 -#define b1100000 96 -#define b1100001 97 -#define b1100010 98 -#define b1100011 99 -#define b1100100 100 -#define b1100101 101 -#define b1100110 102 -#define b1100111 103 -#define b1101000 104 -#define b1101001 105 -#define b1101010 106 -#define b1101011 107 -#define b1101100 108 -#define b1101101 109 -#define b1101110 110 -#define b1101111 111 -#define b1110000 112 -#define b1110001 113 -#define b1110010 114 -#define b1110011 115 -#define b1110100 116 -#define b1110101 117 -#define b1110110 118 -#define b1110111 119 -#define b1111000 120 -#define b1111001 121 -#define b1111010 122 -#define b1111011 123 -#define b1111100 124 -#define b1111101 125 -#define b1111110 126 -#define b1111111 127 -#define b10000000 128 -#define b10000001 129 -#define b10000010 130 -#define b10000011 131 -#define b10000100 132 -#define b10000101 133 -#define b10000110 134 -#define b10000111 135 -#define b10001000 136 -#define b10001001 137 -#define b10001010 138 -#define b10001011 139 -#define b10001100 140 -#define b10001101 141 -#define b10001110 142 -#define b10001111 143 -#define b10010000 144 -#define b10010001 145 -#define b10010010 146 -#define b10010011 147 -#define b10010100 148 -#define b10010101 149 -#define b10010110 150 -#define b10010111 151 -#define b10011000 152 -#define b10011001 153 -#define b10011010 154 -#define b10011011 155 -#define b10011100 156 -#define b10011101 157 -#define b10011110 158 -#define b10011111 159 -#define b10100000 160 -#define b10100001 161 -#define b10100010 162 -#define b10100011 163 -#define b10100100 164 -#define b10100101 165 -#define b10100110 166 -#define b10100111 167 -#define b10101000 168 -#define b10101001 169 -#define b10101010 170 -#define b10101011 171 -#define b10101100 172 -#define b10101101 173 -#define b10101110 174 -#define b10101111 175 -#define b10110000 176 -#define b10110001 177 -#define b10110010 178 -#define b10110011 179 -#define b10110100 180 -#define b10110101 181 -#define b10110110 182 -#define b10110111 183 -#define b10111000 184 -#define b10111001 185 -#define b10111010 186 -#define b10111011 187 -#define b10111100 188 -#define b10111101 189 -#define b10111110 190 -#define b10111111 191 -#define b11000000 192 -#define b11000001 193 -#define b11000010 194 -#define b11000011 195 -#define b11000100 196 -#define b11000101 197 -#define b11000110 198 -#define b11000111 199 -#define b11001000 200 -#define b11001001 201 -#define b11001010 202 -#define b11001011 203 -#define b11001100 204 -#define b11001101 205 -#define b11001110 206 -#define b11001111 207 -#define b11010000 208 -#define b11010001 209 -#define b11010010 210 -#define b11010011 211 -#define b11010100 212 -#define b11010101 213 -#define b11010110 214 -#define b11010111 215 -#define b11011000 216 -#define b11011001 217 -#define b11011010 218 -#define b11011011 219 -#define b11011100 220 -#define b11011101 221 -#define b11011110 222 -#define b11011111 223 -#define b11100000 224 -#define b11100001 225 -#define b11100010 226 -#define b11100011 227 -#define b11100100 228 -#define b11100101 229 -#define b11100110 230 -#define b11100111 231 -#define b11101000 232 -#define b11101001 233 -#define b11101010 234 -#define b11101011 235 -#define b11101100 236 -#define b11101101 237 -#define b11101110 238 -#define b11101111 239 -#define b11110000 240 -#define b11110001 241 -#define b11110010 242 -#define b11110011 243 -#define b11110100 244 -#define b11110101 245 -#define b11110110 246 -#define b11110111 247 -#define b11111000 248 -#define b11111001 249 -#define b11111010 250 -#define b11111011 251 -#define b11111100 252 -#define b11111101 253 -#define b11111110 254 -#define b11111111 255 -#define b00 0 -#define b01 1 -#define b10 2 -#define b11 3 -#define b000 0 -#define b001 1 -#define b010 2 -#define b011 3 -#define b100 4 -#define b101 5 -#define b110 6 -#define b111 7 -#define b0000 0 -#define b0001 1 -#define b0010 2 -#define b0011 3 -#define b0100 4 -#define b0101 5 -#define b0110 6 -#define b0111 7 -#define b1000 8 -#define b1001 9 -#define b1010 10 -#define b1011 11 -#define b1100 12 -#define b1101 13 -#define b1110 14 -#define b1111 15 -#define b00000 0 -#define b00001 1 -#define b00010 2 -#define b00011 3 -#define b00100 4 -#define b00101 5 -#define b00110 6 -#define b00111 7 -#define b01000 8 -#define b01001 9 -#define b01010 10 -#define b01011 11 -#define b01100 12 -#define b01101 13 -#define b01110 14 -#define b01111 15 -#define b10000 16 -#define b10001 17 -#define b10010 18 -#define b10011 19 -#define b10100 20 -#define b10101 21 -#define b10110 22 -#define b10111 23 -#define b11000 24 -#define b11001 25 -#define b11010 26 -#define b11011 27 -#define b11100 28 -#define b11101 29 -#define b11110 30 -#define b11111 31 -#define b000000 0 -#define b000001 1 -#define b000010 2 -#define b000011 3 -#define b000100 4 -#define b000101 5 -#define b000110 6 -#define b000111 7 -#define b001000 8 -#define b001001 9 -#define b001010 10 -#define b001011 11 -#define b001100 12 -#define b001101 13 -#define b001110 14 -#define b001111 15 -#define b010000 16 -#define b010001 17 -#define b010010 18 -#define b010011 19 -#define b010100 20 -#define b010101 21 -#define b010110 22 -#define b010111 23 -#define b011000 24 -#define b011001 25 -#define b011010 26 -#define b011011 27 -#define b011100 28 -#define b011101 29 -#define b011110 30 -#define b011111 31 -#define b100000 32 -#define b100001 33 -#define b100010 34 -#define b100011 35 -#define b100100 36 -#define b100101 37 -#define b100110 38 -#define b100111 39 -#define b101000 40 -#define b101001 41 -#define b101010 42 -#define b101011 43 -#define b101100 44 -#define b101101 45 -#define b101110 46 -#define b101111 47 -#define b110000 48 -#define b110001 49 -#define b110010 50 -#define b110011 51 -#define b110100 52 -#define b110101 53 -#define b110110 54 -#define b110111 55 -#define b111000 56 -#define b111001 57 -#define b111010 58 -#define b111011 59 -#define b111100 60 -#define b111101 61 -#define b111110 62 -#define b111111 63 DELETED util/dport/src/darm/darm.c Index: util/dport/src/darm/darm.c ================================================================== --- util/dport/src/darm/darm.c +++ /dev/null @@ -1,723 +0,0 @@ -/* -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include -#include -#include -#include "darm.h" -#include "darm-internal.h" - -#define APPEND(out, ptr) \ - do { \ - const char *p = ptr; \ - if(p != NULL) while (*p != 0) *out++ = *p++; \ - } while (0); - -static int _utoa(unsigned int value, char *out, int base) -{ - char buf[30]; unsigned int i, counter = 0; - - if(value == 0) { - buf[counter++] = '0'; - } - - for (; value != 0; value /= base) { - buf[counter++] = "0123456789abcdef"[value % base]; - } - - for (i = 0; i < counter; i++) { - out[i] = buf[counter - i - 1]; - } - - return counter; -} - -static int _append_imm(char *arg, uint32_t imm) -{ - const char *start = arg; - if(imm > 0x1000) { - *arg++ = '0'; - *arg++ = 'x'; - arg += _utoa(imm, arg, 16); - } - else { - arg += _utoa(imm, arg, 10); - } - return arg - start; -} - -void darm_init(darm_t *d) -{ - // initialize the entire darm state in order to make sure that no members - // contain undefined data - memset(d, 0, sizeof(darm_t)); - d->instr = I_INVLD; - d->instr_type = T_INVLD; - d->shift_type = S_INVLD; - d->S = d->E = d->U = d->H = d->P = d->I = B_INVLD; - d->R = d->T = d->W = d->M = d->N = d->B = B_INVLD; - d->Rd = d->Rn = d->Rm = d->Ra = d->Rt = R_INVLD; - d->Rt2 = d->RdHi = d->RdLo = d->Rs = R_INVLD; - d->option = O_INVLD; - // TODO set opc and coproc? to what value? - d->CRn = d->CRm = d->CRd = R_INVLD; - d->firstcond = C_INVLD, d->mask = 0; -} - -int darm_disasm(darm_t *d, uint16_t w, uint16_t w2, uint32_t addr) -{ - // if the least significant bit is not set, then this is - // an ARMv7 instruction - if((addr & 1) == 0) { - - // disassemble and check for error return values - if(darm_armv7_disasm(d, (w2 << 16) | w) < 0) { - return 0; - } - else { - return 2; - } - } - - // magic table constructed based on section A6.1 of the ARM manual - static uint8_t is_thumb2[0x20] = { - [b11101] = 1, - [b11110] = 1, - [b11111] = 1, - }; - - // check whether this is a Thumb or Thumb2 instruction - if(is_thumb2[w >> 11] == 0) { - - // this is a Thumb instruction - if(darm_thumb_disasm(d, w) < 0) { - return 0; - } - else { - return 1; - } - } - - // this is a Thumb2 instruction - if(darm_thumb2_disasm(d, w, w2) < 0) { - return 0; - } - else { - return 2; - } -} - -int darm_str(const darm_t *d, darm_str_t *str) -{ - if(d->instr == I_INVLD || d->instr >= ARRAYSIZE(darm_mnemonics)) { - return -1; - } - - // the format string index - uint32_t idx = 0; - - // the offset in the format string - uint32_t off = 0; - - // argument index - uint32_t arg = 0; - - // pointers to the arguments - char *args[] = { - str->arg[0], str->arg[1], str->arg[2], - str->arg[3], str->arg[4], str->arg[5], - }; - - // ptr to the output mnemonic - char *mnemonic = str->mnemonic; - APPEND(mnemonic, darm_mnemonic_name(d->instr)); - - char *shift = str->shift; - - // there are a couple of instructions in the Thumb instruction set which - // do not have an equivalent in ARMv7, hence they'll not have an ARMv7 - // format string - we handle these instructions in a hacky way for now.. - switch (d->instr) { - case I_CPS: - case I_IT: - // TODO - return -1; - - case I_CBZ: - case I_CBNZ: - APPEND(args[arg], darm_register_name(d->Rn)); - arg++; - APPEND(args[arg], "#+"); - args[arg] += _append_imm(args[arg], d->imm); - goto finalize; - - default: - break; - } - - const char **ptrs = armv7_format_strings[d->instr]; - if(ptrs[0] == NULL) return -1; - - for (char ch; (ch = ptrs[idx][off]) != 0; off++) { - switch (ch) { - case 's': - if(d->S == B_SET) { - *mnemonic++ = 'S'; - } - continue; - - case 'c': - APPEND(mnemonic, darm_condition_name(d->cond, 1)); - continue; - - case 'd': - if(d->Rd == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->Rd)); - arg++; - continue; - - case 'n': - if(d->Rn == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->Rn)); - arg++; - continue; - - case 'm': - if(d->Rm == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->Rm)); - arg++; - continue; - - case 'a': - if(d->Ra == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->Ra)); - arg++; - continue; - - case 't': - if(d->Rt == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->Rt)); - arg++; - continue; - - case '2': - // first check if Rt2 is actually set - if(d->Rt2 != R_INVLD) { - APPEND(args[arg], darm_register_name(d->Rt2)); - arg++; - continue; - } - // for some instructions, Rt2 = Rt + 1 - else if(d->Rt != R_INVLD) { - APPEND(args[arg], darm_register_name(d->Rt + 1)); - arg++; - continue; - } - break; - - case 'h': - if(d->RdHi == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->RdHi)); - arg++; - continue; - - case 'l': - if(d->RdLo == R_INVLD) break; - APPEND(args[arg], darm_register_name(d->RdLo)); - arg++; - continue; - - case 'i': - // check if an immediate has been set - if(d->I != B_SET) break; - - *args[arg]++ = '#'; - args[arg] += _append_imm(args[arg], d->imm); - arg++; - continue; - - case 'S': - // is there even a shift? - if(d->shift_type == S_INVLD) continue; - - if(d->P == B_SET) { - // we're still inside the memory address - shift = args[arg] - 1; - *shift++ = ','; - *shift++ = ' '; - } - - if(d->Rs == R_INVLD) { - const char *type; uint32_t imm; - if(darm_immshift_decode(d, &type, &imm) == 0) { - switch (d->instr) { - case I_LSL: case I_LSR: case I_ASR: - case I_ROR: case I_RRX: - break; - - default: - APPEND(shift, type); - *shift++ = ' '; - } - *shift++ = '#'; - shift += _utoa(imm, shift, 10); - } - else if(d->P == B_SET) { - // we're still in the memory address, but there was - // no shift, so we have to revert the shift pointer so - // it will write a closing bracket again - shift -= 2; - } - } - else { - APPEND(shift, darm_shift_type_name(d->shift_type)); - *shift++ = ' '; - APPEND(shift, darm_register_name(d->Rs)); - } - - if(d->P == B_SET) { - // close the memory address - *shift++ = ']'; - - // reset shift - args[arg] = shift; - shift = str->shift; - } - continue; - - case '!': - if(d->W == B_SET) { - *args[arg-1]++ = '!'; - } - continue; - - case 'e': - args[arg] += _utoa(d->E, args[arg], 10); - continue; - - case 'x': - if(d->M == B_SET) { - *mnemonic++ = 'x'; - } - continue; - - case 'X': - // if the flags are not set, then this instruction doesn't take - // the (B|T)(B|T) postfix - if(d->N == B_INVLD || d->M == B_INVLD) break; - - *mnemonic++ = d->N == B_SET ? 'T' : 'B'; - *mnemonic++ = d->M == B_SET ? 'T' : 'B'; - continue; - - case 'R': - if(d->R == B_SET) { - *mnemonic++ = 'R'; - } - continue; - - case 'T': - APPEND(mnemonic, d->T == B_SET ? "TB" : "BT"); - continue; - - case 'r': - if(d->reglist != 0) { - args[arg] += darm_reglist(d->reglist, args[arg]); - } - else { - *args[arg]++ = '{'; - APPEND(args[arg], darm_register_name(d->Rt)); - *args[arg]++ = '}'; - } - continue; - - case 'L': - *args[arg]++ = '#'; - args[arg] += _utoa(d->lsb, args[arg], 10); - arg++; - continue; - - case 'w': - *args[arg]++ = '#'; - args[arg] += _utoa(d->width, args[arg], 10); - arg++; - continue; - - case 'o': - *args[arg]++ = '#'; - args[arg] += _utoa(d->option, args[arg], 10); - arg++; - continue; - - case 'B': - *args[arg]++ = '['; - APPEND(args[arg], darm_register_name(d->Rn)); - - // if post-indexed or the index is not even set, then we close - // the memory address - if(d->P != B_SET) { - *args[arg++]++ = ']'; - } - else { - *args[arg]++ = ','; - *args[arg]++ = ' '; - } - continue; - - case 'O': - // if the Rm operand is set, then this is about the Rm operand, - // otherwise it's about the immediate - if(d->Rm != R_INVLD) { - - // negative offset - if(d->U == B_UNSET) { - *args[arg]++ = '-'; - } - - APPEND(args[arg], darm_register_name(d->Rm)); - - // if post-indexed this was a stand-alone operator one - if(d->P == B_UNSET) { - arg++; - } - } - // if there's an immediate, append it - else if(d->imm != 0) { - // negative offset? - APPEND(args[arg], d->U == B_UNSET ? "#-" : "#"); - args[arg] += _append_imm(args[arg], d->imm); - } - else { - // there's no immediate, so we have to remove the ", " which - // was introduced by the base register of the memory address - args[arg] -= 2; - } - - // if pre-indexed, close the memory address, but don't increase - // arg so we can alter it in the shift handler - if(d->P == B_SET) { - *args[arg]++ = ']'; - - // if pre-indexed and write-back, then add an exclamation mark - if(d->W == B_SET) { - *args[arg]++ = '!'; - } - } - continue; - - case 'b': - // BLX first checks for branch and only then for the conditional - // version which takes the Rm as operand, so let's see if the - // branch stuff has been initialized yet - if(d->instr == I_BLX && d->H == B_INVLD) break; - - // check whether the immediate is negative - int32_t imm = d->imm; - if(imm < 0 && imm >= -0x1000) { - APPEND(args[arg], "#+-"); - imm = -imm; - } - else if(d->U == B_UNSET) { - APPEND(args[arg], "#+-"); - } - else { - APPEND(args[arg], "#+"); - } - args[arg] += _append_imm(args[arg], imm); - continue; - - case 'M': - *args[arg]++ = '['; - APPEND(args[arg], darm_register_name(d->Rn)); - - // if the Rm operand is defined, then we use that optionally with - // a shift, otherwise there might be an immediate value as offset - if(d->Rm != R_INVLD) { - APPEND(args[arg], ", "); - APPEND(args[arg], darm_register_name(d->Rm)); - - const char *type; uint32_t imm; - if(darm_immshift_decode(d, &type, &imm) == 0) { - APPEND(args[arg], ", "); - APPEND(args[arg], type); - APPEND(args[arg], " #"); - args[arg] += _utoa(imm, args[arg], 10); - } - } - else if(d->imm != 0) { - APPEND(args[arg], ", "); - - // negative offset? - APPEND(args[arg], d->U == B_UNSET ? "#-" : "#"); - args[arg] += _append_imm(args[arg], d->imm); - } - - *args[arg]++ = ']'; - - // if index is true and write-back is true, then we add an - // exclamation mark - if(d->P == B_SET && d->W == B_SET) { - *args[arg]++ = '!'; - } - continue; - - case 'A': - if(d->rotate != 0) { - APPEND(args[arg], "ROR #"); - args[arg] += _utoa(d->rotate, args[arg], 10); - } - continue; - - case 'C': - args[arg] += _utoa(d->coproc, args[arg], 10); - arg++; - continue; - - case 'p': - args[arg] += _utoa(d->opc1, args[arg], 10); - arg++; - continue; - - case 'P': - args[arg] += _utoa(d->opc2, args[arg], 10); - arg++; - continue; - - case 'N': - APPEND(args[arg], "cr"); - args[arg] += _utoa(d->CRn, args[arg], 10); - arg++; - continue; - - case 'J': - APPEND(args[arg], "cr"); - args[arg] += _utoa(d->CRm, args[arg], 10); - arg++; - continue; - - case 'I': - APPEND(args[arg], "cr"); - args[arg] += _utoa(d->CRd, args[arg], 10); - arg++; - continue; - - default: - return -1; - } - - if(ptrs[++idx] == NULL || idx == 3) return -1; - off--; - } - -finalize: - - *mnemonic = *shift = 0; - *args[0] = *args[1] = *args[2] = *args[3] = *args[4] = *args[5] = 0; - - char *instr = str->total; - APPEND(instr, str->mnemonic); - - for (int i = 0; i < 6 && args[i] != str->arg[i]; i++) { - if(i != 0) *instr++ = ','; - *instr++ = ' '; - APPEND(instr, str->arg[i]); - } - - if(shift != str->shift) { - *instr++ = ','; - *instr++ = ' '; - APPEND(instr, str->shift); - } - - *instr = 0; - return 0; -} - -int darm_str2(const darm_t *d, darm_str_t *str, int lowercase) -{ - if(darm_str(d, str) < 0) { - return -1; - } - - if(lowercase != 0) { - // just lowercase the entire object, including null-bytes - char *buf = (char *) str; - for (uint32_t i = 0; i < sizeof(darm_str_t); i++) { - buf[i] = tolower(buf[i]); - } - } - return 0; -} - -int darm_reglist(uint16_t reglist, char *out) -{ - char *base = out; - - if(reglist == 0) return -1; - - *out++ = '{'; - - while (reglist != 0) { - // count trailing zero's - int32_t reg, start = __builtin_ctz(reglist); - - // most registers have length two - *(uint16_t *) out = *(uint16_t *) darm_registers[start]; - out[2] = darm_registers[start][2]; - out += 2 + (out[2] != 0); - - for (reg = start; reg == __builtin_ctz(reglist); reg++) { - // unset this bit - reglist &= ~(1 << reg); - } - - // if reg is not start + 1, then this means that a series of - // consecutive registers have been identified - if(reg != start + 1) { - // if reg is start + 2, then this means that two consecutive - // registers have been found, but we prefer the notation - // {r0,r1} over {r0-r1} in that case - *out++ = reg == start + 2 ? ',' : '-'; - *(uint16_t *) out = *(uint16_t *) darm_registers[reg-1]; - out[2] = darm_registers[reg-1][2]; - out += 2 + (out[2] != 0); - } - *out++ = ','; - } - - out[-1] = '}'; - *out = 0; - return out - base; -} - -void darm_dump(const darm_t *d) -{ - printf( - "encoded: 0x%08x\n" - "instr: I_%s\n" - "instr-type: T_%s\n", - d->w, darm_mnemonic_name(d->instr), - darm_enctype_name(d->instr_type)); - - if(d->cond == C_UNCOND) { - printf("cond: unconditional\n"); - } - else if(d->cond != C_INVLD) { - printf("cond: C_%s\n", darm_condition_name(d->cond, 0)); - } - -#define PRINT_REG(reg) if(d->reg != R_INVLD) \ - printf("%-5s %s\n", #reg ":", darm_register_name(d->reg)) - - PRINT_REG(Rd); - PRINT_REG(Rn); - PRINT_REG(Rm); - PRINT_REG(Ra); - PRINT_REG(Rt); - PRINT_REG(Rt2); - PRINT_REG(RdHi); - PRINT_REG(RdLo); - - if(d->I == B_SET) { - printf("imm: 0x%08x %d\n", d->imm, d->imm); - } - -#define PRINT_FLAG(flag, comment, comment2) if(d->flag != B_INVLD) \ - printf("%s: %d (%s)\n", #flag, d->flag, \ - d->flag == B_SET ? comment : comment2) - - PRINT_FLAG(B, "swap one byte", "swap four bytes"); - PRINT_FLAG(S, "updates conditional flag", - "does NOT update conditional flags"); - PRINT_FLAG(E, "change to big endian", "change to little endian"); - PRINT_FLAG(U, "add offset to address", "subtract offset from address"); - PRINT_FLAG(H, "Thumb2 instruction is two-byte aligned", - "Thumb2 instruction is four-byte aligned"); - PRINT_FLAG(P, "pre-indexed addressing", "post-indexed addressing"); - PRINT_FLAG(M, "take the top halfword as source", - "take the bottom halfword as source"); - PRINT_FLAG(N, "take the top halfword as source", - "take the bottom halfword as source"); - PRINT_FLAG(T, "PKHTB form", "PKHBT form"); - PRINT_FLAG(R, "round the result", "do NOT round the result"); - PRINT_FLAG(W, "write-back", "do NOT write-back"); - PRINT_FLAG(I, "immediate present", "no immediate present"); - - if(d->option != O_INVLD) { - printf("option: %d\n", d->option); - } - - if(d->rotate != 0) { - printf("rotate: %d\n", d->rotate); - } - - if(d->shift_type != S_INVLD) { - if(d->Rs == R_INVLD) { - printf( - "type: %s (shift type)\n" - "shift: %-2d (shift constant)\n", - darm_shift_type_name(d->shift_type), d->shift); - } - else { - printf( - "type: %s (shift type)\n" - "Rs: %s (register-shift)\n", - darm_shift_type_name(d->shift_type), - darm_register_name(d->Rs)); - } - } - - if(d->lsb != 0 || d->width != 0) { - printf( - "lsb: %d\n" - "width: %d\n", - d->lsb, d->width); - } - - if(d->reglist != 0) { - char reglist[64]; - darm_reglist(d->reglist, reglist); - printf("reglist: %s\n", reglist); - } - if (d->sat_imm != 0) { - printf("sat_imm: 0x%08x %d\n", d->sat_imm, d->sat_imm); - } - - if(d->opc1 != 0 || d->opc2 != 0 || d->coproc != 0) { - printf("opc1: %d\n", d->opc1); - printf("opc2: %d\n", d->opc2); - printf("coproc: %d\n", d->coproc); - } - PRINT_REG(CRn); - PRINT_REG(CRm); - PRINT_REG(CRd); - - printf("\n"); -} DELETED util/dport/src/darm/darm.h Index: util/dport/src/darm/darm.h ================================================================== --- util/dport/src/darm/darm.h +++ /dev/null @@ -1,272 +0,0 @@ -/* -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef __DARM__ -#define __DARM__ - -#include "armv7-tbl.h" - -#ifndef ARRAYSIZE -#define ARRAYSIZE(arr) (sizeof(arr) / sizeof((arr)[0])) -#endif - -#define B_UNSET 0 -#define B_SET 1 -#define B_INVLD 2 - -typedef enum _darm_reg_t { - r0 = 0, r1 = 1, r2 = 2, r3 = 3, r4 = 4, r5 = 5, r6 = 6, r7 = 7, r8 = 8, - r9 = 9, r10 = 10, r11 = 11, r12 = 12, r13 = 13, r14 = 14, r15 = 15, - - FP = 11, IP = 12, SP = 13, LR = 14, PC = 15, - - cr0 = 0, cr1 = 1, cr2 = 2, cr3 = 3, cr4 = 4, cr5 = 5, cr6 = 6, cr7 = 7, - cr8 = 8, cr9 = 9, cr10 = 10, cr11 = 11, cr12 = 12, cr13 = 13, cr14 = 14, - cr15 = 15, - - R_INVLD = -1 -} darm_reg_t; - -typedef enum _darm_cond_t { - C_EQ = 0, C_NE = 1, C_CS = 2, C_CC = 3, C_MI = 4, - C_PL = 5, C_VS = 6, C_VC = 7, C_HI = 8, C_LS = 9, - C_GE = 10, C_LT = 11, C_GT = 12, C_LE = 13, C_AL = 14, - - C_HS = C_CS, C_LO = C_CC, - C_UNCOND = 15, - - C_INVLD = -1 -} darm_cond_t; - -typedef enum _darm_shift_type_t { - S_LSL = 0, S_LSR = 1, S_ASR = 2, S_ROR = 3, - - S_INVLD = -1, -} darm_shift_type_t; - -typedef enum _darm_option_t { - O_SY = 15, // b1111 - O_ST = 14, // b1110 - O_ISH = 11, // b1011 - O_ISHST = 10, // b1010 - O_NSH = 7, // b0111 - O_NSHST = 6, // b0110 - O_OSH = 3, // b0011 - O_OSHST = 2, // b0010 - - O_INVLD = -1, -} darm_option_t; - -typedef struct _darm_t { - // the original encoded instruction - uint32_t w; - - // the instruction label - darm_instr_t instr; - darm_enctype_t instr_type; - darm_enctype_t instr_imm_type; // thumb2 immediate type - darm_enctype_t instr_flag_type; // thumb2 flag type - - // conditional flags, if any - darm_cond_t cond; - - // if set, swap only one byte, otherwise swap four bytes - uint32_t B; - - // does this instruction update the conditional flags? - uint32_t S; - - // endian specifier for the SETEND instruction - uint32_t E; - - // whether halfwords should be swapped before various signed - // multiplication operations - uint32_t M; - - // specifies, together with the M flag, which half of the source - // operand is used to multiply - uint32_t N; - - // option operand for the DMB, DSB and ISB instructions - darm_option_t option; - - // to add or to subtract the immediate, this is used for instructions - // which take a relative offset to a pointer or to the program counter - uint32_t U; - - // the bit for the unconditional BLX instruction which allows one to - // branch with link to a 2-byte aligned thumb2 instruction - uint32_t H; - - // specifies whether this instruction uses pre-indexed addressing or - // post-indexed addressing - uint32_t P; - - // specifies whether signed multiplication results should be rounded - // or not - uint32_t R; - - // the PKH instruction has two variants, namely, PKHBT and PKHTB, the - // tbform is represented by T, i.e., if T = 1 then the instruction is - // PKHTB, otherwise it's PKHBT - uint32_t T; - - // write-back bit - uint32_t W; - - // flag which specifies whether an immediate has been set - uint32_t I; - - // rotation value - uint32_t rotate; - - // register operands - darm_reg_t Rd; // destination - darm_reg_t Rn; // first operand - darm_reg_t Rm; // second operand - darm_reg_t Ra; // accumulate operand - darm_reg_t Rt; // transferred operand - darm_reg_t Rt2; // second transferred operand - - // for instructions which produce a 64bit output we have to specify a - // high and a low 32bits destination register - darm_reg_t RdHi; // high 32bits destination - darm_reg_t RdLo; // low 32bits destination - - // immediate operand - uint32_t imm; - uint32_t sat_imm; - - // register shift info - darm_shift_type_t shift_type; - darm_reg_t Rs; - uint32_t shift; - - // certain instructions operate on bits, they specify the lowest or highest - // significant bit to be used, as well as the width, the amount of bits - // that are affected - uint32_t lsb; - uint32_t msb; - uint32_t width; - - // bitmask of registers affected by the STM/LDM/PUSH/POP instruction - uint16_t reglist; - - // special registers and values for the MRC/MCR/etc instructions - uint8_t coproc; - uint8_t opc1; - uint8_t opc2; - darm_reg_t CRd; - darm_reg_t CRn; - darm_reg_t CRm; - uint32_t D; - - // condition and mask for the IT instruction - darm_cond_t firstcond; - uint8_t mask; -} darm_t; - -typedef struct _darm_str_t { - // the full mnemonic, including extensions, flags, etc. - char mnemonic[12]; - - // a representation of each argument in a separate string - char arg[6][32]; - - // representation of shifting, if present - char shift[12]; - - // the entire instruction - char total[64]; -} darm_str_t; - -// reset a darm object, this function is internally called right before using -// any of the disassemble routines, hence a user is normally not required to -// call this function beforehand -void darm_init(darm_t *d); - -// disassemble an armv7 instruction -int darm_armv7_disasm(darm_t *d, uint32_t w); - -// disassemble a thumb instruction -int darm_thumb_disasm(darm_t *d, uint16_t w); - -// disassemble a thumb2 instruction -int darm_thumb2_disasm(darm_t *d, uint16_t w, uint16_t w2); - -// -// Disassembles an instruction - determines instruction set -// (ARMv7 or Thumb/Thumb2) based on the address and determines Thumb or -// Thumb2 mode based on the instruction itself. -// -// Takes two 16 bit words as input, the first representing the lower 16 bits -// and the second 16 bit word representing the upper 16 bits of the possibly -// full 32 bits. -// -// Returns 0 on failure, 1 for Thumb, 2 for Thumb2, and 2 for ARMv7. In other -// words, the function returns the amount of 16 bit words that were used to -// disassemble this instruction. -// -// Note that, in order to instruct the disassembler to disassemble a Thumb or -// Thumb2 instruction, the address has to have the least significant bit set. -// That is, given a 4-byte aligned addr, addr is disassembled as 32bit ARMv7 -// instruction, addr+1 is disassembled as Thumb or Thumb2 instruction, and -// addr+3 is also disassembled as Thumb/Thumb2. Furthermore, addr+2 is -// disassembled as ARMv7, but do not rely on this being defined behavior in -// the ARM CPU. -// -int darm_disasm(darm_t *d, uint16_t w, uint16_t w2, uint32_t addr); - -int darm_immshift_decode(const darm_t *d, const char **type, - uint32_t *immediate); - -const char *darm_mnemonic_name(darm_instr_t instr); -const char *darm_enctype_name(darm_enctype_t enctype); -const char *darm_register_name(darm_reg_t reg); -const char *darm_shift_type_name(darm_shift_type_t shifttype); - -// postfix for each condition, e.g., EQ, NE -const char *darm_condition_name(darm_cond_t cond, int omit_always_execute); - -// meaning if this condition is used for regular instructions -const char *darm_condition_meaning_int(darm_cond_t cond); - -// meaning if this condition is used for floating point instructions -const char *darm_condition_meaning_fp(darm_cond_t cond); - -// look up a condition code, e.g., "EQ" => C_EQ -darm_cond_t darm_condition_index(const char *condition_code); - -int darm_reglist(uint16_t reglist, char *out); -void darm_dump(const darm_t *d); - -int darm_str(const darm_t *d, darm_str_t *str); -int darm_str2(const darm_t *d, darm_str_t *str, int lowercase); - -#endif DELETED util/dport/src/darm/darm.py Index: util/dport/src/darm/darm.py ================================================================== --- util/dport/src/darm/darm.py +++ /dev/null @@ -1,315 +0,0 @@ -""" -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -""" -from ctypes import cdll, Structure, byref, POINTER, create_string_buffer -from ctypes import c_uint8, c_uint16, c_int32, c_uint32, c_char_p, c_char -import os.path - - -class _Base: - def __init__(self, idx): - self.idx = idx - - def __int__(self): - return self.idx - - def __nonzero__(self): - return self.idx != self._nonzero - - __bool__ = __nonzero__ - - -class Condition(_Base): - _nonzero = -1 - - def __str__(self): - return _lib.darm_condition_name(self.idx, 0) - - def __repr__(self): - return 'C_%s' % self.__str__() - - -class Instruction(_Base): - _nonzero = 0 - - def __str__(self): - return _lib.darm_mnemonic_name(self.idx) - - def __repr__(self): - return 'I_%s' % self.__str__() - - -class Register(_Base): - _nonzero = -1 - - def __str__(self): - return _lib.darm_register_name(self.idx) - - def __repr__(self): - return self.__str__() - - -class Encoding(_Base): - _nonzero = 0 - - def __str__(self): - return _lib.darm_enctype_name(self.idx) - - def __repr__(self): - return 'T_%s' % self.__str__() - - -class Shift: - def __init__(self, type_, Rs, shift): - self.type_ = type_ - self.Rs = Rs - self.shift = shift - - def type_name(self): - return 'S_' + _lib.darm_shift_type_name(self.type_) - - def __str__(self): - type_name = self.type_name() - if self.Rs: - return '%s %s' % (type_name, self.Rs) - else: - return '%s #%d' % (type_name, self.shift) - - def __repr__(self): - type_name = self.type_name() - if self.Rs: - return 'Shift(type_=%s, Rs=%s)' % (type_name, self.Rs) - else: - return 'Shift(type_=%s, shift=%d)' % (type_name, self.shift) - - def __nonzero__(self): - return self.type_ != -1 - - -class RegisterList: - def __init__(self, reglist): - self.reglist = reglist - - def __str__(self): - buf = create_string_buffer(64) - _lib.darm_reglist(self.reglist, buf) - return buf.value - - def __nonzero__(self): - return self.reglist != 0 - - __bool__ = __nonzero__ - - -def flag(v): - """Boolean flag. - - http://thedailywtf.com/Articles/What_Is_Truth_0x3f_.aspx - - """ - return {0: False, 1: True, 2: None}[v] - - -class _Darm(Structure): - _fields_ = [ - ('w', c_uint32), - ('instr', c_uint32), - ('instr_type', c_uint32), - ('instr_imm_type', c_uint32), - ('instr_flag_type', c_uint32), - ('cond', c_uint32), - ('B', c_uint32), - ('S', c_uint32), - ('E', c_uint32), - ('M', c_uint32), - ('N', c_uint32), - ('option', c_int32), - ('U', c_uint32), - ('H', c_uint32), - ('P', c_uint32), - ('R', c_uint32), - ('T', c_uint32), - ('W', c_uint32), - ('I', c_uint32), - ('rotate', c_int32), - ('Rd', c_int32), - ('Rn', c_int32), - ('Rm', c_int32), - ('Ra', c_int32), - ('Rt', c_int32), - ('Rt2', c_int32), - ('RdHi', c_int32), - ('RdLo', c_int32), - ('imm', c_uint32), - ('sat_imm', c_uint32), - ('type_', c_int32), - ('Rs', c_int32), - ('shift', c_uint32), - ('lsb', c_uint32), - ('msb', c_uint32), - ('width', c_uint32), - ('reglist', c_uint16), - ('coproc', c_uint8), - ('opc1', c_uint8), - ('opc2', c_uint8), - ('CRd', c_int32), - ('CRn', c_int32), - ('CRm', c_int32), - ('D', c_int32), - ('firstcond', c_int32), - ('mask', c_uint8), - ] - - -class _DarmStr(Structure): - _fields_ = [ - ('mnemonic', c_char * 12), - ('arg0', c_char * 32), - ('arg1', c_char * 32), - ('arg2', c_char * 32), - ('arg3', c_char * 32), - ('arg4', c_char * 32), - ('arg5', c_char * 32), - ('shift', c_char * 12), - ('total', c_char * 64), - ] - - -class Darm: - _flags = 'B', 'S', 'E', 'M', 'N', 'U', 'H', 'P', 'R', 'T', 'W', 'I' - _regs = 'Rd', 'Rn', 'Rm', 'Ra', 'Rt', 'Rt2', 'RdHi', 'RdLo' - - def __init__(self, d): - self.d = d - self.w = d.w - self.instr = Instruction(d.instr) - self.instr_type = Encoding(d.instr_type) - self.cond = Condition(d.cond) - - for x in self._flags: - setattr(self, x, flag(getattr(d, x))) - - for x in self._regs: - r = getattr(d, x) - setattr(self, x, Register(r) if r >= 0 else None) - - self.rotate = d.rotate - self.option = d.option - self.imm = d.imm - self.shift = Shift(d.type_, - Register(d.Rs) if d.Rs >= 0 else None, - d.shift) - self.lsb = d.lsb - self.width = d.width - self.reglist = RegisterList(d.reglist) - - def __repr__(self): - g = lambda x: getattr(self, x) - - args = [] - - # registers - args += ['%s=%s' % (r, g(r)) for r in self._regs if not g(r) is None] - - # flags - args += ['%s=%s' % (r, g(r)) for r in self._flags if not g(r) is None] - - # other flags - if self.rotate != -1: - args.append('rotate=%d' % self.rotate) - - if self.option != -1: - args.append('option=%s' % bin(self.option)) - - if self.imm: - args.append('imm=%s' % (str(self.imm) - if self.imm < 0x1000 else - hex(self.imm)[2:])) - - if self.shift: - args.append(repr(self.shift)) - - if self.lsb or self.width: - args += ['lsb=%d' % self.lsb, 'width=%d' % self.width] - - if self.reglist: - args.append('reglist=%s' % str(self.reglist)) - - args = ', ' + ', '.join(args) if args else '' - return 'Darm(instr=%s, instr_type=%s, cond=%s%s)' % \ - (repr(self.instr), repr(self.instr_type), repr(self.cond), args) - - def __str__(self): - x = _DarmStr() - if _lib.darm_str2(self.d, byref(x), True) == 0: - return x.total - return '' - - -def disasm_armv7(w): - d = _Darm() - ret = _lib.darm_armv7_disasm(byref(d), w) - return Darm(d) if ret == 0 else None - - -def disasm_thumb(w): - d = _Darm() - ret = _lib.darm_thumb_disasm(byref(d), w) - return Darm(d) if ret == 0 else None - - -def disasm_thumb2(w): - d = _Darm() - ret = _lib.darm_thumb2_disasm(byref(d), (w >> 16) & 0xffff, w & 0xffff) - return Darm(d) if ret == 0 else None - - -def _set_func(name, restype, *argtypes): - getattr(_lib, name).restype = restype - getattr(_lib, name).argtypes = argtypes - - -_darm_dir = os.path.dirname(os.path.abspath(__file__)) -if os.path.exists(os.path.join(_darm_dir, 'libdarm.dll')): - _lib = cdll.LoadLibrary(os.path.join(_darm_dir, 'libdarm.dll')) -elif os.path.exists(os.path.join(_darm_dir, 'libdarm.so')): - _lib = cdll.LoadLibrary(os.path.join(_darm_dir, 'libdarm.so')) -else: - raise Exception('libdarm not found!') - -_set_func('darm_armv7_disasm', c_int32, POINTER(_Darm), c_uint32) -_set_func('darm_thumb_disasm', c_int32, POINTER(_Darm), c_uint16) -_set_func('darm_thumb2_disasm', c_int32, POINTER(_Darm), c_uint16, c_uint16) -_set_func('darm_mnemonic_name', c_char_p, c_uint32) -_set_func('darm_enctype_name', c_char_p, c_uint32) -_set_func('darm_register_name', c_char_p, c_int32) -_set_func('darm_shift_type_name', c_char_p, c_int32) -_set_func('darm_condition_name', c_char_p, c_int32, c_int32) -_set_func('darm_reglist', c_int32, c_uint16, c_char_p) -_set_func('darm_str', c_int32, POINTER(_Darm), POINTER(_DarmStr)) -_set_func('darm_str2', c_int32, POINTER(_Darm), POINTER(_DarmStr), c_int32) DELETED util/dport/src/darm/darm.rb Index: util/dport/src/darm/darm.rb ================================================================== --- util/dport/src/darm/darm.rb +++ /dev/null @@ -1,166 +0,0 @@ -=begin -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -=end - -require 'ffi' - -module FFI - module Darm - extend FFI::Library - - darm_dir = File.dirname(__FILE__) - lib_name = FFI.map_library_name('darm') - ffi_lib File.join(darm_dir, lib_name) - - class DarmInst < FFI::Struct - layout :w, :uint32, - :instr, :uint32, - :instr_type, :uint32, - :cond, :uint32, - :B, :uint32, - :S, :uint32, - :E, :uint32, - :M, :uint32, - :N, :uint32, - :option, :int32, - :U, :uint32, - :H, :uint32, - :P, :uint32, - :R, :uint32, - :T, :uint32, - :W, :uint32, - :I, :uint32, - :rotate, :int32, - :Rd, :int32, - :Rn, :int32, - :Rm, :int32, - :Ra, :int32, - :Rt, :int32, - :Rt2, :int32, - :RdHi, :int32, - :RdLo, :int32, - :imm, :uint32, - :type_, :int32, - :Rs, :int32, - :shift, :uint32, - :lsb, :uint32, - :width, :uint32, - :reglist, :uint16, - :coproc, :uint8, - :opc1, :uint8, - :opc2, :uint8, - :CRd, :int32, - :CRn, :int32, - :CRm, :int32, - :firstcond, :int32, - :mask, :uint8 - end - - class DarmStr < FFI::Struct - layout :mnemonic, [:char, 12], - :arg0, [:char, 32], - :arg1, [:char, 32], - :arg2, [:char, 32], - :arg3, [:char, 32], - :arg4, [:char, 32], - :arg5, [:char, 32], - :shift, [:char, 12], - :total, [:char, 64] - end - - attach_function :darm_armv7_disasm, [:pointer, :uint32], :int32 - attach_function :darm_thumb_disasm, [:pointer, :uint16], :int32 - attach_function :darm_thumb2_disasm, [:pointer, :uint16, :uint16], :int32 - attach_function :darm_mnemonic_name, [:uint32], :string - attach_function :darm_enctype_name, [:uint32], :string - attach_function :darm_register_name, [:int32], :string - attach_function :darm_shift_type_name, [:int32], :string - attach_function :darm_condition_name, [:int32, :int32], :string - attach_function :darm_reglist, [:uint16, :pointer], :int32 - attach_function :darm_str, [:pointer, :pointer], :int32 - attach_function :darm_str2, [:pointer, :pointer, :bool], :int32 - end -end - -class Darm - include FFI::Darm - - attr_reader :dinst, :instr, :instr_type, :cond - - def initialize - @dinst = DarmInst.new - end - - # TODO: use a wrapper function for all disasm_* - # logic to identify instruction type and call appropriate function - # will be implemented natively in darm - - def disasm_armv7(blob) - darm_armv7_disasm( @dinst, blob ) - details() - end - - def disasm_thumb(blob) - darm_thumb_disasm( @dinst, blob ) - details() - end - - # not yet implemented - def disasm_thumb2(blob) - darm_thumb2_disasm( @dinst, blob ) - details() - end - - def details - @instr = "I_" + darm_mnemonic_name( @dinst[:instr] ) - @instr_type = "T_" + darm_enctype_name( @dinst[:instr_type] ) - @cond = "C_" + darm_condition_name( @dinst[:cond], 0 ) - end - - def register_list - buf = FFI::MemoryPointer.new(32) - darm_reglist(@dinst[:reglist], buf) - buf.null? ? nil : buf.read_string - end - - def shift_type - return if darm_shift_type_name( @dinst[:type_] ).nil? - type_name = "S_" + darm_shift_type_name( @dinst[:type_] ) - - if @dinst[:Rs] >= 0 - printf "type_=%s, Rs=%s", type_name, @dinst[:Rs] - else - printf "type_=%s, shift=%d", type_name, @dinst[:shift] - end - end - - def to_s - dstr = DarmStr.new - darm_str2(@dinst, dstr, true) - dstr[:total].to_str - end -end DELETED util/dport/src/darm/darmgen.py Index: util/dport/src/darm/darmgen.py ================================================================== --- util/dport/src/darm/darmgen.py +++ /dev/null @@ -1,1018 +0,0 @@ -""" -Copyright (c) 2013, Jurriaan Bremer -All rights reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. -* Neither the name of the darm developer(s) nor the names of its - contributors may be used to endorse or promote products derived from this - software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -POSSIBILITY OF SUCH DAMAGE. -""" -import darmtbl -import darmtbl2 -import itertools -import sys -import textwrap -import string - - -def instruction_name(x): - return x.split('{')[0].split('<')[0].split()[0] - - -def instruction_names(arr): - """List of all unique instruction names.""" - return ['INVLD'] + sorted(set(instruction_name(x) for x in arr)) - - -def enum_table(name, arr): - """Enumeration.""" - text = '\n '.join(textwrap.wrap(', '.join(arr), 74)) - return 'typedef enum _%s_t {\n %s\n} %s_t;\n' % (name, text, name) - - -def typed_table(typ, name, arr): - """A table with a given type.""" - text = '\n '.join(textwrap.wrap(', '.join(arr), 74)) - - # if it's not a pointer, append a space - if typ[-1] != '*': - typ += ' ' - return '%s%s[] = {\n %s\n};\n' % (typ, name, text) - - -def string_table(name, arr): - """A string table.""" - return typed_table('const char *', name, ('"%s"' % x for x in arr)) - - -def instruction_names_enum(arr): - """Enumeration of all instruction names.""" - return enum_table('darm_instr', - ['I_%s' % x for x in instruction_names(arr)] + - ['I_INSTRCNT']) - - -def instruction_names_table(arr): - """Table of strings of all instructions.""" - return string_table('darm_mnemonics', instruction_names(arr)) - - -def instruction_types_table(arr, kind): - """Lookup table for the types of instructions.""" - arr = ['T_%s' % arr[x][1][1] if x in arr else 'T_INVLD' - for x in range(256)] - return typed_table('darm_enctype_t', '%s_instr_types' % kind, arr) - - -def instruction_names_index_table(arr, kind): - """Lookup table for instruction label for each instruction index.""" - arr = ['I_%s' % arr[x][0] if x in arr else 'I_INVLD' - for x in range(256)] - return typed_table('darm_instr_t', '%s_instr_labels' % kind, arr) - - -def instruction_names_index_table_thumb2(arr, kind): - """Lookup table for instruction label for each Thumb2 instruction index.""" - barr = map(lambda x: 'I_%s' % str(x[0]), arr.values()) - return typed_table('darm_instr_t', '%s_instr_labels' % kind, barr) - - -def type_lookup_table(name, *args): - """Create a lookup table for a certain instruction type.""" - arr = ('I_%s' % x.upper() if x else 'I_INVLD' for x in args) - return typed_table('darm_instr_t', '%s_instr_lookup' % name, arr) - - -def type_encoding_enum(enumname, arr): - text = [] - for _, name, info, encodings, _, affects in arr: - text.append( - ' // info:\n' + - ' // %s\n //\n' % info + - ' // encodings:\n // ' + - '\n // '.join(encodings) + '\n //\n' + - ' // affects:\n // ' + - '\n // '.join(textwrap.wrap(', '.join(affects), 74)) + '\n' + - ' T_%s,' % name) - - return 'typedef enum _%s_t {\n%s\n} %s_t;\n' % (enumname, - '\n\n'.join(text), - enumname) - - -def type_encoding_table(tblname, arr): - """Table of strings of all instructions.""" - return string_table(tblname, (x[1] for x in arr)) - - -def generate_format_strings(arr): - ret = {} - - # a set of rules to transform a string representation as given by the - # armv7 manual, into our own custom format string - rules = [ - # if this instruction updates the condition flags, then an S is added - # to the end of the instruction - '{S}', 's', - - # if this instruction is conditional, then the condition under which - # it executes is appended to the instruction - '', 'c', - - # memory address - '[,#+/-]', 'M', - '[,+/-{,}]', 'M', - - # memory address with Rn as base register and an immediate or Rm - # operand as offset - '[]', 'B', - '#+/-', 'O', - '#+/-', 'O', - '+/-', 'O', - - # various register operands - '', 'd', - '', 'n', - '', 'm', - '', 'a', - '', 't', - '', '2', - '', 'h', - '', 'l', - - # immediate values - '#', 'i', - '#', 'i', - '#', 'i', - '#', 'i', - '#', 'i', - '#', 'i', - - # immediate and register shift - '{,}', 'S', - '#', 'S', - ' ', 'S', - - # some bit instructions take a lsb and width as operand - '#', 'L', - '#', 'w', - - # for branch instructions - '